专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明专利

JPS61278136A DETECTION METHOD FOR POSITION OF PATTERN 失效
公开(公告)号：JPS61278136A
公开(公告)日：1986-12-09
申请号：JP11897085
申请日：1985-06-03
申请人： HITACHI LTD
发明人： NAKADA TOSHIHIKO , OSHIDA YOSHISADA , SHIBA MASATAKA
IPC分类号： H01L21/30 , G03F9/00 , H01L21/027 , H01L21/67 , H01L21/68
摘要： PURPOSE:To obtain the position of the center of a pattern to be detected precisely even when reflected-beam intensity distribution from the pattern is asymmetrized by processing a synthetic image detection signal by a weighted symmetrical evaluation function. CONSTITUTION:Reflected beams from a wafer-target pattern are detected by a two-dimensional image pickup element, and sent to a computer in a shape that reflected beams are A/D converted by a preprocessing circuit and further converted into one-dimensional detection signal. The values of weighted symmetrical evaluation functions Y (I) regarding several virtual symmetrical central position are acquired while referring to the information of pattern width (c) in the direction of the detection of the position of the pattern in the computer. The one-dimensional detection signal in the vicinity of a pattern stepped section is weighted by W2/W1 times at its maximum as much as regions except the section in the vicinity of the pattern stepped section, but the values of W1, W2 may be set arbitrarily and properly in response to the qualities of pattern materials.

62. 发明专利

JPS61278135A METHOD AND APPARATUS FOR DETECTING POSITION OF PATTERN 失效
公开(公告)号：JPS61278135A
公开(公告)日：1986-12-09
申请号：JP11896985
申请日：1985-06-03
申请人： HITACHI LTD
发明人： NAKADA TOSHIHIKO , OSHIDA YOSHISADA , SHIBA MASATAKA
IPC分类号： H01L21/30 , G03F9/00 , H01L21/027 , H01L21/66 , H01L21/67 , H01L21/68
摘要： PURPOSE:To obtain a detecting signal having a high contrast by lighting a two-dimensional pattern and a section in the vicinity of the pattern under the state in which the spatial coherence of pattern lighting beams is improved in one direction to the two-dimensional pattern and lowered in another direction orthogonal to the direction. CONSTITUTION:Wafer-target pattern lighting beams 28 are throttled in the x direction by a slit 24 and a cylindrical lens 25, and formed so as to shape a stripe pattern sufficiently long in the direction (the y direction) orthogonal to the direction of the detection of the position of a wafer-target pattern 91 in an entrance pupil 19. Consequently, beams 28 projected to the wafer-target pattern 91 hold an approximately parallel state in the direction (the x direction) of the detection of the position of the pattern. Accordingly, spatial coherence is improved in the direction (the x direction). On the other hand, luminous flux 281-285 is projected from a large number of angles in the direction (the y direction) orthogonal to the direction (the x direction) of the detection of the position of the pattern, thus lowering the spatial coherence.

63. 发明专利

JPS61116836A Alignment system 失效
标题翻译：对齐系统
公开(公告)号：JPS61116836A
公开(公告)日：1986-06-04
申请号：JP23742084
申请日：1984-11-13
申请人： Hitachi Ltd
发明人： NAKADA TOSHIHIKO , SHIBA MASATAKA , OSHIDA YOSHISADA , UTO YUKIO , YOSHIZAKI ATSUHIRO
IPC分类号： H01L21/30 , G03F9/00 , H01L21/027
CPC分类号： G03F9/7076
摘要： PURPOSE:To easily realize alignment by executing the coarse detection for loading reticle to the fixed position and fine detection for alignment with wafer through same reticle alignment pattern and the same detection optical system. CONSTITUTION:The alignment pattern groups 18a-18e of reticle 1 have different number of fresnel belt plates 19a-19e, its diffraction pattern is focused to a movable slit 9 of optical system 38. Meanwhile, the reflected light of mirror pattern 17 is reflected by the alignment pattern, focused to the slit 9 and is detected by photosensor. In this case, when the sight (dotted line) of optical system 38 exists in the pattern 18a (target value) in the same position as the mirror pattern 17, the diffracted pattern image 39c on the slit 9 becomes linear and the signal 40c can be obtained by the slit scanning. The patterns 18a-18e are set independently within the detection sight and the relation between a number of fresnel plate 19 and center interval of pattern group 18 is previously detected. Thereby, the absolute position of reticle 1 can be detected from a number of linear diffraction patterns 39 and corrected distance from the position of pattern 18 to the target position can also be detected.
摘要翻译：目的：通过执行粗调检测，通过相同的掩模版校准图案和相同的检测光学系统，通过执行将掩模版加载到固定位置的微细检测和与晶片对准的精细检测来容易地实现对准。构图：标线片1的取向图案组18a-18e具有不同数量的菲涅耳带板19a-19e，其衍射图案被聚焦到光学系统38的可移动狭缝9上。同时，反射镜图案17的反射光被对准图案被聚焦到狭缝9并被光电传感器检测。在这种情况下，当与镜面图案17相同位置的光学系统38的视线（虚线）存在于图案18a（目标值）时，狭缝9上的衍射图案图像39c变为线性的，信号40c可以通过狭缝扫描获得。图案18a-18e被独立地设置在检测视线内，并且先前检测了菲涅尔板19的数量与图案组18的中心间隔之间的关系。因此，可以从多个线性衍射图案39检测标线片1的绝对位置，并且还可以检测从图案18的位置到目标位置的校正距离。

64. 发明专利

JPS60113425A SEMICONDUCTOR EXPOSING DEVICE 失效
公开(公告)号：JPS60113425A
公开(公告)日：1985-06-19
申请号：JP21941583
申请日：1983-11-24
申请人： HITACHI LTD
发明人： OSHIDA YOSHISADA , SHIBA MASATAKA , NAKADA TOSHIHIKO , KOIZUMI MITSUYOSHI
IPC分类号： H01L21/30 , G03F7/20 , G03F9/00 , H01L21/027
摘要： PURPOSE:To enable a high-speed exposure by mounting a wafer for exposure on a surface of an X-Y table and a wafer for alignment on a back surface and providing an alignment optical system on the back surface thereby performing exposure and alignment at the same time. CONSTITUTION:The light generated by an exposure lightening source 40 transmits through a reticle 1' and reaches a chip of a wafer 2 present on a surface of X-Y tables 71 and 72 by an image forming lens 3. An wafer 2' present in almost the same position as that of the wafer 2 under alignment is measured the position of chip while the X-Y tables 72 and 71 stop by an alignment optical system 50 and an alignment detection system 5. The wafer 2 after completion of exposure is carried to a delivery mechanism 730 through a handling mechanism 700.

65. 发明专利

JPS59117117A Frame for pellicle protecting film 失效
标题翻译：镜片保护膜
公开(公告)号：JPS59117117A
公开(公告)日：1984-07-06
申请号：JP22600982
申请日：1982-12-24
申请人： Hitachi Ltd
发明人： SHIBA MASATAKA , AKIYAMA NOBUYUKI , UTO YUKIO
IPC分类号： H01L21/66 , G01N21/94 , G03F1/62 , G03F1/84 , H01L21/027 , H01L21/30
CPC分类号： G03F1/64 , G01N21/94
摘要： PURPOSE:To perform inspection of the substrate surface easily after a protecting film is attached by introducing a substance through which the light for inspection can penetrate as the material for a frame of a pellicle protecting film partially or as a whole. CONSTITUTION:A pellicle protecting film, which is composed of a frame 12 made of Al or other material and a nitrocellulose film 3 formed on it, is attached to the surface of a photomask or a substrate 1 in order to prevent foreign material from adhering to it. In this case, a transparent thin film 11 is provided to the part of the frame 12 where it is drilled out or the whole frame is made of a transparent material such as glass. Then, when a laser beam 4 irradiates with a small incident angle to inspect whether the foreign material is adhered to the surface of the substrate, the beam is not reflected by the frame 12 so that the inspection of the substrate with respect to the adhesion of the foreign material can be performed after attaching the pellicle protecting film.
摘要翻译：目的：通过引入检查用光可以透过的物质作为防护薄膜组件保护膜的部件或整体的材料，在保护膜附着后，容易地进行基材表面的检查。构成：由铝或其他材料制成的框架12和形成在其上的硝酸纤维素膜3组成的防护薄膜组件保护膜附着到光掩模或基板1的表面，以防止异物粘附到它。在这种情况下，透明薄膜11设置在框架12的被钻出的部分或整个框架由透明材料如玻璃制成。然后，当激光束4以小的入射角度照射以检查异物是否粘附到基板的表面时，光束不被框架12反射，使得基板对于粘合的检查可以在附着防护薄膜后进行异物。

66. 发明专利

JP2002313938A SEMICONDUCTOR CHIP AND METHOD OF INSPECTING SEMICONDUCTOR MANUFACTURING PROCESS 失效
公开(公告)号：JP2002313938A
公开(公告)日：2002-10-25
申请号：JP2001120900
申请日：2001-04-19
申请人： HITACHI LTD
发明人： HAMAMURA YUICHI , IWATA HISAFUMI , ISHIKAWA SEIJI , SHIBA MASATAKA
IPC分类号： G01R31/02 , G01R31/28 , H01L21/3205 , H01L21/66 , H01L21/822 , H01L23/52 , H01L27/04 , H01L27/10
摘要： PROBLEM TO BE SOLVED: To detect defects generated in a semiconductor device during a wiring process using the own structure of the device. SOLUTION: The wiring layer 11 of a semiconductor chip contains wiring patterns 17a and 17b for testing which are not connected to any cell in an area covering the forming area of memory cells 16. The semiconductor chip has an integrated circuit layer 10 containing macrocells, the multilayered wiring layer 11 overlying the circuit layer 10, and a protective film 19 overlying the wiring layer 11. The chip also has a processor, SRAM, ROM, clock section, and DRAM 16 as the macrocells.

67. 发明专利

JP2001093832A SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD 失效
公开(公告)号：JP2001093832A
公开(公告)日：2001-04-06
申请号：JP2000227538
申请日：2000-07-24
申请人： HITACHI LTD
发明人： NOGUCHI MINORU , KENBO YUKIO , OSHIDA YOSHITADA , SHIBA MASATAKA , YOSHITAKE YASUHIRO , MURAYAMA MAKOTO
IPC分类号： H01L21/027 , G03F1/30 , G03F1/68 , G03F7/20 , H01L21/66 , G03F1/08
摘要： PROBLEM TO BE SOLVED: To provide an aligner and a method for making image of a mask pattern on a substrate with a resolution higher than that possessed by an optical system, using a white and black mask. SOLUTION: An aligner includes an aligner made up of an Hg lamp 3101, a condense lens 3103, an integrator 3104, a light source space filter 3301 as an annular imaginary light source formed by arranging a plurality of spot light sources a condenser lens 3106, a focus lens (reduction projection lens) 3201, a focus space filter (pupil) 3302 put near to the focus lens, a mask stage 3401, and a wafer stage 3402, a pattern generating system 1000, and a mask forming system 2000. In this case, by blinding all or part of a zero-th order diffraction light beam from a mask illuminated in annular form by an annular lighting means, there is an effect equal to a phase shifter method of a phase film formed on a mask pattern, so that the contrast of the focus pattern can be improved.

68. 发明专利

JP2001085326A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JP2001085326A
公开(公告)日：2001-03-30
申请号：JP2000227539
申请日：2000-07-24
申请人： HITACHI LTD
发明人： NOGUCHI MINORU , KENBO YUKIO , OSHIDA YOSHITADA , SHIBA MASATAKA , YOSHITAKE YASUHIRO , MURAYAMA MAKOTO
IPC分类号： H01L21/027 , G03F7/20
摘要： PROBLEM TO BE SOLVED: To enable a monochromatic micro-circuit pattern to be transferred onto a substrate higher in resolution than a phase shifter, by a method wherein a mask with a phase shifter is irradiated with an excimer laser beam projected from many points of light source, a mask pattern is transferred onto a wafer, and the wafer is processed. SOLUTION: A mask with a phase shifter is irradiated with an excimer laser beam projected from many points of light source, a mask pattern is transferred onto a wafer, and the wafer where the pattern is transferred is processed, by which a circuit pattern which is 0.2 μm or below in line width is formed on the wafer. At least a part of O-order diffracted light is shielded with a light shielding plate (image formation spatial filter 3302) on a diffraction image plane, by which only diffracted light inverted in phase reaches to an image- foramtion plane, so that it appears that a phase film is formed on the mask from a viewpoint of an image-formation plane. As a result, a circuit pattern is transferred onto a wafer the same as a phase shifter method.

69. 发明专利

JPH11214462A METHOD FOR DECIDING DEFECT FATALITY IN CIRCUIT PATTERN INSPECTION, METHOD FOR SELECTING DEFECT TO BE REVIEWED AND ASSOCIATED CIRCUIT PATTERN INSPECTION SYSTEM 失效
公开(公告)号：JPH11214462A
公开(公告)日：1999-08-06
申请号：JP1045698
申请日：1998-01-22
申请人： HITACHI LTD
发明人： YOSHITAKE YASUHIRO , SHIBA MASATAKA , SHIMODA ATSUSHI
IPC分类号： G01B11/24 , G01N21/88 , G01N21/94 , G01N21/956 , H01L21/02 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To enhance inspection efficiency by comparing the size of a detected defect with a data for determining the fatality in a region of a circuit pattern to which the defect belongs thereby determining the fatality of the defect automatically without requiring any review. SOLUTION: An inspection data, e.g. an inspection process, a defect coordinate and the size of a detect, is retrieved at a retrieving section and read into a memory (S202). A chip area coordinate data is then read out (S101) and a decision rule data corresponding to a read out inspection process is retrieved at the retrieving section and read into a memory (S203). After finishing preliminary arrangement, fatality of 'defect is determined (S207) and a fatality defect sorting number F corresponding to a detect No.N is written in a memory in case of a fatal defect (S208) otherwise a nonfatality defect sorting number NF corresponding to the detect No.N is written in a memory (S209).

70. 发明专利

JPH1154399A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH1154399A
公开(公告)日：1999-02-26
申请号：JP20576597
申请日：1997-07-31
申请人： HITACHI LTD
发明人： YOSHITAKE YASUHIRO , SHIBA MASATAKA , OSHIDA YOSHITADA
IPC分类号： G03F1/38 , G03F1/68 , G03F7/20 , H01L21/027 , G03F1/08
摘要： PROBLEM TO BE SOLVED: To transfer an excellent pattern within the focal depth of a projection lens, by exposing a transferring mask having a diffraction type lens to a light. SOLUTION: When an illumination light 400 of an illumination optical system 4 enters mask 5, an aperture pattern 51 is drawn in a position corresponding to a cell part 31, and a diffraction type lens pattern 52 is drawn in a position corresponding to a peripheral circuit part 32 in a mask 5. A light 410 outputted from the aperture pattern 51 forms its image in a contact hole 310 on the cell 31 via projection lenses 2. A light 420 outputted from the diffraction type lens 52 once forms an image at an imagery point A below the mask 5, and the imagery point A is formed in a contact hole 320 on the peripheral circuit 32. The distance (f) between the imagery point A and the mask 5 is determined in accordance with the step-difference Z between the cell 31 and the peripheral circuit 32. Letting the projection magnification of the projection lenses 2 be M, the relation between (f) and Z is given by f=Z/M. The focal length of the diffraction type lens 52 is so designed that it becomes equal to the distance (f).

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式