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61. 发明专利

JPH0220182A MOTION SIGNAL PROCESSING CIRCUIT AND TIME SPACE FILTER CIRCUIT 失效
公开(公告)号：JPH0220182A
公开(公告)日：1990-01-23
申请号：JP16876688
申请日：1988-07-08
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： MATONO TAKAAKI , SUGIYAMA MASAHITO , KATSUMATA KENJI , HIRAHATA SHIGERU , ISHIKURA KAZUO , SUZUKI SUNAO
IPC分类号： H04N19/00 , H04N7/01 , H04N9/78 , H04N11/04 , H04N11/20 , H04N19/132 , H04N19/137 , H04N19/42 , H04N19/423 , H04N19/51 , H04N19/80
摘要： PURPOSE:To obtain an optimum control signal, whose gravity center corresponds to a motion adaptive signal processing circuit, without increasing a circuit scale by providing a means to vertically move the gravity center of a time space filter by H/2, and providing independent control terminals respectively for motion adaptive Y/C separation and scanning line interpolation. CONSTITUTION:A gravity center moving circuit 811 and a scanning line interpolating control signal output terminal are added. Since an inter-frame differential signal inputted from an input terminal is band-controlled in a time/vertical direction by an LPF 804 in a vertical direction and the LPF in a time direction, a motion area is expanded in the time/vertical direction, the gravity center is dislocated by H/2 in the vertical direction by a gravity center moving circuit 811, and the gravity center is dislocated. Thus, since the scanning line interpolating circuit corresponds to the processed gravity center in the vertical direction, the optimum control is attained.

62. 发明专利

JPH01272268A VIDEO SIGNAL PROCESSING CIRCUIT CAPABLE OF ENLARGING DISPLAY 失效
公开(公告)号：JPH01272268A
公开(公告)日：1989-10-31
申请号：JP10032888
申请日：1988-04-25
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： KATSUMATA KENJI , HIRAHATA SHIGERU , SUGIYAMA MASAHITO , MATONO TAKAAKI , ISHIKURA KAZUO , SUZUKI SUNAO , KAIZAKI KAZUHIRO
IPC分类号： G06T3/40 , H04N5/262 , H04N9/74
摘要： PURPOSE:To obtain an enlarged picture at high picture quality by providing first and second buffer memories to store real scanning signals, third and fourth field memories to store interpolating scanning line signals, and a switching circuit to switch the respective memories. CONSTITUTION:First and second buffer memories 105 and 106 store the real scanning line signals, and third and fourth buffer memories 107 and 108 store the interpolating scanning signals. A first switching circuit 110 selects one of the output signals of the first and second buffer memories 105 and 106, a second switching circuit 111 selects one of the output signals of the third and fourth buffer memories 107 and 108, and a third switching circuit 103 switches the outputs of the first and second switches 110 and 111. Thus, an enlarged video of high picture quality can be obtained.

63. 发明专利

JPH01264376A SIGNAL PROCESSING CIRCUIT CAPABLE OF DISPLAYING PLURAL PICTURES 失效
公开(公告)号：JPH01264376A
公开(公告)日：1989-10-20
申请号：JP9145888
申请日：1988-04-15
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： SUZUKI SUNAO , SUGIYAMA MASAHITO , MATONO TAKAAKI , KATSUMATA KENJI , HIRAHATA SHIGERU , NAKAGAWA HIMIO , KAIZAKI KAZUHIRO
IPC分类号： H04N5/265 , H04N5/45
摘要： PURPOSE:To generate a frame signal whose illuminance and chrominance phase do not change even when the reference level of an input signal fluctuates by providing a reference level detecting circuit which takes in a video signal to be displayed, detects the reference level of the said video signal for a master picture, and supplies it to a frame signal generating circuit. CONSTITUTION:A master picture processing circuit 103 eliminates a noise with the use of a frame correlation, uses a frame memory 106 for the stationary processing of the whole master picture, and outputs a processing result to an output terminal 111. A pulse generating circuit 108 generates respective pulse signals based on synchronizing signal inputted from a synchronizing signal input terminal 102, and controls selector circuits 105 end 106, the writing/reading of of the frame memory 106, and a reference level detecting circuit 109. In such a may, the reference level averaged by the reference level detecting circuit 109 is inputted to a frame signal generating circuit 110, an arbitrary fixed value is added or subtracted, and the frame signal at the determined signal level is outputted to the selector circuit 107.

64. 发明专利

JPS63272195A VIDEO SIGNAL PROCESSING CIRCUIT CAPABLE OF REPRODUCING STILL PICTURE 失效
公开(公告)号：JPS63272195A
公开(公告)日：1988-11-09
申请号：JP10433187
申请日：1987-04-30
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： KATSUMATA KENJI , SUGIYAMA MASAHITO , MATONO TAKAAKI , HIRAHATA SHIGERU , NAKAGAWA HIMIO , ISHIKURA KAZUO , SUZUKI SUNAO
IPC分类号： H04N9/78 , H04N5/937 , H04N7/01
摘要： PURPOSE:To attain a function to successive scan freeze picture of high quality by switching the output signal from a first memory, in which the output signal of a Y/C separating circuit is stored, and that from a second memory, in which the output signal of a scanning line interpolating circuit is stored, in every field to obtain actual scanning line and interpolating scanning line signals. CONSTITUTION:The first memory circuit 105 in which one-field components of the output signal of a motion-adaptive Y/C separating circuit are stored, the second memory circuit 109 in which one-field components of the output signal of a motion-adaptive scanning line interpolating circuit are stored, a memory reading circuit which reads out signals stored in the first and second memories 105 and 109 in every field, and switch circuits 112 and 113 which switch output signals of the first and second field memories 105 and 109 in every field to output actual scanning line and interpolating scanning line signals of the video signal of a still picture are provided. Thus, the picture of high quality is frozen.

65. 发明专利

JPS63211880A IMAGE SIGNAL PROCESSOR 失效
公开(公告)号：JPS63211880A
公开(公告)日：1988-09-02
申请号：JP4254787
申请日：1987-02-27
申请人： HITACHI LTD
发明人： KATSUMATA KENJI , HIRAHATA SHIGERU , SUGIYAMA MASAHITO , NAKAGAWA HIMIO
IPC分类号： H04N5/265 , H04N5/45
摘要： PURPOSE:To facilitate confirmation of the procedure of a program by automatically displaying a moving image in a slave picture by means of a counter that count for a period of N-second and a picture-in-picture PinP control circuit at the time of freezing the whole picture. CONSTITUTION:In normal operation, an illuminance signal and a color signal after moving-adoptive processing are outputted from output terminals 402, 403. If a freeze signal is inputted from a switch circuit 404, switches 405, 408, 411, 414 are connected to b-terminal in the inverse direction in convert with the vertical synchronization of a master picture, and the whole picture is frozen. By using the counter 105 that counts up N-second time being activated by a freezing signal from the circuit 404, time is counted, and after N seconds, the PinP control circuit 106 starts operation. The circuit 106 controls switch circuits 103, 104 so that a signal from a slave picture processing circuit 102 is stored in a memory area for slave-picture storing. As a result of above mentioned action, after the lapse of N seconds after freezing the whole picture, the PinP function operates to display a moving signal in the slave picture. As a result, the status quo of the program can be confirmed.

66. 发明专利

JPS62295593A SEPARATION CIRCUIT FOR LUMINANCE SIGNAL AND CHROMINANCE SIGNAL 失效
公开(公告)号：JPS62295593A
公开(公告)日：1987-12-22
申请号：JP13831986
申请日：1986-06-16
申请人： HITACHI LTD
发明人： KURITA TOSHIYUKI , NAKAGAWA HIMIO , HIRAHATA SHIGERU , SUGIYAMA MASAHITO , MURATA TOSHINORI , KATSUMATA KENJI
IPC分类号： H04N9/78
摘要： PURPOSE:To attain still picture reproduction which is high in picture quality and less in flickering by writing a signal after the separation of a luminance/ chrominance signal during a prescribed period in one frame memory and outputting the signal to a switching means. CONSTITUTION:In case of a still picture reproduction mode, the level of a mode signal from a mode signal input terminal 302 is at H and its mode signal switches changeover devices 101-103 to the position opposite to those shown in the figure, that is, output of the switch 101 gives an output signal of a subtractor 23, the output of the switch 102 is an output signal of the 1 frame memory 14 and the output of the switch 103 is an output signal of the 1 frame memory 104. For one frame period after the still picture reproduction mode, the output signal of the subtractor 23 is written in the 1 frame memory 14. The chrominance signal is written in the 1 frame memory 104 as the output signal of a mixer 22 for one frame period after the still picture reproduction mode in the same way as the case with the luminance signal.

67. 发明专利

JPS6276890A SIGNAL PROCESSING CIRCUIT 失效
公开(公告)号：JPS6276890A
公开(公告)日：1987-04-08
申请号：JP21501185
申请日：1985-09-30
申请人： HITACHI LTD
发明人： OKUDA AKIHIDE , NAKAGAWA HIMIO , SUGIYAMA MASAHITO , KATSUMATA KENJI
IPC分类号： H04N9/78
摘要： PURPOSE:To obtain a YC separating circuit having a small quantity of inter-YC crosstalk by providing the two-dimensional filter to separate YC by the two-dimensional filter processing of a horizontal axis and a vertical axis and a mixing circuit to mix the output of three filters in accordance with a movement quantity and a vertical correlation quantity. CONSTITUTION:A two-dimensional filter 7 is realized for example by connecting serially a vertical axis filter and a horizontal axis filter. The horizontal axis filter is composed of a band pass filter, for example, in which fsc+ or -0.5MHz is a passband, in the vicinity offsc and the passband at such a time is the narrower band than that of the band pass filter 10. When the vertical axis filter in the two-dimensional filter 7 is made into the same characteristic as a vertical axis filter 6, the hardware can be decreased by the constitution to use these together. Thus, when the moving picture and the vertical correlation are not found, the YC separation is executed by the two-dimensional filter, and therefore, the separating accuracy is high and the inter-YC crosstalk can be decreased.

68. 发明专利

JPS61248691A SIGNAL PROCESSING CIRCUIT FOR HIGH DEFINITION TELEVISION RECEIVER 失效
公开(公告)号：JPS61248691A
公开(公告)日：1986-11-05
申请号：JP8857285
申请日：1985-04-26
申请人： HITACHI LTD
发明人： KOJIMA NOBORU , HORIUCHI SUNAO , KATSUMATA KENJI , SUGIYAMA MASAHITO , NAKAGAWA HIMIO
IPC分类号： H04N19/00 , H04N11/04
摘要： PURPOSE:To obtain a normal freeze picture when an animation is freezed by cycling a signal of one frame on which a motion adapting process is applied in a freeze mode within a memory and using the signal of the one frame on which the motion adapting process is applied within the memory. CONSTITUTION:In a normal mode, the signal from a switch circuit 12 is led to field memories 14 and 15 having share of four fields by a switch circuit 31. On the other hand, in the freeze mode, the switch circuit 31 is connected as shown at a figure and also, the switch circuits 12 and 13 are terminated switching operations which are controlled by a sub-sampling clock signal from an input terminal 7 after one frame and are connected as shown at the figure. To the memories 14 and 15, the output signal of a mixer 21 on which the motion adapting process is applied is always led and also, to a sub-sample filter 16 and to two-dimentional filters 17 and 18, the signal in which the output of the mixer 21 from the second field memory 15 is delayed by one frame is led. Thereby, the signal of one frame before on which the motion adapting process is applied is always feedbacked to the mixer 21 and the freeze picture can be obtained.

69. 发明专利

JP2010211915A Content delivery system and terminal 审中-公开
标题翻译：内容交付系统和终端
公开(公告)号：JP2010211915A
公开(公告)日：2010-09-24
申请号：JP2010086663
申请日：2010-04-05
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KATSUMATA KENJI , NAKAMURA KOICHIRO , OTOMO NAOKI , SUZUKI HITOSHI , YOSHINO MASANORI , HAYASHI YOSHIHIRO , KATSUMATA KENICHI
IPC分类号： G11B20/10 , H04N5/765 , H04N7/173 , H04N21/2343 , H04N21/61
摘要： PROBLEM TO BE SOLVED: To provide a content delivery system and a terminal that reduce write (download) time to a portable mobile recording medium. SOLUTION: The system for sharing new and highly efficient compression algorithm and algorithm used for broadcasting, the number of customers can be increased by using a reproduction terminal with a secured interface mounted thereon and collecting customer information. COPYRIGHT: (C)2010,JPO&INPIT

70. 发明专利

JP2010178372A Display 有权
标题翻译：显示
公开(公告)号：JP2010178372A
公开(公告)日：2010-08-12
申请号：JP2010088260
申请日：2010-04-07
申请人： Hitachi Ltd , Hitachi Ulsi Systems Co Ltd , 株式会社日立製作所 , 株式会社日立超エル・エス・アイ・システムズ
发明人： OKU MASUO , KOMI HIRONORI , INADA KEISUKE , TOTANI RYOSUKE , KATSUMATA KENJI , KOMATSU SHIGERU , TORIGOE SHINOBU , MATONO TAKAAKI , TANAKA CHIKASHI , HISANAGA MASAAKI
IPC分类号： H04N5/44 , H04N5/445 , H04N5/45 , H04N5/46 , H04N5/775 , H04N5/85 , H04N7/173 , H04N21/40 , H04N21/438
CPC分类号： H04N5/775 , H04N5/4401 , H04N5/445 , H04N5/45 , H04N5/46 , H04N5/85 , H04N7/012 , H04N21/42638 , H04N21/42653 , H04N21/4305 , H04N21/4316 , H04N21/440218
摘要： PROBLEM TO BE SOLVED: To provide a display of dynamic image data used in both of analog and digital broadcasts with high image quality and a common user interface.
SOLUTION: This invention includes: a dynamic data decoding means to decode digital dynamic image data to obtain decoded dynamic image data; a memory means to store the decoded dynamic image data; an image format converting means to convert an image format of the decoded dynamic image data to obtain format-converted dynamic image data; and an output means to output the format-converted dynamic image data.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供在具有高图像质量和普通用户界面的模拟和数字广播两者中使用的动态图像数据的显示。解决方案：本发明包括：动态数据解码装置，用于解码数字动态图像数据以获得解码的动态图像数据; 存储装置，用于存储解码的动态图像数据; 图像格式转换装置，用于转换解码的动态图像数据的图像格式以获得格式转换的动态图像数据; 以及输出装置，用于输出格式转换的动态图像数据。版权所有（C）2010，JPO＆INPIT

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