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61. 发明专利

JPH0758201A MANUFACTURE OF MULTILAYER WIRING BOARD 失效
公开(公告)号：JPH0758201A
公开(公告)日：1995-03-03
申请号：JP20233093
申请日：1993-08-16
申请人： TOSHIBA CORP
发明人： HIGUCHI KAZUTO , YAMADA HIROSHI , SAITO MASAYUKI
IPC分类号： H01L21/3205 , H01L21/768 , H05K3/40 , H05K3/46
摘要： PURPOSE:To obtain a highly reliable multilayer wiring which can be brought into the state of high density easily by a method wherein, after a contact hole is formed in the insulating film of a board and flat surface is obtained by plating, a wiring layer is formed in such a manner that it is brought into contact with the flat surface. CONSTITUTION:A copper thin film pattern is formed on the insulating film 2 formed on the surface of a board 1 as the first layer wiring film 3. Photosensitive polyimide is coated thereon, and after a contact hole 9, with a side of about 20mum, has been formed by conducting an exposing and developing operation, a heat treatment is conducted at 400 deg.C for thirty minutes, and an interlayer insulating film 4 is formed. Then, after forming a titanium film 5 and a copper film 6 successively in 1mum thickness using a sputtering method, a thick copper- plating film 7 is formed on a recessed part by conducting electric plating under the condition wherein a flat surface can be obtained using the above-mentioned titanium film 5 and copper film 6 as an electrode. A titanium-copper-titanium multilayer thin film 8 is formed on the board 1 for which burying is conducted as the second wiring layer. As a result, a highly precise multilayer wiring can be obtained by reduced manhours.

62. 发明专利

JPS6453640A MOBILE BODY OPTICAL COMMUNICATION CONTROL SYSTEM 失效
公开(公告)号：JPS6453640A
公开(公告)日：1989-03-01
申请号：JP8219488
申请日：1988-04-05
申请人： KOITO KOGYO KK , TOSHIBA CORP
发明人： KUBO KATSUMI , YAMADA TAKAHIKO , HIGUCHI KAZUTO , HOZUMI JUNICHI
IPC分类号： H04B10/07 , H04B10/11 , H04J14/00 , H04J14/04 , H04J14/06
摘要： PURPOSE:To attain the optical communication with high reliability by providing a moving-station side light emitting/receiving device having a wide light emitting/ receiving angle at a mobile body and providing a fixed-station side light emitting/ receiving device having a narrow light emitting/receiving angle at the fixed station. CONSTITUTION:A mobile body 1 is constituted of a moving side light emitting/receiving device 2 having a wide light emitting angle and a wide light receiving angle and a moving side control part 3 to execute the mediation of a signal between the moving side light emitting/receiving device 2 and a controlled substance 32. A fixed station 4 is constituted of a fixed side light emitting/receiving device 5 having a narrow light emitting angle and light receiving angle to communicate with the moving side light emitting/receiving device 2, an adjusting mechanism part 7 to adjust the direction so as to match the light axis of the fixed side light emitting/receiving device 5 to the moving side light emitting/receiving device 2 with a searching light 6 emitted by the moving side light emitting/receiving device 2, and a fixed side control part 9 to execute the mediation of the signal between respective main control part 8 and the adjusting mechanism part 7 and the fixed side light emitting/receiving device 5.

63. 发明专利

JP2003229668A METHOD OF MANUFACTURING MULTILAYERED WIRING BOARD 审中-公开
公开(公告)号：JP2003229668A
公开(公告)日：2003-08-15
申请号：JP2002363403
申请日：2002-12-16
申请人： TOSHIBA CORP
发明人： HIGUCHI KAZUTO , YAMADA HIROSHI , SAITO MASAYUKI
IPC分类号： H05K1/09 , C25D7/00 , H05K3/18 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide multilayered wiring that can be increased easily in density and is high in reliability. SOLUTION: In a method of manufacturing multilayered wiring board, an interlayer insulating film 4 is formed on a first wiring layer 3 formed on a substrate and, after a contact hole 9 is formed in the insulating film 4, the whole surface of the substrate is coated with conductive films 5 and 6. Then the surface of the substrate is flattened by electroplating a film 7 on the conductive film 6 so that the film 7 may become thicker in thickness in the recessed section composed of the contact hole 9 by using the conductive films 5 and 6 as electrodes. After the surface is flattened, a second wiring layer 8 is formed so that the layer 8 may come into contact with the plated film 7. COPYRIGHT: (C)2003,JPO

64. 发明专利

JP2002176267A ELECTRONIC PARTS, CIRCUIT DEVICE, MANUFACTURING METHOD THEREFOR AND SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：JP2002176267A
公开(公告)日：2002-06-21
申请号：JP2001284316
申请日：2001-09-19
申请人： TOSHIBA CORP
发明人： HIGUCHI KAZUTO
IPC分类号： H05K1/16 , H01L23/12 , H01L25/00 , H05K1/18 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide an inexpensive and thin substrate incorporating parts, which incorporates the electronic parts with high density, whose insulating layer is formed of resin and which has high function, and to provide a manufacturing method and a semiconductor package using the substrate incorporating the parts, loading a semiconductor chip for functioning. SOLUTION: The thin film electronic part with bumps 13 for interlayer connection is laminated on the substrate 10. Thus, the part is incorporated and interlayer connection is realized. Then, the circuit device of high density is constituted. For forming the thin film electronic part 13, a recessed part being the mold of a bump is formed on a template and an electrode and an element are sequentially formed on the template. Consequently, the fine thin film electronic part with bumps superior in a characteristic is formed in a simple process.

65. 发明专利

JP2002076633A MANUFACTURING METHOD OF MULTILAYER INTERCONNECTION BOARD AND PLATING METHOD 失效
公开(公告)号：JP2002076633A
公开(公告)日：2002-03-15
申请号：JP2000255841
申请日：2000-08-25
申请人： TOSHIBA CORP
发明人： HIGUCHI KAZUTO
IPC分类号： H05K1/09 , C25D7/00 , H05K3/18 , H05K3/42 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayer interconnection board that is fine and has high density by a highly productive process. SOLUTION: The manufacturing process of the multilayer interconnection board comprises a process for forming an insulating resin layer 20 having a via hole 21 reaching a first wiring layer 11 on the surface of a base 10, a conductive film formation process for forming a copper thin film 30 on the surface of the insulating resin layer 20, a resist film formation process for forming, on the surface of the copper thin film 30, a resist film 40 having an opening 41 that is formed so that the resist film 40 partially covers the upper surface of the via hole 21, and a wiring formation section 42 that is formed at a site corresponding to second wiring 52 while communicating with the opening 41, a process for filling a conductive metal into the opening 41 and the wiring formation section 42 on the via hole 21 by electric plating, and a process for removing the resist film 40 and the copper thin film 30.

66. 发明专利

JPH1117333A WIRING BOARD AND ITS MANUFACTURE 失效
公开(公告)号：JPH1117333A
公开(公告)日：1999-01-22
申请号：JP16688997
申请日：1997-06-24
申请人： TOSHIBA CORP
发明人： MIYAGI TAKESHI , HIGUCHI KAZUTO
IPC分类号： H05K3/40 , H05K3/24 , H05K3/38 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To minimize the formation of a silicon oxide film on the surface of a first metallic layer even when the surface of the first metallic layer is cleaned with a mixed gas of oxygen and CF4 and to obtain a strong adhesive strength between the first metallic layer and a second metallic layer even when the second metallic thin film is formed on the oxide film by adjusting the surface roughness of the surface to be connected to the second metallic layer of the first metallic layer to a specific value or lower. SOLUTION: Copper foil 2 is bonded to a printed wiring board 1 as a first wiring layer and a BCB film 3 is formed on the surface of the board 1 including the copper foil 2 as an interlayer insulating layer. A second wiring layer 4 is formed on the PCB film 3 and connected to the first wiring layer 2 in contact holes. The surface roughness of the surface (to be connected to the second wiring layer 4) of the first wiring layer 2 is adjusted to

67. 发明专利

JPH10214832A MULTILAYER WIRING STRUCTURE AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JPH10214832A
公开(公告)日：1998-08-11
申请号：JP1530297
申请日：1997-01-29
申请人： TOSHIBA CORP
发明人： MIYAGI TAKESHI , HIGUCHI KAZUTO
IPC分类号： H01L21/3205
摘要： PROBLEM TO BE SOLVED: To enable application of mechanical polishing and high-yield formation of substrate without distortion, by forming a pattern-formed wiring layer on the substrate, then forming an insulating layer on a region on the substrate except a via, and providing a high-hardness insulating layer on the insulating layer. SOLUTION: On a substrate l, patterned wiring 7 is formed, and a contact column 6 for electrical connection with another wiring is formed. An insulating layer 2 of BCB resin is formed in an region on the substrate 1 except the wiring 7, and an insulating nonorganic thin film 4 of Al2 O3 or the like having hardness higher than that of the insulating layer 2 is formed on the insulating layer 2. Further, a plating electrode is formed on the surface of the nonorganic thin film 4, the surface of the wiring 7 at a portion to be a contact column and the wall surface of the BCB film. Then, the mechanical polishing is performed to the surface of the nonorganic thin film 4 to remove excessive plating electrode. Thereafter, wiring layers 13 and 14, a BCB insulating layer 10, a via 12 and the like are provided, and an LSI 20 is packaged.

68. 发明专利

JPH09306991A MANUFACTURE OF WIRING BOARD 失效
公开(公告)号：JPH09306991A
公开(公告)日：1997-11-28
申请号：JP12047796
申请日：1996-05-15
申请人： TOSHIBA CORP
发明人： MIYAGI TAKESHI , HIGUCHI KAZUTO , SAITO MASAYUKI
IPC分类号： H01L21/31 , H01L21/312 , H01L21/768 , H01L23/522 , H05K1/00 , H05K3/10 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To avoid using large amt. of harmful etching liq. by forming a metal film on a patterned benzocyclobutene insulation film, plating the metal film, and polishing it to remove unwanted plating. SOLUTION: A first Cu wiring 3 is usually previously formed on the surface of a printed circuit board 1. A photosensitive benzocyclobutene(BCB) resin 2 is applied to the whole surface of a substrate by spin coating to form a film. It is prebaket at e.g. 80 deg.C for 20min, exposed at e.g. 60mJ, and developed to pattern it, thereby forming grooves 21, 22. Thus desired section shape is obtained. Thus it is possible to produce a wiring board superior in electric characteristics at a low cost and improve the adhesion strength of BCB to the metal film, thereby obtaining high reliability.

69. 发明专利

JPH08222822A WIRING BOARD AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH08222822A
公开(公告)日：1996-08-30
申请号：JP2895095
申请日：1995-02-17
申请人： TOSHIBA CORP
发明人： HIGUCHI KAZUTO , MIYAGI TAKESHI , YAMADA HIROSHI , SAITO MASAYUKI
IPC分类号： H05K1/02 , H05K3/46
摘要： PURPOSE: To improve a property of insulation between wiring layers and a breakdown strength thereof without thickening a layer insulating film in multilayer interconnection, by a method wherein a plurality of ridge parts of a section of a wiring of a wiring board wherein a conductive layer forming a wiring pattern and an insulating layer are laminated are so constructed as to form a continuous curve and thereby the section of the wiring is made semicylindrical. CONSTITUTION: A wiring board is constructed by laminating a titanium film 3 and a copper film 4 consecutively on the surface of a silicon substrate 2 and by forming a wiring pattern 5 further thereon. Ridge parts of the wiring pattern 5 are so constructed as to form a continuous curve and a sectional structure of the pattern is thereby made semicylindrical. The radius of curvature of these ridge parts is made 5μm. Then, an insulating film 6 is formed on the wiring board and further a second wiring pattern 7 is formed on the insulating film. The thickness of the insulating film 6 is made 10μm, the same as the height of the wiring pattern 5. The thickness of the insulating film at the ridge parts of the wiring is made 7μm, which is a sufficient thickness and also causes no pinhole. Besides, a connection area of a via connection part is made 1.2 times larger than the one in the case when the upper side of the wiring is flat.

70. 发明专利

JP2000124243A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2000124243A
公开(公告)日：2000-04-28
申请号：JP29073398
申请日：1998-10-13
申请人： TOSHIBA CORP
发明人： HIGUCHI KAZUTO , IIDA ATSUKO , YAMADA HIROSHI , TOGASAKI TAKASHI , TATEYAMA KAZUKI
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To manufacture a fine solder bump while its high productivity is ensured by a method wherein high-accuracy solder plating is performed selectively into a plurality of fine through holes, solder pieces are moved collectively onto a semiconductor chip and fine solder bumps are formed. SOLUTION: A laminated film is formed of a nickel film and a gold film to use as barrier metals on a pellet H like bare semiconductor chip. Then, a hole is formed in a position corresponding to the electrode of the semiconductor chip on a carrier having a structure in which a conductor layer is sandwiched between resins. A copper foil inside the foil is etched. A hole is made on the copper foil. A through hole is formed. Then, solder plating is performed to the part of the copper foil which is exposed on the wall surface of the through hole in the carrier. A solder piece is formed inside the through hole. Then, the carrier is brought into close contact with the electrode pad. While this state is being kept, this assembly is passed through a reflow furnace, and the solder piece is made to reflow. In addition, the carrier is separated from the semiconductor chip in its reflow operation. As a result, the solder piece is transferred to the electrode pad, and it is possible to obtain a semiconductor element in which a spherical bump electrode 8 is formed.

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