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51. 发明专利

JPH11176980A BALL GRID ARRAY PRINTED CIRCUIT BOARD AND SEMICONDUCTOR DEVICE USING THE SAME 失效
公开(公告)号：JPH11176980A
公开(公告)日：1999-07-02
申请号：JP34307697
申请日：1997-12-12
申请人： TOSHIBA CORP
发明人： YAMADA HIROSHI , TOGASAKI TAKASHI , TATEYAMA KAZUKI
IPC分类号： H01L21/60 , H01L23/12 , H05K1/11 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To provide a ball grid array BGA semiconductor device having a resin layer which encapsulates a semiconductor element and with high connection reliability. SOLUTION: This semiconductor device is provided with a BGA printed circuit board 2 on the backside of which pole electrodes 4 are placed in an array form, a semiconductor element 1 that is mounted on a major side of the BGA printed circuit board, and a resin layer 3 that encapsulates the semiconductor element and is placed on a major side of the BGA printed circuit board. Ball electrodes included in a resin layer on a backside and placed on the backside of the BAG printed circuit board include first ball electrodes placed inward from a resin layer outer circumference 5 which is in contact with a major side of the BGA printed circuit board and second ball electrodes placed at the outside of the resin layer outer circumference 5. A placing inhibit region where no ball electrodes are placed is in existence between the first pole electrodes and second pole electrodes.

52. 发明专利

JPH09230315A LIQUID CRYSTAL DISPLAY DEVICE AND ITS PRODUCTION 失效
公开(公告)号：JPH09230315A
公开(公告)日：1997-09-05
申请号：JP3486096
申请日：1996-02-22
申请人： TOSHIBA CORP
发明人： TATEYAMA KAZUKI , YAMADA HIROSHI , MORI MIKI , SHIMIZU SEISABURO , SAITO MASAYUKI
IPC分类号： G02F1/1333 , H05K1/18
摘要： PROBLEM TO BE SOLVED: To provide a display device which is mechanically connected by the solid phase diffusion of bump metals and wiring pattern metals and has high reliability. SOLUTION: This display device includes a glass substrate 2 which has the metallic wiring patterns 4, a semiconductor element 1 which has a plurality of metallic patterns 3 and is connected with these bumps 3 to the metallic wiring patterns 4 by the solid phase diffusion and a thermoplastic resin layer 5 which is sealed in the spacing between the glass substrate 2 and the semiconductor element 1. The thermoplastic resin 5 has the m. p. or softening temp. lower than the temp. at which the connection of the metallic bumps 3 and the metallic wiring patterns 4 is obtd. by the solid phase diffusion. The m.p. or softening point thereof is so set as to attain 150 to 350 deg.C.

53. 发明专利

JPH09172110A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH09172110A
公开(公告)日：1997-06-30
申请号：JP33332395
申请日：1995-12-21
申请人： TOSHIBA CORP
发明人： TATEYAMA KAZUKI , YAMADA HIROSHI , HONMA SOICHI , TOGASAKI TAKASHI , SAITO MASAYUKI
IPC分类号： H01L21/60 , H01L21/56 , H01L23/29 , H01L23/31
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device with reliability for a long time, by reducing shearing distortion caused at an end part of resin formed around a semiconductor element. SOLUTION: A semiconductor device 10 includes a circuit wiring board 2 and a semiconductor element 1 mounted on the board 2 with a bump electrode 3. A space between the board 2 and the semiconductor element 1 and a space around the semiconductor element 1 are sealed with a resin containing inorganic filler. The resin part includes a first resin 6 in a space surrounded with most outer bumps 3 in a circumferential part of the semiconductor element 1 and a second resin 7 in a space not surrounded with the most outer bumps 3. In addition, at least one index out of a containing ratio of inorganic filler, a maximum size of grain or a mean size of grain of the first resin 6 is made larger than that of the second resin 7.

54. 发明专利

JPH10294337A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH10294337A
公开(公告)日：1998-11-04
申请号：JP10321397
申请日：1997-04-21
申请人： TOSHIBA CORP
发明人： YAMADA HIROSHI , TOGASAKI TAKASHI , TATEYAMA KAZUKI , MIYAGI TAKESHI , MORI MIKI
IPC分类号： H01L21/60 , H05K3/34 , H01L21/321
摘要： PROBLEM TO BE SOLVED: To relieve the strain due to stress of bumps due to the difference between the thermal expansion coefficients of a semiconductor chip and a circuit wiring board by a method wherein high-melting point solder alloy layers, which are firm to the strain due to stress, are selectively arranged only on the side of the board and the compositions of the alloy layers are changed in a stepwise manner to the side of the chip. SOLUTION: Bump electrodes 3 are respectively constituted of a first solder alloy layer 4 having a first melting point, a third solder alloy layer 5 having a third melting point, which is lower than the first melting point and is higher than a second melting point, and a second solder alloy layer 6 having the second melting point, which are arranged in order from the side of a circuit wiring board 2. Accordingly, as the solder composition alloy layers, which are firm to the strain due to stress, are arranged on the side part, in which the strain due to stress is generated most greatly, of the board 2, the strain due to stress of bumps is relaxed. Moreover, as the melting temperature of the layer 5 is within the ranges of the melting temperatures of the layers 4 and 6, a semiconductor chip 1 can be reliably bonded to the board 2 without needing a flux by heating simultaneously the chip 1 and the board 2 within the ranges of these temperatures to pressure-weld the alloy layers to each other.

55. 发明专利

JP2001250902A SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME 失效
公开(公告)号：JP2001250902A
公开(公告)日：2001-09-14
申请号：JP2000063874
申请日：2000-03-08
申请人： TOSHIBA CORP
发明人： TATEYAMA KAZUKI
IPC分类号： H01L25/00 , H01L25/10 , H01L25/11 , H01L25/18
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor package which has excellent reliability and reduces manufacturing cost even when a multi-layered wiring film is formed to be connected to electrodes of semiconductor elements buried in an intermediate substrate. SOLUTION: A first intermediate substrate 31 provided in a recess 32 has semiconductor elements 40 with bump electrodes 44 formed as extended toward the opening side of the recess 32, and a multi-layered wiring film 50 connected to the bump electrodes 44. A second intermediate substrate 31 provided in the recess 32 has semiconductor elements 40 with bump electrodes 44 formed as extended toward the opening side of the recess 32, and a multi-layered wiring film 50 connected to the bump electrodes 44. An end-face multi-layered wiring film 60 for mutual connection of the multi-layered wring films 50 are provided on end faces 31c of the first and second intermediate substrates 31.

56. 发明专利

JP2000124243A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2000124243A
公开(公告)日：2000-04-28
申请号：JP29073398
申请日：1998-10-13
申请人： TOSHIBA CORP
发明人： HIGUCHI KAZUTO , IIDA ATSUKO , YAMADA HIROSHI , TOGASAKI TAKASHI , TATEYAMA KAZUKI
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To manufacture a fine solder bump while its high productivity is ensured by a method wherein high-accuracy solder plating is performed selectively into a plurality of fine through holes, solder pieces are moved collectively onto a semiconductor chip and fine solder bumps are formed. SOLUTION: A laminated film is formed of a nickel film and a gold film to use as barrier metals on a pellet H like bare semiconductor chip. Then, a hole is formed in a position corresponding to the electrode of the semiconductor chip on a carrier having a structure in which a conductor layer is sandwiched between resins. A copper foil inside the foil is etched. A hole is made on the copper foil. A through hole is formed. Then, solder plating is performed to the part of the copper foil which is exposed on the wall surface of the through hole in the carrier. A solder piece is formed inside the through hole. Then, the carrier is brought into close contact with the electrode pad. While this state is being kept, this assembly is passed through a reflow furnace, and the solder piece is made to reflow. In addition, the carrier is separated from the semiconductor chip in its reflow operation. As a result, the solder piece is transferred to the electrode pad, and it is possible to obtain a semiconductor element in which a spherical bump electrode 8 is formed.

57. 发明专利

JP2000012590A ELECTRODE STRUCTURE OF ELECTRONIC COMPONENT 失效
公开(公告)号：JP2000012590A
公开(公告)日：2000-01-14
申请号：JP17164298
申请日：1998-06-18
申请人： TOSHIBA CORP
发明人： TOGASAKI TAKASHI , TATEYAMA KAZUKI
IPC分类号： H01R4/02 , H01L21/60
摘要： PROBLEM TO BE SOLVED: To surely solder an electronic component to a circuit substrate, without soldering flux by forming a first layer made of metal fluoride compound on a solder intrinsic part and by forming a second layer made of metal fluoride and metal oxide on the first layer. SOLUTION: An input/output electrode 13, made of an aluminum thin film, is formed on an electronic component 11 made of a silicon semiconductor. The electronic component 11 is covered with a protective film 12 having an opening above the input/output electrode 13. Furthermore, a solder electrode 18 is formed on the input/output electrode 13 via diffusion anticliffnsion preventing electrode 14 made of a Ti layer which has a thickness of about 100 nm and a Ni-layer having a thickness of about 400 nm. The solder electrode 18 is formed of a solder intrinsic part 15 made of Sn/Pb, a first layer 16 made of a fluoride of solder alloy, and a second layer 17 made of a mixture of the oxide of a solder alloy and fluoride, wherein the first layer 16 and the second layer 17 are laminated on the solder intrinsic part 15. This makes it possible to solder an electronic component to a circuit substrate without soldering flux.

58. 发明专利

JPH10261642A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH10261642A
公开(公告)日：1998-09-29
申请号：JP6428997
申请日：1997-03-18
申请人： TOSHIBA CORP
发明人： YAMADA HIROSHI , TATEYAMA KAZUKI , TOGASAKI TAKASHI , HONMA SOICHI
IPC分类号： H01L21/60 , H01L21/203 , H01L21/28 , H01L21/321
摘要： PROBLEM TO BE SOLVED: To prevent the destruction of bump electrodes and the peeling of barrier metal and enhance the reliability life of connection between a semiconductor chip and a circuit wiring board by forming the bump electrodes on bonding pads with a first metallic layer in-between which contains oxygen of higher concentration in the peripheral region than in the inner region. SOLUTION: A first metal layer 3 which contains oxygen of higher concentration at least in its peripheral region b than in its inner region a is formed on bonding pads 5, formed on a semiconductor chip 1. Then projected bump electrodes 2, composed of a second metal layer, are formed on the first metal layer 3. For example, a first metallic layer 3, composed of titanium which contains oxygen of higher concentration in its peripheral region b than in its inner region an and acts as barrier metal layer, is formed on bonding pads 5. Bump electrodes 2 composed of a second metal layer are formed thereon with a third metallic layer 4 which is highly wettable to solder metal.

59. 发明专利

JPH09129647A SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPH09129647A
公开(公告)日：1997-05-16
申请号：JP28077795
申请日：1995-10-27
申请人： TOSHIBA CORP
发明人： HONMA SOICHI , YAMADA HIROSHI , TATEYAMA KAZUKI , EBITANI TAKASHI , SAITO MASAYUKI
IPC分类号： H01L21/60 , H01L21/321
摘要： PROBLEM TO BE SOLVED: To obtain a barrier metal having a high mobility capable of avoiding the decline in share strength and the release of a bump by forming a barrier metal of the laminated films successively formed of the first film containing titanium, the second film containing nickel titanium compound and the third film containing nickel. SOLUTION: A bump 8' is formed on an electrode pad 2 through the intermediary of barrier metals 7. In such a constitution, the barrier metals 7 are composed of laminated layer films successively formed of the first film 4 containing titanium, the second film 5 containing nickel titanium and the third film 6 containing nickel. For example, an Au bump 8' is formed on a semiconductor chip 1 whereon an aluminum pad 2 is formed through the intermediary of the barrier metals 7. That is, the barrier metals 7 are structured of the successively laminated layers of the titanium film 4, the nickel titanium compound (nickel titanium solid solution) film 5 and the nickel film 6.

60. 发明专利

JP2000173035A HEAD GINBAL ASSEMBLY AND MAGNETIC DISC DRIVE 失效
公开(公告)号：JP2000173035A
公开(公告)日：2000-06-23
申请号：JP34243298
申请日：1998-12-02
申请人： TOSHIBA CORP
发明人： HIGUCHI KAZUTO , YAMADA HIROSHI , TOGASAKI TAKASHI , TATEYAMA KAZUKI , YODA HIROAKI
IPC分类号： G11B5/60
摘要： PROBLEM TO BE SOLVED: To achieve a high data transfer rate at high recording density by roviding a suspension with a flexure part for connecting an electromagnetic conversion element, an active circuit part for processing I/O signal of the electromagnetic conversion element, and a load beam part disposed between the flexure part and the active circuit part thereby reducing the parasitic impedance due to wiring between a magnetic head and the active circuit part. SOLUTION: A head ginbal assembly is provided with a silicon suspension 50 comprising a load beam part 1, a flexure part 2 and an active circuit part 3. The suspension 50 is made of single crystal silicon and a read/write IC is formed in an active circuit region 53. A wiring pattern 51 is formed on the surface of the flexure part 2 and the load beam part 1 through an insulation layer and a pad 52 is provided at an end for fixing a slider while the other end is connected electrically with the I/O end of the read/write IC. According to the structure, wiring length is shortened between a magnetic head and the read/write IC while reducing parasitic impedance.

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