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51. 发明专利

JPH08106728A MAGNETIC REPRODUCING AND DECODING DEVICE 失效
公开(公告)号：JPH08106728A
公开(公告)日：1996-04-23
申请号：JP24032694
申请日：1994-10-04
申请人： SONY CORP
发明人： NOCHIDA KAORU
IPC分类号： G11B20/14
摘要： PURPOSE: To obtain an accurate stable clock, and to enable complete follow-up to the change of a data rate by controlling the sampling lock of an A/D converter by a phase error output. CONSTITUTION: A reproducing signal integrated and equalized by an integrating equalizer 115 is quantitized by converting the signal level of the reproducing signal while using a synchronous clock of twice as large as a data rate as a reference by an A/D converter 116. A phase error detector 1 is supplied with the quantitized reproducing signal. A signal inverted by the polarity of before odd data is D/A converted and extracted as a phase error signal at the time of the reverse polarity of before and after odd data in the even sample data of quantitized digital data. That is, a gate is worked and no error signal is output at the time of the same polarity of the before and after odd data. A high-accurary synchronous clock is obtained by a voltage-controlled oscillator 9 regarding the phase error signal. Accordingly, the reproducing signal is quantitized by the clock completely synchronized with the signal after integrating and equalization, and partial response conversion and Viterbi decoding are conducted, thus perfectly following up the change of the data rate.

52. 发明专利

JPH05290310A 失效
公开(公告)号：JPH05290310A
公开(公告)日：1993-11-05
申请号：JP11399192
申请日：1992-04-07
申请人： SONY CORP
发明人： NOCHIDA KAORU
IPC分类号： G11B5/09 , G11B20/10 , G11B20/18
摘要： PURPOSE:To reduce influence on viterbi decoding by preventing variation of quantization output of an A/D converter by level variation of a reproduced RF signal. CONSTITUTION:A reproduced RF signal from a equalization circuit 3 is supplied to an envelop detecting circuit 6. This detecting circuit 6 generates a positive phase output of which the level is raised when an envelop level is raised and a negative phase output of which the level is reduced when a envelop level is raised. This positive phase output is supplied to an A/D converter 4 as the upper side reference voltage RT, and the negative phase output is supplied as lower side reference voltage RB. This output of the A/D converter 4 is supplied to a viterbi decoder 7. Decoding using viterbi algorithm is performed by the viterbi decoder 7.

53. 发明专利

JPH0467415A RECORDING/REPRODUCING DEVICE 失效
公开(公告)号：JPH0467415A
公开(公告)日：1992-03-03
申请号：JP17877790
申请日：1990-07-06
申请人： SONY CORP
发明人： MATSUZAWA HIROSHI , SATO ICHITARO , NOCHIDA KAORU
IPC分类号： G11B5/455 , G11B5/008 , G11B5/027 , G11B5/035 , G11B20/10
摘要： PURPOSE:To control the gain of the regenerative RF signal of plural channels by comparing detection output obtained for every channel with a reference level, and making the envelope level of an input RF signal constant according to the timing of control voltage generated at each magnetic head of every channel. CONSTITUTION:An RF signal supplied from each of the magnetic heads 2, 5 fitted on the peripheral surface 12 of a rotary drum 11 in accordance with plural channels is detected, and the envelope level LRF0, LRF1 of the RF signal of every channel is obtained. Then, the envelope level LRF0, LRF1 obtained for every channel is compared with the reference level, and the control voltage corresponding to the magnetic heads 2, 5 of every channel is generated, and the envelope level LRF0, LRF1 of the RF signal to be outputted is controlled so as to be constant by the control voltage. Thus, fine level adjustment can be easily executed for each of plural channels, and the variation of the envelope level LRF of the RF signal can be prevented without adding any special circuit.

54. 发明专利

JPH0463079A NONLINEAR DEEMPHASIS CIRCUIT 失效
公开(公告)号：JPH0463079A
公开(公告)日：1992-02-28
申请号：JP17372590
申请日：1990-06-29
申请人： SONY CORP
发明人： NOCHIDA KAORU
IPC分类号： H04N5/21 , G11B20/02 , H03G5/18 , H04N5/923 , H04N5/93
摘要： PURPOSE:To improve S/N without subtly degrading the waveform of a reproduced signal in a simple constitution by subtracting an amplitude limiting signal from an input signal through a nonlinear amplifying circuit at the time of subtracting the amplitude limiting signal from the input signal to obtain the reverse characteristic of a nonlinear emphasis circuit. CONSTITUTION:The output signal of a limiter circuit 8 is not only fed back to a subtracting circuit 13 through an attenuator 18 but also outputted to a nonlinear amplifying circuit. In the nonlinear amplifying circuit, the output signal of the limiter circuit 8 has the amplitude limited by a limiter circuit 12 and is mixed with the output signal of the limiter circuit 8 by a mixer 22, and the output signal is outputted to a subtracting circuit 16. It is subtracted from an original reproduced signal SRF by the subtracting circuit 16 to obtain the reverse characteristic of a nonlinear emphasis circuit 20. Consequently, a high band component is suppressed in a range a1 where the amplitude is sufficiently shorter than an amplitude limit value LIM2 of the limiter circuit 12, and thereby, S/N is improved without damaging a subtle outline of the reproduced picture.

55. 发明专利

JPH0461005A MAGNETIC REPRODUCING DEVICE 失效
公开(公告)号：JPH0461005A
公开(公告)日：1992-02-27
申请号：JP17372890
申请日：1990-06-29
申请人： SONY CORP
发明人： NOCHIDA KAORU
IPC分类号： G11B5/035
摘要： PURPOSE:To easily adjust the frequency characteristics of an equalizer circuit by detecting the frequency characteristics of an output signal outputted from the equalizer circuit based on the counter value of a counter circuit counting the zero cross point of a limiting signal. CONSTITUTION:An equalizer circuit 22 correcting the frequency characteristics of a regenerative signal SRF outputted from a magnetic head 2, a limiter circuit 10 outputting a limiting signal SOUT by limiting the amplitude of the output signal of the equalizer circuit 22, and a counter circuit 26 counting the zero cross point of the limiting signal SOUT against the prescribed reference voltage for a prescribed period, are provided. The frequency characteristics of the output signal outputted from the equalizer circuit 22 are detected based on the count value of the counter circuit 26. Thus, the equalizer circuit 22 can be easily adjusted.

56. 发明专利

JPH0461004A MAGNETIC RECORDING MEDIUM 失效
公开(公告)号：JPH0461004A
公开(公告)日：1992-02-27
申请号：JP17372690
申请日：1990-06-29
申请人： SONY CORP
发明人： NOCHIDA KAORU , HARA MASAO
IPC分类号： G11B5/027
摘要： PURPOSE:To enable accurate judgement of demodulation result with a simple constitution by directly generating and recording frequency modulated signals the modulation frequency of which is half of the carrier frequency. CONSTITUTION:The frequency modulated signal (STEST) of the carrier frequency fc, the modulation frequency fs of which is set at half of the carrier frequency fc is directly generated by a test signal generator 32. This signal STEST as the test signal is recorded in the magnetic recording medium 34. By this method, generation of moire is prevented and test signal STEST having stable phases can be obtained. Thereby, demodulation result can be accurately judged with a simple constitution.

57. 发明专利

JPS63224488A TIME-BASE COMPRESSING AND EXPANDING DEVICE 失效
公开(公告)号：JPS63224488A
公开(公告)日：1988-09-19
申请号：JP5781887
申请日：1987-03-12
申请人： SONY CORP
发明人： NOCHIDA KAORU , NAKASHIO MIAKI , ONO KOICHI
IPC分类号： H04N5/92 , G11C19/28 , G11C27/04 , H03H15/02 , H04N5/14 , H04N7/12 , H04N9/79 , H04N9/86
摘要： PURPOSE:To reduce noises originating from signal charge transfer operation by driving a CCD with two two-phase transfer clock pulse signals and reading a signal out of the CCD, equalizing 1st and 3rd pulse train signals in pulse width substantially to each other, and setting the pulse width to smaller than a half as large as a smaller period between 1st and 2nd periods. CONSTITUTION:When there is transition from a write period to a read period, variation in residual charge amount at the crooked part of the charge transfer channel of the CCD 22 is obtained as variation from a residual charge amount q4 to a residual charge amount q5 by variation from pulse width tau4 to pulse width tau5 as to a clock pulse of the other phase of the two-phase transfer clock pulse signal. Then the pulse width tau3 is made smaller than a half as large as pulse width tau2 to make the pulse width tau4 larger than pulse width tau1. Consequently, the residual charge amount q4 and residual charge amount q5 are made relatively small. Therefore, noise components contained corresponding to variation in residual charge amount at the crooked part of the charge transfer channel of the CCD 22 are reduced effectively.

58. 发明专利

JPS62200890A REPRODUCING DEVICE 失效
公开(公告)号：JPS62200890A
公开(公告)日：1987-09-04
申请号：JP4303886
申请日：1986-02-28
申请人： SONY CORP
发明人： NOCHIDA KAORU
IPC分类号： H04N9/86 , H04N9/81 , H04N9/89 , H04N9/893
摘要： PURPOSE:To lower power consumption, to simplify adjustment and to substantially improve trackability with respect to skew and angle division by giving the same phase to a pair of component chrominance signals subjected to time division base compression, then writing them in a shift register with the aid of a common write clock and reading them with the aid of a common read clock. CONSTITUTION:Out of a pair of component chrominance signals SC which are subjected to time division base compression from a recording track, one component chrominance signal is moved in the direction of a time base by a delay means CCD 10 so that the phase of said signal can be the same as that of the other component chrominance signal. In order to expand in terms of time base a pair of component chrominance signals with the same phase, they are supplied to shift registers 11, 12, 13 and 14 such as CCDs. A clock generator circuit 6 supplies the same write clock and the same read clock to said registers, and controls and outputs said clocks so that a write clock output section can be arranged between one read clock output section and a next one.

59. 发明专利

JPS61238180A CLAMPING CIRCUIT 失效
公开(公告)号：JPS61238180A
公开(公告)日：1986-10-23
申请号：JP7997185
申请日：1985-04-15
申请人： SONY CORP
发明人： NARITA TAKAHITO , NOCHIDA KAORU
IPC分类号： H04N5/18
摘要： PURPOSE:To obtain a clamping circuit having the high clamping ability with a low power consumption by providing the variable electric current source at the emitter terminal of the transistor included in an impedance converting circuit composed of the emitter follower provided at the input side of the clamping capacitor. CONSTITUTION:A variable electric current source 30 increases an emitter electric current IE of a transistor Q1 during the clamping period T1 based upon a clamping pulse signal P which comes from the external part. As the result, the output impedance of an impedance converting circuit 10, namely, the input impedance of a clamping capacitor C is decreased, and in a moment, charging is executed. For this, the variable electric current source 30 decreases lowly the emitter electric current IE of the transistor Q1 during the non-clamping period T2 based upon a clamping pulse signal CP. Thus, the power consumption during the non-clamping period T2 can be phasedly decreased.

60. 发明专利

JPS61158288A VIDEO SIGNAL REPRODUCER 失效
公开(公告)号：JPS61158288A
公开(公告)日：1986-07-17
申请号：JP27682684
申请日：1984-12-29
申请人： SONY CORP
发明人： NOCHIDA KAORU
IPC分类号： H04N9/81 , H04N9/88
摘要： PURPOSE:To omit a time base expander for drop-out pulse and to reduce the circuit scale by expanding a compressed color difference signal as well as the time base in a state where a drop-out pulse is included. CONSTITUTION:The red and blue color difference signals (R-Y) and (B-Y) are turned into a compressed color difference signal SC whose time base is com pressed down to 1/2 by a compressor 5. The signal SC is recorded on a tape 4 and then reproduced by a head Hb. Thus a compressed color difference signal SC'. The signal SC' is turned into the signal SC by a demodulator 14. At the same time, the 1st drop-out detector 17 detects a drop-out and produces a drop- out detection pulse DO. This pulse DO is added with the signal SC and turned into the original time base by an expander 15. Then the time base is supplied to a drop-out detecting circuit 30 for output of a drop-out pulse DO'. Thus the signals are compensated in the drop-out sections of signals (R-Y) and (B-Y).

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