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51. 发明专利

JPS6246566A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6246566A
公开(公告)日：1987-02-28
申请号：JP18581585
申请日：1985-08-26
申请人： NEC CORP
发明人： BABA TOSHIO
IPC分类号： H01L29/205 , H01L21/331 , H01L29/20 , H01L29/73 , H01L29/737
摘要： PURPOSE:To enable operation at high speed by removing restrictions to a semiconductor material, preventing the formation of a hetero-interface, eliminating a problem annexed to the hetero-interface and extremely reducing parasitic capacitance and capacitance. CONSTITUTION:A collector layer 8 consisting of a degenerating semiconductor having one conduction type, a collector depletion layer 9 composed of a semiconductor hardly containing an impurity, an emitter depletion layer 10 consisting of a semiconductor hardly containing an impurity and an emitter layer 11 composed of a degenerating semiconductor having the same conduction type as the collector layer 9 are laminated. Since the emitter layer 11 and the collector layer 8 are degenerated, Fermi levels Ef in these layers penetrate at several hundred meV in a conduction band. Consequently, forbidden band width is widened effectively in these layers, and these layers function as a semiconductor having forbidden band width wider than a base layer. Since each layer can be constituted of the same semiconductor material, lattice-matched semiconductor materials having different forbidden band width need not be obtained, and said method can be applied to all semiconductor materials.

52. 发明专利

JPS61230381A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61230381A
公开(公告)日：1986-10-14
申请号：JP7216385
申请日：1985-04-05
申请人： NEC CORP
发明人： BABA TOSHIO , OHATA KEIICHI , OGAWA MASAKI
IPC分类号： H01L29/812 , H01L21/338 , H01L29/778 , H01L29/80
摘要： PURPOSE:To give extremely large mutual conductance in the same manner as a bipolar transistor, and to enable superspeed operation by controlling two- element electrons formed on the interface between a first semiconductor layer and a second semiconductor layer by holes injected onto the interface between the second semiconductor and the first semiconductor from a third semiconductor layer. CONSTITUTION:A high-purity InP layer 2 in 1mum thickness is grown on a semi- insulating InP substrate 1, and an N-AlInAs layer containing an Si impurity of 1X100 cm and having 300Angstrom thickness and a P -AlInAs layer 9 containing a Be impurity of 3X10 cm and having 100Angstrom thickness are grown in succession. Al is evaporated, Al is patterned to form a gate electrode 5, the unnecessary P -AlInAs layer 9 is removed while using the gate electrode 5 as a mask, and source and drain electrodes 6, 7 consisting of AuGe/Au are evaporated and alloyed, thus completing a transistor. Accordingly, a semiconductor device, the degree of integration thereof is easily improved and the whole system thereof can be operated at superspeed, is acquired.

53. 发明专利

JPS61230379A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61230379A
公开(公告)日：1986-10-14
申请号：JP7215485
申请日：1985-04-05
申请人： NEC CORP
发明人： BABA TOSHIO , OGAWA MASAKI
IPC分类号： H01L29/812 , H01L21/338 , H01L29/778 , H01L29/80
摘要： PURPOSE:To provide large mutual conductance, and to enable ultraspeed operation by controlling two-element electrons formed on the interface between a first semiconductor layer and a second semiconductor layer by holes injected onto the interface between the second semiconductor and a third semiconductor from a fourth semiconductor layer. CONSTITUTION:A high-purity GaAs layer 2 in 1mum thickness is grown on a semi-insulating GaAs substrate 1, and a high-purity AlAs layer 8 in 20Angstrom thickness, an N-Al0.4Ga0.6As layer 9 containing an Si impurity of 1X10 cm and having 300Angstrom thickness and a P -Al0.4Ga0.6As layer 10 containing a Be impurity of 3X10 cm and having 100Angstrom thickness are grown. Al is evaporated and patterned to form a gate electrode 5, unnecessary P -Al0.4Ga0.6As is removed while the gate electrode 5 is used as a mask, and a source 6 and a drain electrode 7 consisting of AuGe/Au are evaporated and alloyed, thus completing a transistor. Accordingly, a semiconductor device, the degree of integration thereof is easily improved and the whole system thereof can be operated at superspeed, is acquired.

54. 发明专利

JPS61187373A FIELD EFFECT TRANSISTOR 失效
公开(公告)号：JPS61187373A
公开(公告)日：1986-08-21
申请号：JP2786485
申请日：1985-02-15
申请人： NEC CORP
发明人： OGAWA MASAKI , BABA TOSHIO
IPC分类号： H01L29/812 , H01L21/338 , H01L29/08 , H01L29/205 , H01L29/778
摘要： PURPOSE:To enable a high speed operation by providing the second reverse conductive type semiconductor region in contact with the source electrode direction of a channel, and providing the third high resistance semiconductor in contact with the gate electrode direction of the channel. CONSTITUTION:A high resistance Al0.7Ga0.3As layer 12, a low resistance N-type GaAs layer 14, and a gate electrode 19 are laminated on a channel 13 of the surface of a high resistance GaAs 11. A low resistance N-type Al0.2Ga0.8As region 15 is provided in contact with a source electrode 17 direction of the channel 13, and a low resistance N-type GaAs region 16 is provided in contact with a drain electrode 18 direction. Electrons from the electrode 17 pass the region 15, are accelerated abruptly by the potential difference between the region 15 and the channel 13, and discharged into the channel 13. Thus, the channel 13 is moved at a high speed without scattering in a grating to arrive at the electrode 18.

55. 发明专利

JPS5978911A Forming device of hot silicon nitride film 失效
标题翻译：热硅胶膜的成型装置
公开(公告)号：JPS5978911A
公开(公告)日：1984-05-08
申请号：JP18701382
申请日：1982-10-25
申请人： Nec Corp
发明人： BABA TOSHIO
IPC分类号： C23C16/34 , C01B21/068 , H01L21/318
摘要： PURPOSE: To provide a titled device which enables the formation of a uniform and thick hot silicon nitride film by providing a hollow jig for decomposing a nitrogen compound between a material to be nitrided placed in a reaction tube and an ejection port for reactive gas.
CONSTITUTION: A material 11 to be nitrided such as a silicon wafer is placed on a susceptor 2, and is set in a reaction tube 31. The inside of the tube 31 is evacuated and NH
3 is introduced therein to maintain the atmosphere contg. virtually neither oxygen nor water in the tube 31. The material 11, the susceptor 2 and a nitrogen compd. decomposing jig 8 are heated by a heater such as an IR lamp 71. The NH
3 ejected from a gas introducing port 41 is decomposed on the surface of the jig 8. The decomposed nitridable material diffuses easily in the formed Si
3 N
4 film and arrives at the boundary between the Si
3 N
4 film and silicon thus forming the Si
3 N
4 film by reacting with the silicon. The growth of the hot silicon nitride film is thus easily progressed.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：提供一种标题装置，其通过提供用于在放置在反应管中的待渗氮材料和反应性气体喷射口之间分解氮化合物的中空夹具来形成均匀且厚的热氮化硅膜。构成：将诸如硅晶片的氮化材料11放置在基座2上，并设置在反应管31中。将管31的内部抽真空并将NH 3引入其中以保持气氛不受限制。管31中几乎不含氧和水。材料11，基座2和氮化合物。分解夹具8由诸如IR灯71的加热器加热。从气体引入口41排出的NH 3在夹具8的表面上分解。分解的可氮化材料容易在形成的Si 3 N 4膜中扩散并到达边界在Si 3 N 4膜和硅之间，从而通过与硅反应形成Si 3 N 4膜。因此，热氮化硅膜的生长容易进行。

56. 发明专利

JPS5975675A Method for formation of gate electrode 失效
标题翻译：门电极形成方法
公开(公告)号：JPS5975675A
公开(公告)日：1984-04-28
申请号：JP18701482
申请日：1982-10-25
申请人： Nec Corp
发明人： BABA TOSHIO
IPC分类号： H01L29/417 , H01L29/80
CPC分类号： H01L29/80
摘要： PURPOSE:To form a highly accurate gate electrode by a method wherein the aperture part of the gate electrode region formed on the first insulating film located on a semiconductor layer and the region other than the side face of the aperture part of the second insulating film formed on the whole surface, including the side face of the aperture part of the gate electrode region, is removed and a gate electrode is formed on the surface of the semiconductor layer which is exposed at the aperture part and the regions including the surface of the first insulating film located on the circumferenced of the aperture. CONSTITUTION:An N type GaAs layer 2 is formed on a semiinsulative GaAs substrate 1 as a semiconductor layer, the first insulative film 6 is provided on said layer 2, the first insulating film 6 is provided thereon, and an aperture is provided by performing a selective etching on the region where a gate electrode will be formed. Then, the second insulating film 7 is formed on the surface of the N type GaAs layer 2 and the surface of the insulating film 6. Subsequently, the insulating film 7 located on the part other than the side face of the first insulating film 6 is removed by performing a dry etching having a high degree of directivity. Then, the first metal layer 3 is formed on the surface of the insulating films 6 and 7 and the N type GaAs layer 2, and an etching is performed on a metal film 3 and the insulating film 6 using the photoresist film 4 formed on the film 3 as a mask. Then, after a metal film 5 has been formed on the surface of the N type GaAs layer 2 and the photoresist layer 4, the photoresist film 4 and the metal film 5 formed thereon are removed.
摘要翻译：目的：通过以下方法形成高精度的栅极电极：其中形成在位于半导体层上的第一绝缘膜上的栅电极区域的开口部分和除第二绝缘膜的开口部分的侧面以外的区域形成在包括栅极区域的开口部分的侧面的整个表面上被去除，并且在半导体层的暴露在开口部分的表面上形成栅电极，并且包括第一绝缘膜位于孔径的圆周上。构成：在作为半导体层的半绝缘GaAs衬底1上形成N型GaAs层2，在所述层2上设置第一绝缘膜6，在其上设置第一绝缘膜6，并且通过执行孔在将形成栅电极的区域上进行选择性蚀刻。然后，在N型GaAs层2的表面和绝缘膜6的表面上形成第二绝缘膜7.随后，位于除了第一绝缘膜6的侧面以外的绝缘膜7是通过执行具有高度定向性的干蚀刻来去除。然后，在绝缘膜6和7的表面上形成第一金属层3和N型GaAs层2，并且使用形成在绝缘膜6上的光致抗蚀剂膜4对金属膜3和绝缘膜6进行蚀刻电影3作为面具。然后，在N型GaAs层2和光致抗蚀剂层4的表面上形成金属膜5之后，除去形成在其上的光致抗蚀剂膜4和金属膜5。

57. 发明专利

JPS5771806A Forming method of nitrided film 失效
标题翻译：硝酸盐膜的形成方法
公开(公告)号：JPS5771806A
公开(公告)日：1982-05-04
申请号：JP14520280
申请日：1980-10-17
申请人： Nec Corp
发明人： HOGARI YASUAKI , BABA TOSHIO
IPC分类号： C23C16/34 , C01B21/068 , H01L21/318
摘要： PURPOSE: To form a thin nitrided film of good quality, having improved electrical characteristics, by heat-treating a silicon compound in an atmosphere containing a nitrogen compound.
CONSTITUTION: A silicon compound 5, e.g. crystalline or amorphous silicon, platinum silicide, or molybdenum silicide, mounted on a boat 4 is inserted in an oven (reactor) core tube 1 having a gas introductory port 11 on one end and an oven (reactor) core cap 2 having a gas discharge port 21 on the other end. Ar or H
2 gas containing a gas of a nitrogen compound, e.g. ammonia, or a vapor of a liquid or solid nitrogen compound is then introduced from the introductory port 11 into the oven core tube 12 and heat-treated by a heating element 6 at 1,000W1,200°C to form a nitrided film on the surface of the silicon compound 5.
COPYRIGHT: (C)1982,JPO&Japio
摘要翻译：目的：通过在含氮化合物的气氛中对硅化合物进行热处理，形成质量好的薄膜，具有改善的电特性。构成：硅化合物5，例如将安装在船4上的晶体或非晶硅，硅化铂或硅化钼插入到具有一端的气体导入口11和具有气体放电的炉（反应器）芯帽2的烘箱（反应器）芯管1中另一端的21口。含有氮化合物的气体的Ar或H 2气体，例如然后将氨或液体或固体氮化合物的蒸气从引入口11引入烘箱芯管12中，并在1,000-1200℃下由加热元件6进行热处理，以在表面上形成氮化膜的硅化合物5。

58. 发明专利

JPS5754332A Forming method for thermonitride silicon film 失效
标题翻译：空值
公开(公告)号：JPS5754332A
公开(公告)日：1982-03-31
申请号：JP13050280
申请日：1980-09-19
申请人： Nec Corp
发明人： BABA TOSHIO , HOGARI YASUAKI
IPC分类号： H01L21/318
CPC分类号： H01L21/3185
摘要： PURPOSE:To prevent O2 from mixing in a nitride film by conducting a pretreatment process wherein Si is heated in an evacuated reaction pipe, heating the Si in the atmosphere of N2 or nitrogeneous compound gas and thereby forming a thermonitride film. CONSTITUTION:The reaction pipe having a packing 8 whereby the closensess of contact between a core pipe 3 and cap 5 is made excellent is filled up with inert gas. An Si wafer is put in the reaction pipe and, the degree of vacuum of the pupe being raised to 10 Torr approximately, it is heated for 1-2hr at a temperature causing no oxidation by oxidizing adsorbed substances, whereby the adsorbed substances on the surface thereof is removed. Next, ater the wafer is heated preliminarily up to 900-1,300 deg.C, nitrogen gas is introduced and the thermonitride Si film is formed on the wafer 1. Since O2 is prevented from mixing in the nitride film nearly completely by this constitution, the thermonitride film having an excellent quality is obtained.
摘要翻译：目的：通过进行在真空反应管中加热Si的预处理工艺，在氮气气氛中加热Si或氮化合物气体，从而形成热氮化物膜，以防止O 2在氮化物膜中混合。构成：具有密封件8的反应管被填充有惰性气体，由此使芯管3和盖5之间的接触不紧密。将Si晶片放入反应管中，将瞳孔的真空度近似升高至10 -6乇，在不会氧化吸附物质的温度下加热1-2小时，由此吸附去除其表面上的物质。接下来，将晶片预先加热到900-1300℃，引入氮气，并且在晶片1上形成热氮化硅Si膜。由于通过这种结构，几乎完全不能将氧化物混合在氮化膜中，得到具有优良品质的高温氮化物膜。

59. 发明专利

JPH07231085A TUNNEL TRANSISTOR AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JPH07231085A
公开(公告)日：1995-08-29
申请号：JP2072294
申请日：1994-02-18
申请人： NEC CORP
发明人： BABA TOSHIO , UEMURA TETSUYA
IPC分类号： H01L29/68 , H01L29/06 , H01L29/78 , H01L29/86
摘要： PURPOSE:To provide a transistor utilizing tunnel phenomenon which can be highly integrated, speeded up, and multi-functional. CONSTITUTION:The item is provided with a first semiconductor 2 of one conductivity type, a separation layer 3 consisting of a low-impurity concentration semiconductor, and a degenerated second semiconductor 4 with a conductivity type opposite to that of the first semiconductor 2 on a substrate 1. Therefore, a degenerated third semiconductor 5 with the same conductivity type as that of the first semiconductor 2, an insulation layer 6 consisting of a material with a wider forbidden band than that of the third semiconductor 5, and a gate electrode 7 on the insulation layer 6 are provided on the exposed surface of the second semiconductor 4 from the first semiconductor 2 and a ohmic junction is formed on the first semiconductor 2 and the second semiconductor 4 in a drain electrode 8 and a source electrode 9.

60. 发明专利

JPH06177367A TUNNEL TRANSISTOR 失效
公开(公告)号：JPH06177367A
公开(公告)日：1994-06-24
申请号：JP32904692
申请日：1992-12-09
申请人： NEC CORP
发明人： BABA TOSHIO
IPC分类号： H01L29/68 , H01L29/80
摘要： PURPOSE:To provide a tunnel transistor, which is suitable for a miniaturization and is capable of obtaining a low-voltage operation, a high current density and differential negative resistance characteristics. CONSTITUTION:A tunnel transistor consists of a semiconductor channel layer (an i-type GaAs layer) 3 on an insulating region, such as an i-type Al0.5Ga0.5As layer 2, on the surface of a GaAs substrate 1, first and second semiconductor layers (n and p GaAs layers) 4a and 5a, which are suituated on the surface of the layer 3 and respectively have different conductivity types, an insulating layer (an i-type Al0.5Ga0.5As layer) 6 which is suituated between the layers 4a and 5a, a gate electrode 7 on the layer 6 and source and drain electrodes 8 and 9. High-concentration carriers generated from the respective layers 4a and 5a exist in the layer 3 under the layers 4a and 5a and carriers of the same conductivity type as that of a source are induced in the layer 3 under the electrode 7. As a result, a tunnel junction is formed between the layer 3 under the gate electrode and the layer 3 under the layer 5a. As this tunnel junction is formed in a single layer, the tunnel transistor only a few generation- recombination centers and has remarkable differential negative resistance characteristics.

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