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    • 51. 发明专利
    • Receiver
    • 接收器
    • JPS59207748A
    • 1984-11-24
    • JP8086983
    • 1983-05-11
    • Hitachi Ltd
    • IENAKA MASANORI
    • H04B1/10
    • H04B1/10
    • PURPOSE:To surely prevent radio interference, by selectively passing modulated signals appearing in the upper and lower side bands of an intermiediate frequency signal in correspondence to the presence absence of a disturbing wave. CONSTITUTION:When an interfering broadcasting frequency is low as compared with a desired receiving frequency, influences of the interference appear in a lower side band frequency signal fd and less influences appear in an upper side band frequency signal fu. Therefore, a switch SW1 is changed over to a fixed contact (a) and only the signal fu is supplied to a detecting circuit 6. In case where the interfering frequency is high, the switch SW1 is changed over to another fixed contact (b) and the lower side band frequency signal fd having less influences of interference is supplied to the circuit 6. Therefore, disturbing waves due to interference in sound signals obtained from a loudspeaker SP can be prevented.
    • 目的:为了确保防止无线电干扰,通过选择性地通过出现在中间频率信号的上下边带中的调制信号对应于干扰波的存在而不存在。 构成:当干扰广播频率与期望的接收频率相比较低时,干扰的影响出现在较低频带频率信号fd中,较少的影响出现在上边带频率信号fu中。 因此,开关SW1切换到固定触点(a),只有信号fu被提供给检测电路6.在干扰频率高的情况下,开关SW1切换到另一个固定触点(b) 并且具有较小的干扰影响的下侧频带频率信号fd被提供给电路6.因此,可以防止由于从扬声器SP获得的声音信号的干扰引起的干扰波。
    • 53. 发明专利
    • Detector
    • 探测器
    • JPS5974711A
    • 1984-04-27
    • JP18458282
    • 1982-10-22
    • Hitachi Ltd
    • IENAKA MASANORI
    • H03D3/06H03D3/18
    • H03D3/18
    • PURPOSE:To delay the 1st input signal is response to the delay of the 2nd input signal of a multiplier and to obtain a detection output which is free from distorsions, by constituting an FM detector with a phase shifting capacitor, a tuning circuit and a multiplier and providing an integration circuit at the 1st signal input terminal of the multiplier. CONSTITUTION:A quadrature detecting circuit 6 is provided with a phase shifting capacitor C11, a coil L11 forming a tuning circuit, a capacitor C12 and a multiplier consisting of transistors TRQ1-Q6. This circuit 6 is set at the output side of an IF circuit 5 of an FM receiver, a TV receiver, etc. The 1st and 2nd integration circuits consisting of resistances R11 and R12 and base-emitter capacitors CBE1 and CBE2 of TRQ1 and TRQ2 are provided at the 1st signal input terminal of the circuit 6. These integrated circuits set a +90 deg. phase shift between the voltage applied to the bases of TRQ1 and TRQ2 and the voltage to be applied to the bases of TRQ3 and TRQ4 from a tuning circuit. Then the correspondence is secured between the 1st and 2nd input signals of the multiplier. Thus it is possible to obtain a detection output free from distortions.
    • 目的:延迟第一输入信号是对乘法器的第二输入信号的延迟进行响应,并且通过构成具有相移电容器的FM检波器,调谐电路和乘法器来获得没有变化的检测输出 并在乘法器的第一信号输入端提供积分电路。 构成:正交检测电路6具有移相电容器C11,形成调谐电路的线圈L11,电容器C12以及由晶体管TRQ1〜Q6构成的乘法器。 该电路6设置在FM接收机,TV接收机等的IF电路5的输出侧。由电阻R11和R12构成的第一和第二积分电路以及TRQ1和TRQ2的基极 - 发射极电容器CBE1和CBE2分别是 设置在电路6的第一信号输入端。这些集成电路设置+90度。 施加到TRQ1和TRQ2的基极的电压与施加到来自调谐电路的TRQ3和TRQ4的基极的电压之间的相移。 然后确保乘法器的第1和第2输入信号之间的对应关系。 因此,可以获得没有失真的检测输出。
    • 54. 发明专利
    • FM MULTIPLEX DEMODULATING CIRCUIT
    • JPS58129852A
    • 1983-08-03
    • JP419983
    • 1983-01-17
    • HITACHI LTD
    • IENAKA MASANORISUZUKI YUKIROU
    • H03D1/22H04H1/00H04H40/63
    • PURPOSE:To reduce variation of amplitude values of a left and a right demodulation output or variation in its output DC level, by providing a resistance for separation degree adjustment between output terminals of a couple of negative feed back amplifying circuits for amplifying the left and right demodulation outputs. CONSTITUTION:Between both output terminals of the negative feedback amplifying circuits 2 and 4, the resistance R30 for separation degree adjustment is provided. Consequently, a left-side demodulation and amplification output is attenuated by resistances R30, R29, and R26 and transmitted to the emitter of the transistor (TR) Q23 of the negative feedback amplifying circuit 4. To the base and emitter of the TRQ23, a leakage signal and the left demodulation and amplification output are applied in inphase relation to obtain only the left demodulation output of the TRQ23, and the output is amplified by TRs Q24 and Q25 to obtain a left-side demodulation and amplification output with a high separation degree from the collector of an amplifying TRQ25 eventually.
    • 55. 发明专利
    • BROADCAST RECEIVER
    • JPS5850832A
    • 1983-03-25
    • JP14789081
    • 1981-09-21
    • HITACHI LTD
    • IENAKA MASANORIIGUCHI SHINSUKE
    • H04B1/16G08G1/09
    • PURPOSE:To listen to traffic information, earthquake information, etc., conveniently by detecting a desired discrimination signal, transferring channel selection information on the switching of a channel selecting circuit or the other channel selecting circuit to one channel selecting circuit, and automatically listening to a desired broadcast program. CONSTITUTION:When there are plural discrimination signals for a broadcast band, a discrimination signal detecting circuit I/DET detects one discrimination signal through a control circuit CONT by the designation of a listener. When the designated discrimination signal is detected, the circuit CONT stops the sweeping operation of the other tuner circuit TUNER2 immediately and controls a switch SW to perform switching to the listening of a broadcast program including a discrimination signal received by the other circuit TUNER2. When the discrimination signal is ceased by the ending of the broadcast program, the circuit CONT controls the switch SW to perform switching to normal broadcast reception by one circuit TUNER1.
    • 56. 发明专利
    • LEVEL DETECTING CIRCUIT
    • JPS57192141A
    • 1982-11-26
    • JP7654781
    • 1981-05-22
    • HITACHI LTD
    • IENAKA MASANORI
    • H04B1/16H03J1/02H03J3/14
    • PURPOSE:To reduce the dispersion in detecting efficiency and to obtain a detected output with high accuracy, by applying a prescribed bias to the base of an input transistor (TR) in Darlington connection and input signals of phase opposite to each other to emitters of the output stage TRs respectively. CONSTITUTION:An input signal Vi is inputted to a 3-stage IF amplifier limiter and amplified through amplifiers 1st Amp-3rd Amp, and an IF output signal V0 is inputted to an FM detecting circuit FMDET. Level detecting circuits BTE1- BET3 connected to the amplifiers 1st Amp-3rd Amp are provided with two sets of TRs Q1 and Q2, and Q3 and Q4 in Darlington connection, a prescribed bias voltage is applied to the base of the TRs Q1 and Q3 at the input side and the emitters of the TRs Q2 and Q4 at the output side are connected in common. Input signals of opposite phase are applied to the emitter of the TRs Q1 and Q3 and the base of the TRs Q2 and Q4 via capacitors C1 and C2 and a detected signal is outputted from the collector of the TRs Q1-Q4 or the emitter of the TRs Q2 and Q4 in common connection.
    • 57. 发明专利
    • FM MULTIPLEX DEMODULATING CIRCUIT
    • JPS57164633A
    • 1982-10-09
    • JP3955182
    • 1982-03-15
    • HITACHI LTD
    • IENAKA MASANORISUZUKI YUKIROU
    • H03D1/22H04H1/00H04H40/45H04H40/72
    • PURPOSE:To reduce a large detection output and the variance of the detection output, by connecting a capacitor for deemphasis of the detection output signal between the output terminal of each negative feedback amplifying circuit and the negative feedback terminal. CONSTITUTION:A double balanced synchronous detecting circuit consisting of transistors TRs Q1-Q6 and resistances R1-R6 has load resistances R1 and R2 formed in a semiconductor integrated circuit indicated by the broken line of figure. Composite signals are applied to TRs Q1 and Q2, and switching signals of 38KHz are applied to TRs Q3-Q6. The detection output of this detecting circuit is amplified by a negative feedback differential amplifying circuit formed in the integrated circuit and is outputted to output pins 3 and 5 through an emitter follower output circuit. Resistances R11 and R12 attached externally to a power supply terminal 1, a feedback terminal 2, and an output terminal 3 are DC device resistances, and a capacitor C2 is a deemphasis capacity, and a series circuit consisting of a resistance R13 and a capacitor C1 constitutes an AC feedback circuit.
    • 58. 发明专利
    • FM RADIO RECEIVER
    • JPS5787637A
    • 1982-06-01
    • JP16327180
    • 1980-11-21
    • HITACHI LTD
    • WATANABE KAZUOIENAKA MASANORI
    • H04H1/00H04H40/72H04H5/00
    • PURPOSE:To improve the distortion factor, by decreasing the output impedance of a signal supply circuit with an emitter follower output circuit and preventing the generation of an AC signal voltage. CONSTITUTION:A main switching circuit 20 is constituted of a transistor (TR) Q1 to the base of which a stereo composite signal Vcomp is applied, differential switching TRs Q2, Q3, the composite signal and a switching signal in 38kHz are multiplied to obtain stereo demodulation outputs OUT1, OUT2 for left and right channels. To improve the cross talk of the main switching circuit 20, a subswitching circuit 21 consisting of TRs Q4, Q5, Q6 is provided. A signal proportional to the input signal level is obtained by a detection circuit 23 and the output impedance of a signal supply circuit 22 to change the switching signal level in 38kHz is decreased by an emitter follower output circuit consisting of TRs Q7- Q9, allowing to deteriorate the signal distortion.
    • 59. 发明专利
    • Receiver
    • 接收器
    • JPS5763911A
    • 1982-04-17
    • JP13880380
    • 1980-10-06
    • Hitachi Ltd
    • IENAKA MASANORI
    • H04B1/16H03G1/00H03G3/20H03G3/30
    • H03G1/0023
    • PURPOSE:To improve senitivity and high input signal characteristics by switching the impedance of a transistor, constituting an RF amplification stage, by a switching means controlled on the basis of the difference between a prescribed constant current and an AGC signal. CONSTITUTION:During the reception of a low input signal, an AGC current from a transistor TRQ10 is less than a constant current generated by a TRQ3, so a bias current corresponding to their difference flows through a TRQ2'. Therefore, the TRQ2' turns on to perform amplifying operation with the emitter grounded via a capacitor C105, improving the sensitivity. During the reception of an intermediate signal or greater, the AGC current becomes greater than the constant current generated by the TRQ3, so the TRQ2' turns off to give effect to amplifying operation by an amplifying TRQ1 having a resistance R1 at its emitter. During the reception of a high input signal, the collector potential of a TRQ10 rises as the AGC current increases, and the conductivity of a differential TRQ5 increases, thereby performing gain limiting operation by the differential TRs Q4 and Q5.
    • 目的:通过基于规定的恒定电流和AGC信号之间的差异来控制的开关装置,通过切换构成RF放大级的晶体管的阻抗来提高灵敏度和高输入信号特性。 构成:在接收低输入信号期间,来自晶体管TRQ10的AGC电流小于由TRQ3产生的恒定电流,因此与其差异相对应的偏置电流流过TRQ2'。 因此,TRQ2'导通,通过电容器C105接地的发射器进行放大操作,提高灵敏度。 在接收到中间信号或更大的中间信号时,AGC电流变得大于由TRQ3产生的恒定电流,因此TRQ2'关断以通过在其发射极具有电阻R1的放大TRQ1来实现放大操作。 在高输入信号的接收期间,随着AGC电流的增加,TRQ10的集电极电位上升,并且差分TRQ5的电导率增加,从而通过差分TRs Q4和Q5进行增益限制操作。
    • 60. 发明专利
    • Fm receiver
    • FM接收器
    • JPS5738038A
    • 1982-03-02
    • JP11350780
    • 1980-08-20
    • Hitachi Ltd
    • IENAKA MASANORI
    • H04B1/10H04B1/16H04H1/00H04H40/63H04H40/72
    • H04H40/63H04B1/1646H04H40/72
    • PURPOSE:To increase the S/N by making the changeover of stereo/monaural according to the reception state of broadcast waves, through the provision of a variable low-pass filter at the input side of a stereo demodulation circuit and the operation of a PLL circuit with a composite signal not passing through the variable low-pass filter. CONSTITUTION:A stereo signal received at an antenna 24 is applied to an FM intermediate frequency processing IC1 via an amplifier 25, mixer 26 and filter 28. When a sufficent input is obtained, voltage is applied to a signal supply circuit 22 of a semiconductor integrated circuit IC2 for FM stereo demodulation from the terminal 13 at the output side of a tuning meter driving circuit 38, and high level 38kHz switching signal is applied to stereo demodulation circuits 20, 21 for stereo reproduction. When an input level is lowered, a 38kHz signal is lowered to decrease the separation. When the input further decreases, an audio amplifier 41 is interrupted with an audio muting controlling amplifier 43 to stop the reproduction of voice.
    • 目的:通过根据广播波的接收状态进行立体声/单声道的切换来增加S / N,通过在立体声解调电路的输入侧提供可变低通滤波器和PLL的操作 电路与复合信号不通过可变低通滤波器。 构成:通过放大器25,混频器26和滤波器28将在天线24接收的立体声信号施加到FM中频处理IC1。当获得足够的输入时,电压被施加到半导体集成的信号提供电路22 来自调谐表驱动电路38的输出侧的端子13进行FM立体声解调的电路IC2和高电平38kHz的开关信号被施加到用于立体声再现的立体声解调电路20,21。 当输入电平降低时,38kHz信号降低以减小分离。 当输入进一步减小时,音频放大器41被音频静音控制放大器43中断,以停止语音的再现。