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51. 发明专利

JPS63158921A AMPLITUDE EQUALIZER 失效
公开(公告)号：JPS63158921A
公开(公告)日：1988-07-01
申请号：JP30747086
申请日：1986-12-22
申请人： FUJITSU LTD
发明人： SUZUKI TOSHIAKI , NISHIMURA AKIRA
IPC分类号： H04B3/04 , H04B7/005
摘要： PURPOSE:To flatten a frequency delay characteristic and to obtain a large frequency amplitude characteristic with simple constitution, by connecting a minimum phase transition circuit to a nonminimum phase transition circuit in series. CONSTITUTION:The titled amplitude equalizer is constituted by connecting the minimum phase transition circuit 1 to the non-minimum phase transition circuit 2. The circuit 1 delays a signal on one side of bi-sected input signal and the signal on the other side by a delay element 11, and furthermore, synthesizes them with the signal attenuated by an attenuator 12 through a synthesizer 13, then, generates an output. The circuit 2 synthesizes the signal in which the signal on one side of the bi-sected input signal is attenuated by an attenuator 14 with the signal in which the signal on the other side is delayed by a delay element 15 through a synthesizer 16, then, generates the output. In such a way, a delay characteristic is offset and is flattened in the output, and only an amplitude characteristic is added. Therefore, by setting each constant so as to set a characteristic to be equalized as a reverse characteristic appropriately, it is possible to obtain a desired equalization characteristic.

52. 发明专利

JPS61167514A TRANSFER MOLD 失效
公开(公告)号：JPS61167514A
公开(公告)日：1986-07-29
申请号：JP27632784
申请日：1984-12-28
申请人： FUJITSU LTD
发明人： SUZUKI TOSHIAKI
IPC分类号： H01L21/56 , B29C45/02 , B29C45/14 , B29C45/26 , B29K101/10 , B29L31/34
摘要： PURPOSE:To reduce occurrence of voids in cavities and to make possible increase of the yield of products by providing dummy cavities into which resin flows through gates from before the positions connected with runner cavities. CONSTITUTION:Molding resin P is supplied to the cull 2 of a transfer mold 1 provided with dummy cavities 5a to pour resin through gates 4a from before the positions where resin passages or runners 3 are connected with cavities 5. Then, sequentially by introducing this molding resin P into runners 3, gates 4a, dummy cavities 5a, gates 4, cavities 5, occurrence of voids 7 in the cavities 5 is reduced remarkably. When products are taken out, the resin P does not remain in the mold 1 and no trouble occurs to the following molding to improve the yield of the products.

53. 发明专利

JPS60191530A Fading equalizing system 失效
标题翻译：渐变均衡系统
公开(公告)号：JPS60191530A
公开(公告)日：1985-09-30
申请号：JP4781484
申请日：1984-03-13
申请人： Fujitsu Ltd
发明人： SUZUKI TOSHIAKI
IPC分类号： H04B3/06 , H04B7/005 , H04B7/08
CPC分类号： H04B7/005 , H04B7/0845
摘要： PURPOSE:To prevent the deterioration of the S/N in a resonance type equalizer by bringing the detection output of the lowest level in detected outputs of a space diversity synthesizing section output to a prescribed level. CONSTITUTION:Signals a, b from a main antenna and a sub-antenna are inputted respectively to main-and sub-receivers 101, 102 in a space diversity section 1, converted into IF signals (c), (d) and inputted respectively to a hybrid HYB1 and an endless phase shifter 103. A signal (e) subjected to phase shift 103 is synthesized (104) with the signal (c), becomes a signal (f), which passes through a BPF 105, is amplified to a prescribed level by an AGCAMP1 106, outputted to a resonance type equalizer 2 and also inputted to a 3-wave detector 107. The detector 107 inputs detected outputs j, k, l of the center frequency fm, both end frequencies fl, fh in the band to a controller 108 and a comparator selection device 109. The controller 108 controls the phase shifter 103 so that the deviation of the signals j, k, l is decreased, a selection unit 109 selects the signal of the minimum level in the input signal to control the AMP 106. The equalizer 2 makes the level in the band flat.
摘要翻译：目的：通过将空间分集合成部的检测输出中的最低电平的检测输出输出到规定的电平来防止谐振型均衡器中的S / N的劣化。构成：将主天线和副天线的信号a，b分别输入到空间分集部1中的主接收机101和子接收机102，分别转换为中频信号（c），（d），分别输入混合HYB1和环形移相器103.通过信号（c）合成经受相移103的信号（e）（104），变成通过BPF105的信号（f）被放大到输出到谐振型均衡器2并且还输入到3波检测器107.检测器107输入检测到的中心频率fm的输出j，k，l，两个终端频率f1，fh在频带到控制器108和比较器选择装置109.控制器108控制移相器103，使得信号j，k，l的偏差减小，选择单元109选择输入信号中的最小电平的信号以控制AMP 106.均衡器2使带中的电平平坦。

54. 发明专利

JPS6018011A AUTOMATIC GAIN CONTROL AMPLIFYING STAGE 失效
公开(公告)号：JPS6018011A
公开(公告)日：1985-01-30
申请号：JP12565683
申请日：1983-07-11
申请人： FUJITSU LTD
发明人： SUZUKI TOSHIAKI
IPC分类号： H03G3/30 , H03G3/00 , H03G3/20
摘要： PURPOSE:To secure a stable operation for gain control regardless of the output level by setting a gain controller between an output stage and a detecting circuit to keep the signal impressed to the detecting circuit at a fixed level. CONSTITUTION:Signal amplifying stages AMP1-AMP5 are connected to each other in cascade via variable attenuators ATT1-ATT4. The output of the AMP5 is supplied to a detecting circuit DT via a variable resistor RV1 which controls the gain and an AMP6. The output of the DT is supplied to a control circuit CTL via a DC amplifier DCA. The circuit CTL controls attenuators ATT1-ATT5 and keeps the output of the AMP5 at a prescribed level. For instance, the gain of lthe AMP6 is increased to set the input to the DT at about the same level as the conventional input in case the output of the AMP5 is set at a level lower than the convertional input. Since the input level of DT is kept at a fixed level the automatic gain control is possible with stability by the circuit CTL regardless of the output level of the AMM5.

55. 发明专利

JPS58168113A CONSTANT VOLTAGE CIRCUIT 失效
公开(公告)号：JPS58168113A
公开(公告)日：1983-10-04
申请号：JP5006882
申请日：1982-03-30
申请人： FUJITSU LTD
发明人： SUZUKI TOSHIAKI
IPC分类号： G05F1/56 , G05F1/565
摘要： PURPOSE:To make an input voltage at a load side constant at all times, by applying a base current of a transistor (TR) connected in series with a load to a constant voltage diode and changing the reference voltage corresponding to the fluctuation of a load current. CONSTITUTION:The reference voltage inputted to a differential amplifier DA is obtained by resistors R4 and R5, which are connected in series between the collector of the TR2 and the ground, and by the connecting point between resistors R4 and R5 corresponding to a Zener diode ZD. The reference voltage depends on the base current of a TR1, which is proportional to a load current of a constant voltage current, then the reference voltage is increased as the load current increases. Thus, a voltage V0 at an output terminal of the constant voltage circuit specified with the reference voltage depends on the load current. Even if the resistive component from the output terminal to the load of the constant voltage circuit is so large enough as not negligible, the voltage drop is compensated.

56. 发明专利

JPS58163229A DC POWER FEEDING CIRCUIT 失效
公开(公告)号：JPS58163229A
公开(公告)日：1983-09-28
申请号：JP4608282
申请日：1982-03-23
申请人： FUJITSU LTD
发明人： SUZUKI TOSHIAKI
IPC分类号： H02J1/00

57. 发明专利

JPS58115784A LAMINATED CONNECTOR FOR FLAT CABLE 失效
公开(公告)号：JPS58115784A
公开(公告)日：1983-07-09
申请号：JP21163481
申请日：1981-12-29
申请人： FUJITSU LTD
发明人： WACHI HIROYUKI , SUZUKI TOSHIAKI
IPC分类号： H01R13/66

58. 发明专利

JP2001184034A LIQUID CRYSTAL DISPLAY DEVICE AND ITS CONTROL METHOD 失效
公开(公告)号：JP2001184034A
公开(公告)日：2001-07-06
申请号：JP2000084770
申请日：2000-03-24
申请人： FUJITSU LTD
发明人： YOSHIDA HIDESHI , TANUMA SEIJI , MAYAMA YOSHIMUNE , INOUE YUICHI , SUZUKI TOSHIAKI , HANAOKA KAZUTAKA , GOTO TAKESHI , KOBAYASHI TETSUYA , OHASHI MAKOTO , YAMAGUCHI HISASHI , TANAKA KATSUNORI , KATAGAWA KOICHI
IPC分类号： G02F1/13363 , G02F1/133 , G02F1/1335 , G02F1/13357 , G02F1/136 , G02F1/1368 , G09F9/00 , G09F9/30 , G09G3/20 , G09G3/34 , G09G3/36
摘要： PROBLEM TO BE SOLVED: To improve quality of a moving image, namely, to decrease the blur, in image to prevent flicker and ghost of the image, etc., concerning a liquid crystal display device and a control method. SOLUTION: This liquid crystal display device and a control method comprises a liquid crystal panel A where signal lines and scanning lines are wired vertically and horizontally and pixel electrodes 5 are arranged vertically and horizontally through switching elements 4 at the intersection parts of the signal lines and the scanning lines, and a control circuit 6 which controls the liquid crystal panel A through the signal lines and the scanning lines and activates the control signals to be transmitted to each scanning line two times during one frame period for displaying one picture, and are characterized in that the liquid crystal panel A is segmented into a 1st pixel area 7 and a 2nd pixel area 8 adjoining the 1st pixel area 7; and that this device writes display data in the 1st pixel area 7 when one of the control signals is activated and writes reset data in the 2nd pixel area 8; writes the reset data in the 1st pixel area 7 when the other of the control signals is activated and writes the display data in the 2nd pixel area 8.

59. 发明专利

JP2000235375A METHOD AND CIRCUIT FOR DRIVING DISPLAY PANEL, AND LIQUID CRYSTAL DISPLAY DEVICE 失效
公开(公告)号：JP2000235375A
公开(公告)日：2000-08-29
申请号：JP21733399
申请日：1999-07-30
申请人： FUJITSU LTD
发明人： HIRAKI KATSUYOSHI , ITO TAKAHIDE , SUZUKI TOSHIAKI , HAYASHIMOTO SEIJI , MIYAHARA DAIKI , MINEMURA TOSHIMITSU , KATAGAWA KOICHI , SEKIDO SATORU
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
摘要： PROBLEM TO BE SOLVED: To provide a drive method and drive circuit of a display panel and a liquid crystal display device capable of preventing flicker from occurring. SOLUTION: A polarity pattern (a polarity pattern signal POL) is stored in a ROM in a polarity pattern control part 32 beforehand. The polarity pattern is changed according to the usage of the liquid crystal display panel. Since the polarity pattern is stored in the ROM, the polarity pattern can be changed without changing hardware. Moreover, two or more sets of polarity patterns are stored in the ROM beforehand, and either of the polarity patterns is outputted according to the usage. Further, the polarity pattern signal POL outputted from the ROM is compared with a picture signal RGB, and the polarity pattern to be read from the ROM is changed according to the result of the comparison.

60. 发明专利

JP2550233B2 失效
公开(公告)号：JP2550233B2
公开(公告)日：1996-11-06
申请号：JP15811291
申请日：1991-06-28
申请人： FUJITSU LTD
发明人： HASEGAWA JUJI , YAMAGUCHI AKYOSHI , SUZUKI TOSHIAKI , SUZUKI MINORU
IPC分类号： H01R4/64 , H05K5/03 , H05K9/00

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