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42. 发明专利

JP2007206139A Method of driving unit circuit, light emitting device and method of driving same, data line driving circuit, and electronic apparatus 审中-公开
标题翻译：驱动单元电路的方法，发光装置及其驱动方法，数据线驱动电路和电子装置
公开(公告)号：JP2007206139A
公开(公告)日：2007-08-16
申请号：JP2006021982
申请日：2006-01-31
申请人： Seiko Epson Corp , セイコーエプソン株式会社
发明人： ISHIGURO HIDETO
IPC分类号： G09G3/30 , G09G3/20 , H01L51/50 , H03M1/06
摘要： PROBLEM TO BE SOLVED: To make a light emitting element emit light at the light quantity correctly meeting the gradation shown by image data regardless of the operating characteristics of a drive transistor. SOLUTION: A measuring potential V1 is determined by measuring a potential Vg of a gate of a drive transistor Tdr while passing a constant current I1 in the route from the source to the drain of the drive transistor Tdr in the diode-connected state of the drive transistor Tdr at the time of driving unit circuits P (PA, PB) equipped with the light emitting element 11 emitting light at the light quantity meeting the level of a drive current Iel and the drive transistor Tdr for supplying the drive current Iel to the light emitting element 11, and on the other hand, a measuring potential V1 is determined by measuring the potential Vg while passing a constant current I2 in the above route. The variation of the operating characteristics of the drive transistor Tdr is corrected based on the set of (I1, V1), (I2, V2) and a data signal Vdata meeting the gradation indicated by image data VDATA and is supplied to the gate of the drive transistor Tdr. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：使得发光元件以正确满足图像数据所示的灰度的光量发光，而与驱动晶体管的工作特性无关。解决方案：通过在二极管连接状态下从驱动晶体管Tdr的源极到漏极的路径中通过恒定电流I1来测量驱动晶体管Tdr的栅极的电位Vg来确定测量电位V1 驱动单元电路P（PA，PB）驱动单元电路P（PA，PB）时的驱动晶体管Tdr的驱动电流Iel的驱动电流Iel的驱动晶体管Tdr以及驱动晶体管Tdr的驱动电流Iel 发光元件11，另一方面，通过在上述路径中通过恒定电流I2的同时测量电位Vg来确定测量电位V1。基于（I1，V1），（I2，V2）和满足由图像数据VDATA指示的灰度的数据信号Vdata的集合来校正驱动晶体管Tdr的工作特性的变化，并被提供给驱动晶体管Tdr。版权所有（C）2007，JPO＆INPIT

43. 发明专利

JP3955298B2 Resistor divider, and a liquid crystal driving device and a liquid crystal display device using this resistor divider 有权
公开(公告)号：JP3955298B2
公开(公告)日：2007-08-08
申请号：JP2004341341
申请日：2004-11-26
申请人：松下電器産業株式会社
发明人：正嗣村田 , 和義西
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36 , H03M1/06 , H03M1/76
CPC分类号： H03M1/0678 , G09G3/3688 , G09G2320/0276 , H03M1/765

44. 发明专利

JP3950405B2 D / a converter circuit, a portable terminal device, an audio device, and a display display controller 有权
公开(公告)号：JP3950405B2
公开(公告)日：2007-08-01
申请号：JP2002315994
申请日：2002-10-30
申请人：シャープ株式会社
发明人：裕文松井 , 邦彦飯塚
IPC分类号： H03M1/10 , H03M1/06 , H03M1/78

45. 发明专利

JP2007143185A Analog-to-digital converter and method for converting analog signal into digital signal 审中-公开
标题翻译：模拟数字转换器和将模拟信号转换为数字信号的方法
公开(公告)号：JP2007143185A
公开(公告)日：2007-06-07
申请号：JP2007008553
申请日：2007-01-17
申请人： Infineon Technologies Ag , インフィネオンテクノロジーズアクチエンゲゼルシャフト
发明人： PAULUS CHRISTIAN
IPC分类号： H03M1/10 , H03M1/36 , H03M1/06
CPC分类号： H03M1/0643 , H03M1/365
摘要： PROBLEM TO BE SOLVED: To provide an analog-to-digital converter and a method for achieving high accuracy and linearity of a device, even when the magnitude of a component is small.
SOLUTION: The present invention relates to the analog-to-digital converter (301), having several comparators (303) and to a reference circuit network. The reference circuit network comprises several reference elements (302). At least one input (304) of at least one comparator (303) is connected between the individual reference elements (302) of the reference circuit network in the analog-to-digital converter (301), respectively. A digital evaluation circuit (311), with which the statistical evaluation of output signals generated by the comparators (303) can be carried out, is linked to outputs (309) of the comparators (303) of the analog-to-digital converter (301). The present invention also relates to a method for converting an analog signal (U
a ) into a digital signal (D).
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：即使当部件的大小小时，提供一种模数转换器和用于实现器件的高精度和线性度的方法。解决方案：本发明涉及具有多个比较器（303）和参考电路网络的模拟 - 数字转换器（301）。参考电路网络包括多个参考元件（302）。至少一个比较器（303）的至少一个输入端（304）分别连接在模拟 - 数字转换器（301）中的参考电路网络的各个参考元件（302）之间。可以执行由比较器（303）产生的输出信号的统计评估的数字评估电路（311）与模数转换器（303）的比较器（303）的输出（309）相关联 301）。本发明还涉及一种将模拟信号（U a ）转换为数字信号（D）的方法。版权所有（C）2007，JPO＆INPIT

46. 发明专利

JP2007513552A High-speed analog - digital converter 有权
公开(公告)号：JP2007513552A
公开(公告)日：2007-05-24
申请号：JP2006541935
申请日：2004-11-22
申请人：アトメルグルノーブルAtmel Grenoble
发明人：モリソ、リシャール
IPC分类号： H03M1/36 , H03M1/06
CPC分类号： H03M1/0682 , H03M1/363
摘要：本発明はｒの値を持つ少なくとも一つのＮ組の直列抵抗回路網と一つのＮ組の比較器回路網を備えた、差動入力及び並列構造を有する高速アナログ−デジタル変換器に関する。
比較器の応答時間に対する抵抗回路網の寄生容量の影響を最小限にするために、直列抵抗の回路網が基準電圧（ＶＨ）を受けて一定の電流Ｉ０で通電され、（ｉが１〜Ｎまで変化する）ｉ列の比較器（ＣＯＭＰｉ）が基本的に四つの入力を伴う二重の差動増幅器を備え、二つの入力は変換されるべき差動電圧ＶＳ−ＶＮを受け、三番目は回路網のｉ列の抵抗に接続され、四番目の入力は回路網のＮ−ｉ列の抵抗に接続されるよう準備される。二重の差動増幅器は（ＶＳ−ＶＳＮ）−（Ｎ−２ｉ）ｒ．Ｉ０の形の差を表わす電圧を供給し、そして前記差が符号を変える時に、比較器が電圧ＶＳ−ＶＳＮのレベル及び比較器のｉ列に応じて一方向又はもう一つの方向に切り替わる。
【選択図】図２

47. 发明专利

JP3919342B2 Wideband digital receiver 失效
公开(公告)号：JP3919342B2
公开(公告)日：2007-05-23
申请号：JP19865298
申请日：1998-07-14
申请人：株式会社ケンウッド
发明人：敦也横井
IPC分类号： H01Q3/26 , H03M1/06 , H03M1/18 , H04B1/10

48. 发明专利

JP3911490B2 Code conversion equipment, digital - analog conversion device and a delay locked loop circuit 有权
公开(公告)号：JP3911490B2
公开(公告)日：2007-05-09
申请号：JP2003125888
申请日：2003-04-30
申请人：三星電子株式会社Samsung Electronics Co.,Ltd.
发明人：人榮鄭
IPC分类号： H03M1/68 , G11C7/16 , G11C7/22 , H03L7/081 , H03L7/089 , H03M1/06 , H03M1/08 , H03M1/66 , H03M1/74 , H03M7/00
CPC分类号： H03M1/0687 , G11C7/16 , G11C7/22 , G11C7/222 , H03L7/0812 , H03L7/089 , H03M1/0863 , H03M1/664 , H03M1/745

49. 发明专利

JP2007508762A Analog / comparator circuit for the digital converter 有权
公开(公告)号：JP2007508762A
公开(公告)日：2007-04-05
申请号：JP2006534754
申请日：2004-10-13
申请人：アトメルグルノーブルエス.ア.Atmel Grenoble S.A.
发明人：モリソ、リシャール
IPC分类号： H03M1/36 , G06F3/05 , H03M1/06
CPC分类号： H03M1/0646 , H03M1/365
摘要：本発明はアナログ／デジタルコンバータ用の比較回路に関する。比較回路の各種比較器のオフセット電圧の影響を減らすために電圧トラッカー（Ａ）と、比較器（Ｃ）の出力

に存在する電圧の平均である平均電圧をその出力

で供給する抵抗器のネットワーク（２）とが、比較器（Ｃ）の出力（Ｏ）の下流側に接続される。
【選択図】図２

50. 发明专利

JP3902434B2 Mixed signal circuit 有权
公开(公告)号：JP3902434B2
公开(公告)日：2007-04-04
申请号：JP2001302171
申请日：2001-09-28
申请人：富士通株式会社
发明人：ジュソデディックイアン , アシュウィン−クマルウメドブハイパテルサンジァイ
IPC分类号： H03M1/74 , H03M1/06 , H03M1/66
CPC分类号： H03M1/0673 , H03M1/747 , H03M3/502
摘要： Mixed-signal circuitry, such as a digital-to-analog converter (DAC) device, performs a series of operation cycles. The circuitry has n circuitry segments (21, 41 to 2n, 4n) which together produce an analog output signal (IA-IB). In each cycle a transfer function morphing section (22) generates, in dependence upon a digital input signal (D1-Dm), a set of n segment control signals (T1-Tn) for application to respective ones of said segments to influence the produced analog output signal. The n segment control signals are caused to be applied to the n segments in at least two different orders at different respective times. At least one order differs from the next order by more than a starting ordinal position amongst the segments. Also, the changes in ordinal position of the segments brought about by the changes in order of application of the segment control signals are limited in number and/or magnitude relative to said number n of segments. This changes a transfer function (accumulated non-linearity error caused by amplitude and/or delay mismatches between the segments) between two or more different forms over the course of the operation cycles. This reduces the transfer function variation between different manufactured devices which in turn can provide an improvement in guaranteed minimum performance for a given manufacturing yield or an improvement in yield for a given performance.Segmented circuitry having segments with well-defined and less-well-defined analog quantities is also disclosed (FIG. 29). The well-defined quantities are selected in use of the circuitry and the less-well-defined quantities are selected in a testing or setting up mode.

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