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41. 发明专利

JPS60136391A CIRCUIT BOARD 失效
公开(公告)号：JPS60136391A
公开(公告)日：1985-07-19
申请号：JP24385783
申请日：1983-12-26
申请人： HITACHI LTD
发明人： TANAKA MINORU , MURATA AKIRA , HIROTA KAZUO , KOBAYASHI FUMIYUKI , TAKENAKA TAKATSUGU
IPC分类号： H01C7/00 , H01C1/142 , H01C13/02 , H05K1/11 , H05K1/16 , H05K3/38 , H05K3/42

42. 发明专利

JPS6042892A PRINTED CIRCUIT BOARD 失效
公开(公告)号：JPS6042892A
公开(公告)日：1985-03-07
申请号：JP15061983
申请日：1983-08-18
申请人： HITACHI LTD
发明人： KOUZAI HIROSHI , KOBAYASHI FUMIYUKI , SENGOKU NORIO , NEZU TOSHITADA , HOTSUTA YOSHIAKI
IPC分类号： G01R31/02 , H05K1/02 , H05K3/00 , H05K3/46

43. 发明专利

JPS604296A CONNECTING STRUCTURE OF PRINTED CIRCUIT BOARD 失效
公开(公告)号：JPS604296A
公开(公告)日：1985-01-10
申请号：JP11090783
申请日：1983-06-22
申请人： HITACHI LTD
发明人： KAWASHIMA SEIICHI , KOBAYASHI FUMIYUKI , KOUZAI HIROSHI
IPC分类号： H05K7/08 , H05K7/14

44. 发明专利

JPS59161847A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS59161847A
公开(公告)日：1984-09-12
申请号：JP3580983
申请日：1983-03-07
申请人： Hitachi Ltd
发明人： TAKENAKA TAKATSUGU , KOBAYASHI FUMIYUKI
IPC分类号： H01L23/32 , H01L23/52 , H01L23/538
CPC分类号： H01L23/5382 , H01L2924/0002 , H01L2924/00
摘要： PURPOSE:To facilitate wiring modification and device exchange by a method wherein repair wiring pads are provided on the under surface of a multilayer wiring substrate, the surface opposite to a semiconductor device mounting surface, and input-output pins provided on the under surface of the substrate are led to the outside via a detachable connector board, further a cap is brazed on the substrate, resulting in the hermetic sealing of a device mounting space. CONSTITUTION:A sealing metallized pattern 3 for brazing the sealing cap 6 is formed at the peripheral edge of the upper surface of the multilayer ceramic substrate 1, and the input-output pins 5, guide pins 4, and said pads not illustrated are provided on the back surface. Next, a plurality of semiconductor devices 2 are mounted on this substrate 1, the cap 6 is brazed on the pattern 3, and the connector board 7 having contacts 8 detachable to and from the pins 5 and guide posts 10 engaging with the pins 4 is positioned in the lower side of the substrate 1. Thereafter, these components 6, 1, and 7 are tightened with a clamper 11, and then many outer pins 9 projecting under the board 7 are inserted to the holes of a printed substrate.
摘要翻译：目的：为了便于通过在多层布线基板的下表面上设置修补布线板的方法进行布线修改和装置交换，与半导体装置安装面相反的表面，以及设置在多层布线基板的下表面上的输入输出销基板通过可拆卸的连接器板被引导到外部，另外在基板上钎焊盖，导致装置安装空间的气密密封。构成：在多层陶瓷基板1的上表面的周边形成有用于钎焊密封盖6的密封金属化图案3，并且输入输出销5，引导销4和未示出的所述垫被设置在背面。接下来，将多个半导体装置2安装在该基板1上，将盖6钎焊在图案3上，并且具有可拆卸到销5的触点8和与销4接合的引导柱10的连接器板7是位于基板1的下侧。此后，这些部件6,1和7用夹持器11紧固，然后在基板7下方突出的许多外部销9插入到印刷基板的孔中。

45. 发明专利

JPS59136951A Manufacture of semiconductor mounting substrate 失效
标题翻译：半导体安装基板的制造
公开(公告)号：JPS59136951A
公开(公告)日：1984-08-06
申请号：JP981683
申请日：1983-01-26
申请人： Hitachi Ltd
发明人： HOSHI AKIRA , NAKAGAWA MOROO , OOTSUKA KANJI , KOBAYASHI FUMIYUKI
IPC分类号： H01L23/12 , H01L21/48
CPC分类号： H01L21/4807
摘要： PURPOSE:To increase adhesive strength on a fitting of a fin by forming a surface, on which the fin is fitted, in a rough surface as it is left in the state as it is sintered. CONSTITUTION:One of at least the surface of a mounting substrate for a semiconductor baked by using a hot press is kept under the state in which it is left as it is sintered without machining such as grinding. For example, a substrate made of silicon carbide ceramics is prepared, only one surface is ground, and the other surface is left as it is sintered. The roughness of the surface not machined completely after sintering extends over 3-4mum and differs by one column or more though roughness after grinding extends over 0.2-0.3mum. When fins are attached to the rougher surface and treated at cold and heat cycles and the life of the surface is tested, approximately 2.5 time life is obtained on temperature difference and approximately 500 times in life length is obtained in repetition number up to the generation of exfoliation on the same temperature difference.
摘要翻译：目的：通过在其上安装翅片的表面形成一个粗糙的表面，通过在烧结时的状态下，增加翅片接头上的粘合强度。构成：通过使用热压机烘烤的用于半导体的安装基板的至少表面中的至少一个保持在其被烧结的状态，而不进行诸如研磨的机械加工。例如，制备由碳化硅陶瓷制成的基板，仅研磨一个表面，并且在烧结时留下另一个表面。在烧结后未完全加工的表面的粗糙度延伸超过3-4μm，并且磨削后的粗糙度延伸超过0.2-0.3μm，差异为一列或更多。当翅片连接到较粗糙的表面并在冷和热循环下进行处理并且测试表面的寿命时，在温度差上获得大约2.5倍的寿命，并且在重复次数中产生约500倍的寿命长度剥离相同的温度差。

46. 发明专利

JPS59114848A Cooling device of electronic apparatus 失效
标题翻译：电子装置冷却装置
公开(公告)号：JPS59114848A
公开(公告)日：1984-07-03
申请号：JP22378482
申请日：1982-12-22
申请人： Hitachi Ltd
发明人： SATOU MOTOHIRO , YAMADA TOSHIHIRO , NISHIMURA ASAO , OOGURO TAKAHIRO , ASHIWAKE NORIYUKI , KAWAMURA KEIZOU , KOBAYASHI FUMIYUKI
IPC分类号： H01L23/473 , H01L23/433
CPC分类号： H01L23/4332 , H01L2224/16225
摘要： PURPOSE:To simplify the fixing of a bellows so as not to generate pressure difference inside and outside the bellows and to prevent the scattering of a low melting point metal inside the bellows by fixing the bellows on a stud by mechanic junction. CONSTITUTION:A plurality of semiconductor chips 2 are joined in face down to a substrate 1 by means of solder 3, etc. The bellows 5 filled with the low melting point metal 7 inside is in contact with the back surface of the semiconductor chip 2. The bellows 5 is screwed into the threaded stud 6 fixed on a cap 4 and is thus fixed in a mechanical contact state. The space between the substrate 1 and the cap 4 is filled with a coolant 10, the cap 4 is formed of a high thermal conductive material and made to tightly contact on a cooler 9 having a cooling water passage 8. The fixing of the bellows 5 is a mechanical contact, and ventilation inside and outside the bellows 5 can be easily obtained, therefore the pressure difference inside and outside the bellows 5 does not generate. Besides, the low melting point metal 7 of good thermal conductivity inside the bellows 5 is, because of the sealing effect at the engagement part, not scattered out of the bellows 5 by oscillation, etc.
摘要翻译：目的：为了简化波纹管的固定，以免在波纹管内部和外部产生压力差，并通过机械连接将波纹管固定在螺柱上，防止波纹管内的低熔点金属散射。构成：通过焊料3等将多个半导体芯片2面朝下地接合到基板1上。填充有低熔点金属7的波纹管5与半导体芯片2的背面接触。波纹管5被拧入固定在盖4上的螺柱6中，因此固定在机械接触状态。衬底1和盖4之间的空间填充有冷却剂10，帽4由高导热材料形成，并使其与具有冷却水通道8的冷却器9紧密接触。波纹管5 是机械接触件，并且可以容易地获得波纹管5内部和外部的通风，因此波纹管5内部和外部的压力差不产生。此外，波纹管5内的导热性良好的低熔点金属7由于接合部的密封效果而不会通过振荡等散布在波纹管5之外。

47. 发明专利

JPS5961148A Manufacture of ceramic substrate 失效
标题翻译：陶瓷基板的制造
公开(公告)号：JPS5961148A
公开(公告)日：1984-04-07
申请号：JP17214282
申请日：1982-09-30
申请人： Hitachi Ltd
发明人： SEKIHASHI MASAO , ISHIDA MASAKATSU , KOBAYASHI FUMIYUKI
IPC分类号： H01L23/12 , H01L23/52
摘要： PURPOSE: To manufacture a ceramic substrate suitable for high density mounting with excellent heat dissipation efficiency and low wiring resistance between surface and back side by a method wherein fine and highly heat conductive thin plates formed by hot press process are bonded and laminated holding wiring materials.
CONSTITUTION: An SiC ceramic substrate made of SiC powder is formed by hot press process and the like under conditions such as temperature exceeding 2,000°C, pressure of 200kg/cm
2 and atmosphere of Ar and sliced by a diamond blade to be ground by a sand-blast machine. Then ceramic thin plates 1 and wiring materials 2 are bonded into one body by laminating the ceramic thin plates 1 so far formed holding the wiring materials 2 between the thin plates 1 and heating for 10W30min at the temperature around 450°C in the air under pressurization. Then the laminated body is cut down to form a ceramic substrate. Kovar or 42 alloy with little difference in the thermal expansion coefficient compared with that of glass as bonding materials 3 are utilized as the lead frame to be the wiring materials 2. The ceramic substrate 7 may be provided with excellent heat dissipation efficiency making the fine wiring on the surface and back side easier since the SiC ceramic is of a fine construction with high heat conductance. Besides the wiring resistance between surface and back side may be lowered by the lead frame 4.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：通过将通过热压法形成的精细且高导热的薄板接合并层叠保持布线材料的方法，制造适合于高密度安装的陶瓷基板，具有优异的散热效率和表面和背面之间的低布线电阻。构成：通过热压法等在超过2000℃，200kg / cm 2的压力和Ar气氛的条件下通过SiC粉末形成SiC陶瓷基板，由金刚石刀片切割成用喷砂机研磨。然后通过将保持布线材料2的薄板1之间的陶瓷薄板1层叠在450℃左右的温度下加热10-30分钟，将陶瓷薄板1和布线材料2接合在一体中加压空气。然后将层叠体切割成陶瓷基板。作为接合材料3，与作为接合材料3的玻璃相比，热膨胀系数几乎不相同的科瓦或42合金被用作引线框架作为布线材料2.陶瓷基板7可以具有优异的散热效率，从而使精细布线表面和背面更容易，因为SiC陶瓷是具有高导热性的精细结构。除了引线框架4之外，还可以降低表面和背面之间的布线电阻。

48. 发明专利

JPS58166755A CIRCUIT ASSEMBLY 失效
公开(公告)号：JPS58166755A
公开(公告)日：1983-10-01
申请号：JP4912182
申请日：1982-03-29
申请人： HITACHI LTD
发明人： TAGAMI BUNICHI , KOBAYASHI FUMIYUKI
IPC分类号： H01L25/18 , H01L21/66 , H01L25/04
摘要： PURPOSE:To enable to mount in high density, while to reduce the number of elements to be mounted directly, to facilitate the inspection and to ensure yield at the circuit assembly to mount the integrated circuit elements of the plural pieces by a method wherein the element having many input/output pins is mounted directly on a wiring substrate, the element having few input/output pins is formed in a chip carrier type, and they are mounted on the same wiring substrate. CONSTITUTION:A logical element chip 4 is equipped on the center of the ceramic multilayer wiring substrate 1 according to die bonding technique using AuSi eutectic crystals. Then wire bonding is performed to attain electric connection between the substrate 1 and the chip 4, and moreover it is sealed airtightly for protection by a cap 5. After then, the recording elements 3 formed previously in the chip carrier type are mounted on the circumference. According to the method mentioned above, the area to be occupied by the element 4 having the input/output pins of a large number can be restrained in the range to be decided according to size of the cap, and moreover, the electric inspection and ageing can be attained after sealing, and sufficient selection can be attained.

49. 发明专利

JPS58130540A MOUNTING STRUCTURE FOR SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPS58130540A
公开(公告)日：1983-08-04
申请号：JP1161182
申请日：1982-01-29
申请人： HITACHI LTD
发明人： DOI HIROAKI , YAMADA TOSHIHIRO , SATOU MOTOHIRO , YANAGIDA TAKEHIKO , ASHIWAKE NORIYUKI , NISHIMURA ASAO , KOBAYASHI FUMIYUKI , SHIDA SHIGERU
IPC分类号： H01L21/60
摘要： PURPOSE:To enable to perform the sufficient heat radiation of a semiconductor element while securing the reliability of an electric junction between the semiconductor element and a substrate, by performing the electrical connection beween the semiconductor element and the wiring conductor of the substrate by a low melting point metal or alloy. CONSTITUTION:The back surface of an LSI1 and a heat sink 5 are joined by solder 11. Thereby, the heat generated in the LSI1 is conducted easily to the heat sink 5 and carried away. On the other hand, the LSI1 and the wiring conductor 10 of the alumina substrate 2 are electrically connected by a low melting point metal or alloy e.g. Ga-In alloy 12. The alloy 12 can make its melting point at a normal temperature, and therefore the alloy 12 is always in liquid when the LSI1 operates. The surface tension of the alloy 12 when in liquid is strong enough to form a sphere. Thereby, many electrodes of the SLI1 and the winging conductor 10 of the substrate 2 can be electrically connected respectively in the sphere of the alloy 12 one by one. Even when a cooling plate 5 and the substrate 2 vary in dimensions resulting in a mutual displacement, it is not easily deformed and destructed.

50. 发明专利

JPS5896757A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5896757A
公开(公告)日：1983-06-08
申请号：JP19598681
申请日：1981-12-04
申请人： HITACHI LTD
发明人： MATSUSHITA YASUO , NAKAMURA KOUSUKE , URA MITSURU , KOBAYASHI FUMIYUKI
IPC分类号： H01L23/34 , H01L23/057 , H01L23/08 , H01L23/15
摘要： PURPOSE:To obtain the semiconductor device to radiate heat favorably by a method wherein an insulating substrate consisting of mainly non-oxide ceramics and having the coefficient of thermal expansion nearly the same with Si, and moreover having thermal conductivity of 0.2cal/sec.cm deg.C or more is used, a semiconductor element is fixed thereto, the element and isolated outside leads are connected, and the device is sealed airtightly with a ceramic cover. CONSTITUTION:A sintered body of SiC ceramics having theoretical density of 98% and consisting of 2wt% BeO and the remnant of SiC and impurities mixed inevitably is used as the substrate 1. SiC thereof indicates specific gravity of about 3.2, resistivity of 10 OMEGAcm, the coefficient of thermal expansion (at room temperature-900 deg.C) of about 40X10 / deg.C, heat conductivity (at the room temperature) of 0.6cal/sec.cm deg.C and bending strength of 45kg/mm. . The element 2 is soldered 3 onto the substrate, the leads 4 are adhered with glass 5, connection 6 is performed and the device is sealed with glass 8 using an alumina cover 7. According to use of the SiC ceramics thereof, heat resistance is reduced sharply, a distortion buffer material of Mo, etc., to be placed between the element and the substrate becomes as needless according to approximation of the coefficients of thermal expansion of both to reduce weight, and the device is also advantageous economically.

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