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    • 47. 发明专利
    • PLL CIRCUIT
    • JPS63226116A
    • 1988-09-20
    • JP5882187
    • 1987-03-16
    • HITACHI LTD
    • OKAZAKI TAKAO
    • H03L7/10
    • PURPOSE:To expand the frequency variable range of a PLL circuit substantially by adopting the plural number of stages of a clock frequency divider circuit for the frequency division ratio and identifying it that a phase control voltage reaches a prescribed upper limit voltage or a lower limit voltage to change over the frequency division ratio. CONSTITUTION:A frequency division ratio control circuit FDC identifying it that a phase control voltage VC formed by a loop filter LF reaches a prescribed upper limit voltage VB or a lower limit voltage VL to form a frequency division ratio control signal and clock frequency division circuits CFD1, CFD2 whose frequency division ratio is switched into 3 stages according to the frequency division ratio control signal, are provided. The frequency division ratio of the clock frequency division circuits CFD1, CFD2 at the time of starting the PLL circuit at its middle frequency division ratio, and when the phase control voltage VC reaches the upper limit voltage VH or the lower limit voltage VL due to the increased dispersion in the frequency characteristic of the voltage controlled oscillation circuit VCO, the frequency division ratio is switched at the same time. Thus, the overall frequency variable range of the PLL circuit is expanded and the product yield is improved.
    • 48. 发明专利
    • SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • JPS63202130A
    • 1988-08-22
    • JP3320487
    • 1987-02-18
    • HITACHI LTDHITACHI VLSI ENG
    • OKAZAKI TAKAOKODERA KOICHI
    • H03M1/06H03M1/74
    • PURPOSE:To obtain a circuit with less power supply voltage dependancy and temperature dependancy by transferring a voltage supplied to a base of transistor pair being a component of a reference voltage generating circuit connected in common and a potential corresponding to an output reference voltage of the voltage generating circuit to an output operational amplifier circuit via a corresponding operational amplifier circuit and a resistor. CONSTITUTION:The base of transistor pairs T1, T2 connected in common is connected to a noninverting input terminal of an operational amplifier circuit OA3 (3rd operational amplifier). The inverting input terminal of the operational amplifier circuit OA3 is connected to its output terminal. Thus, the operational amplifier circuit OA3 acts like a voltage transfer circuit having a very high input impedance. On the other hand, the drain of the MOSFETO2 is connected to the noninverting input terminal of the operational amplifier circuit OA2 (2nd operational amplifier circuit). The inverting input terminal of the operational amplifier circuit OA2 is connected to its output terminal. Thus, the operational amplifier circuit OA2 acts like a voltage transfer circuit having a very high input impedance. Thus, the power voltage dependancy is avoided.
    • 49. 发明专利
    • PLL CIRCUIT
    • JPS6376522A
    • 1988-04-06
    • JP21958786
    • 1986-09-19
    • HITACHI LTD
    • OKAZAKI TAKAO
    • H03L7/10
    • PURPOSE:To improve utilization efficiency and S/N ratio of a communication network, by setting the current value of the charging current source and discharging current source of a loop filter in such a way that they can become prescribed reference current values in a state where the phase of a PLL circuit is locked and, moreover, causing the current value of the charging current source to change in inverse proportion to a control voltage with the reference current value being a reference. CONSTITUTION:A control voltage Vc is set in such a way that the voltage Vc can become a prescribed reference voltage Vo in a state where the phase of a PLL circuit is locked and the current values of the charging current Iu of a charging current source IS1 and discharging current Id of a discharging current source IS2 are set in such a way that they can become a prescribed current value Io in the same state. Furthermore, the current value of the charging current Iu of the current source IS1 is caused to change in inverse proportion to the fluctuation of the control voltage Vc and the current value of the discharging current Id of the current source IS2 is caused to change proportionally to the fluctuation of the control voltage Vc. Since the charging current Iu of the charging current source IS1 becomes the maximum in the initial state, therefore, the leading-in time of the PLL circuit is sharply shortened. As a result, the S/N of the circuit is improved.
    • 50. 发明专利
    • バイアス回路
    • 偏置电路
    • JP2015012413A
    • 2015-01-19
    • JP2013135767
    • 2013-06-28
    • 株式会社日立製作所Hitachi Ltd
    • SOMADA ICHIROOKAZAKI TAKAOMOCHIZUKI KENTA
    • H03F3/343G05F3/30H03F1/30
    • H03F3/19H03F3/45085H03F3/45484H03F2200/447
    • 【課題】準ミリ波帯域以上の高周波増幅器のもつ利得の温度依存性を補償する電流源を実現する。【解決手段】温度係数が所定値以下である電流が第1の電流源より供給され電圧を発生する第1のPN接合素子と、高電圧側は前記第1のPN接合素子の低電圧側と第2のトランジスタのベース端子に繋がる前記第1の電流源と、所定値以上の温度係数をもつ電流が第2の電流源より供給され電圧を発生する第2のPN接合素子と、高電圧側は前記第2のPN接合素子の低電圧側と、第1のトランジスタのベース端子とに繋がる前記第2の電流源と、前記第2の電流源と等しい温度係数を持つ第3の電流源から電流供給を受け、前記第2のトランジスタと、前記第1のトランジスタで構成される差動対において、前記第2のトランジスタのコレクタ端子において前記第2の電流源と比較して電流の温度係数が2逓倍された温度係数を持つ電流を得るように構成されたバイアス回路。【選択図】図5
    • 要解决的问题:实现补偿高频放大器对于准毫米或更高频带的增益的温度依赖性的电流源。解决方案:在包括提供有电流的第一PN结元件的差分对中, 通过第一电流源的温度系数等于或低于预定值以产生电压,所述第一电流源具有连接到第一PN结元件的低压侧的高电压侧和第二晶体管的基极端子, 第二PN结元件,其由第二电流源提供具有等于或高于预定值的温度系数的电流以产生电压,所述第二电流源具有连接到第二PN的低电压侧的高压侧 第一晶体管的基极端子和第一晶体管的基极端子,第二晶体管提供来自具有相同温度的第三电流源的电流 系数作为第二电流源,并且第一晶体管,偏置电路被配置为在第二晶体管的集电极端处产生具有由第二电流源的电流的两倍的温度系数的电流。