专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明专利

JPH05136803A ATM COMMUNICATION QUALITY INFORMATION COLLECTING SYSTEM 失效
公开(公告)号：JPH05136803A
公开(公告)日：1993-06-01
申请号：JP10421991
申请日：1991-05-09
申请人： FUJITSU LTD
发明人： KATO YUJI , SHIMOE TOSHIO , KATO TSUGIO , TOMONAGA HIROSHI , EZAKI YUTAKA
摘要： PURPOSE:To make the management of communication quality accurate by providing a processing part measuring a flow rate in a cell in terminals on a subscriber-side or in the vicinity of them in a system where plural terminals and an ATM exchange are connected through a subscriber line. CONSTITUTION:When the ATM exchange 2 recognizes that a path is connected by the measurement of the flow rate, communication is executed between an origination- side and an incoming-side. A flow rate information requesting cell is periodically transmitted in accordance with information speed during communication. The flow rate of the returned cell is measured in the cell flow rate measurement parts 11 and 16 of respective flow rate measurement parts 6 so as to integrate the number of the received cells. An exchange 2 gives a flow rate information request to the origination- side after communication is executed for a prescribed period, and the origination-side analyzes an instruction by using an instruction analyzing part 12 and informs a controls part 13 of it. When the control part 13 receives the instruction, it gives the contents of the measurement part 11 or 16 to a response cell assembly part 14, transmits cell rate information from the part 14 to the exchange 2 through a cell multiplex part 17, compares the cell flow rate on the origination-side with the flow rate from an intra-exchange measurement part 5 and obtains communication quality.

32. 发明专利

JPH04252622A WAVELENGTH CONVERTING DEVICE 失效
公开(公告)号：JPH04252622A
公开(公告)日：1992-09-08
申请号：JP907491
申请日：1991-01-29
申请人： FUJITSU LTD
发明人： KUROYANAGI TOMOJI , SHIMOE TOSHIO
IPC分类号： G02B6/00 , G02F2/02 , H04J14/00 , H04J14/02
摘要： PURPOSE:To increase the information volume by arbitrarily shifting up or down the wavelength of transmitted optical information to the longer wavelength side as well as the shorter wavelength side in a wavelength converting device which converts the wavelength of optical information which has wavelengths multiplexed and is transmitted through an optical fiber transmission line. CONSTITUTION:Optical switches 121, 122... 12m which switch the outputs according optical information having wavelengths lambda1, lambda2...lambdam which are demultiplexed by wavelength should be outputted as they are or after conversion to the longer wavelength side or the shorter wavelength side, a wavelength up-shift register 13 which stepwise shifts the wavelength of optical information inputted through optical switches 12 to the longer wavelength side up to a desired wavelength, and a wavelength down-shift register 14 which stepwise shifts the wavelength of this optical information to the shorter wavelength side up to a desired wavelength are provided. Many stages of wavelength one-step up elements U and optical switches S are connected to constitute the former register, and many stages of wavelength one-step down elements D and optical switches S are connected to constitute the latter.

33. 发明专利

JPH0496544A CELL SYNCHRONIZATION SYSTEM FOR ATM EXCHANGE 失效
公开(公告)号：JPH0496544A
公开(公告)日：1992-03-27
申请号：JP21366990
申请日：1990-08-14
申请人： FUJITSU LTD
发明人： KAMOI EDAMASU , KATO YUJI , SHIMOE TOSHIO , HAYAMI SHICHIRO
摘要： PURPOSE:To quicken the transmission speed of a cell data by converting a data speed of an input cell data into a low speed and then accessing a memory. CONSTITUTION:A speed conversion 1 converts a data of an input cell into a data of a lower speed than the input cell speed, extracts a data equal to a header word length from an optional position, accesses a memory in an error check code arithmetic means 2 sequentially, and the error check code arithmetic means 2 generates a comparison error check code. The error check code arithmetic means 2 generates a relevant comparison error check code one by one word till an error check code in an input cell coincident with the comparison error check code. A cell frame generating means 3 regards it that cell synchronization is established when the coincidence is established and outputs an input frame at that time as a cell frame.

34. 发明专利

JPH0419622A CONSTITUTION SYSTEM FOR WAVELENGTH CONVERSION SWITCH 失效
公开(公告)号：JPH0419622A
公开(公告)日：1992-01-23
申请号：JP12290290
申请日：1990-05-15
申请人： FUJITSU LTD
发明人： KUROYANAGI TOMOJI , SHIMOE TOSHIO
IPC分类号： G02F2/00 , G02F2/02 , H04B10/00 , H04B10/27 , H04Q3/52 , H04Q11/02
摘要： PURPOSE:To increase the wavelength multiplicity of a wavelength conversion switches independently of the limit of variable wavelength width of each wavelength conversion element by providing a wavelength conversion part with plural wavelength conversion means for converting the wavelengths of respective selected optical signals by plural wavelength conversion element groups connected in multistages. CONSTITUTION:This wavelength conversion switch 7 is constituted of a wavelength leading part 2 consisting of plural selection filters for separating a wavelength multiplex input signal 1 wavelength-multiplied on an optical fiber transmission line, the wavelength conversion part 4 for converting the wavelengths of optical signals 3-1 to 3-n selected by respective selection filters and a wavelength multiplier 5 for multiplexing converted optical signals and forming a wavelength multiplexed output signal 6. The means 4 is provided with plural wavelength conversion means 8-1 to 8-n for converting the wavelengths of respective selected optical signals by plural wavelength conversion element groups connected in multistages. Thus, the wavelength multiplicity of the wavelength conversion switch 7 can be increased independently of the limit of the variable wavelength width.

35. 发明专利

JPH03254251A CHANNEL DEVICE IN BROAD BAND EXCHANGE 失效
公开(公告)号：JPH03254251A
公开(公告)日：1991-11-13
申请号：JP5220490
申请日：1990-03-02
申请人： TEZUKA KEIICHI , OKADA HIROMI , YAMAMOTO MIKI , FUJITSU LTD
发明人： TEZUKA KEIICHI , OKADA HIROMI , YAMAMOTO MIKI , SHIMOE TOSHIO
IPC分类号： H04Q3/52
摘要： PURPOSE:To realize high speed switching by adopting a function separation type in which functions are separated for a cell exchange section and a header processing section and overlapping the header processing time with a delay time in a cell switch. CONSTITUTION:A header information readout time (A) demultiplexing header information of a cell in an input section 12, a header processing time (B) applying header conversion, and a gate ON time (C) controlling a gate of the output of a cell exchange section (transmission medium) 11 are implemented in parallel. Cell exchange is implemented in A minimum propagation delay time (D) in a transmission line of a data entering the broadcast type transmission medium, a transmission cell accommodation time (E) when a cell passes through the broadcast type transmission medium and a time (F) when a transmission cell is swept out and a gate is turned off. Thus, the cell data is passed through the broadcast type transmission medium in parallel with the analysis of the header part of the cell and the part of the propagation delay (D) is processed precedingly substantially. Thus, the header processing and the cell exchange are implemented simultaneously to attain high speed processing.

36. 发明专利

JPH03201846A BUFFER CONTROL SYSTEM FOR ATM EXCHANGE 失效
公开(公告)号：JPH03201846A
公开(公告)日：1991-09-03
申请号：JP34319189
申请日：1989-12-28
申请人： FUJITSU LTD
发明人： HAYAMI SHICHIRO , KATO YUJI , KAMOI EDAMASU , SHIMOE TOSHIO
IPC分类号： H04L12/931 , G11C7/00 , H04Q11/04
摘要： PURPOSE:To efficiently stop and restart a write/read operation by controlling the full/empty state of a buffer for the unit of a cell. CONSTITUTION:A write pointer counting means 10 divides the buffer into plural areas for the unit of the cell, allocates a pointer expressing the position of each area in the divided buffer for both write and read, executes counting according to a write end signal to the buffer and outputs the next write pointer, and a read pointer counting means 11 executes counting according to a read end signal to the buffer and outputs the next read pointer. A full identifying means 14 detects coincidence between an output adding 1 to the value of the write pointer counting means 10 and the value of the read pointer counting means 11, and an empty identifying means 15 detects coincidence between an output adding 1 to the value of the read pointer counting means 11 and the value of the write pointer counting means 10. By using the outputs of the both identifying means 14 and 15, the write/read of the buffer is controlled.

37. 发明专利

JPH0399599A TIME DIVISION WAVELENGTH SPLIT COMBINATION TYPE OPTICAL SPEECH PATH EQUIPMENT 失效
公开(公告)号：JPH0399599A
公开(公告)日：1991-04-24
申请号：JP23610689
申请日：1989-09-12
申请人： FUJITSU LTD
发明人： KUROYANAGI TOMOJI , SHIMOE TOSHIO
IPC分类号： G02F1/31 , G02F3/02 , H04Q3/52 , H04Q11/00
摘要： PURPOSE:To reduce the number of components by providing a switch element composed of a wavelength selection filter, a time switch and a wavelength conversion element and disposing the elements on respective cross points of input/output highway matrices to connect them. CONSTITUTION:An optional wavelength of a signal light sent through input highways #1IN-#mIN subjected to time division multiplex and wavelength division is selected at a filter F in a switching element SE at the prescribed cross point of a matrix M and converted into a signal on a desired time base at a time switch TS, converted into a desired wavelength at a wavelength conversion element W and outputted to respective output highways #1OUT-#mOUT. Thus, the signal light is sent from the input highway to the output highway while being subjected to a prescribed conversion in one stage of conversion. Through the constitution above, the number of memories, selection filters and wavelength conversion elements are minimized to constitute high performance speech path.

38. 发明专利

JPH02186793A MULTI-INPUT ONE-OUTPUT LIGHT BUFFER 失效
公开(公告)号：JPH02186793A
公开(公告)日：1990-07-23
申请号：JP460989
申请日：1989-01-13
申请人： FUJITSU LTD
发明人： KUROYANAGI TOMOJI , SHIMOE TOSHIO
IPC分类号： H04B10/27 , H04B10/07 , H04L12/931 , H04Q3/52
摘要： PURPOSE:To reduce buffer quantity by accumulating data to be outputted from one output terminal in one buffer. CONSTITUTION:An input light signal from plural input terminals is switched and outputted to an optional terminal among plural change-over output terminals of a light switching means 13, and signal delay quantity corresponding to each of plural change-over output terminals is given to the output by a light signal delaying means 14, and plural signals to which the signal delay quantity was given are multiplexed and sent to the output terminal of a light buffer 12.

39. 发明专利

JPH02104148A OPTICAL ATM EXCHANGE SYSTEM 失效
公开(公告)号：JPH02104148A
公开(公告)日：1990-04-17
申请号：JP25773488
申请日：1988-10-13
申请人： FUJITSU LTD
发明人： KUROYANAGI TOMOJI , SHIMOE TOSHIO
IPC分类号： H04B10/27 , H04B10/00 , H04L12/28 , H04L12/931 , H04Q3/52
摘要： PURPOSE:To allow the title system to correspond also to the acceleration or capacity increment of information by converting an input optical signal into wavelength having routing information and executing switching by self-routing on the basis of the wavelength. CONSTITUTION:A waveform conversion part 1-I (I=1 to N) converts an input optical signal with a required wavelength having input information into wavelength having routing information in a communication line. Then, a switch part 2-I in a self-routing switch S executes switching based upon self routing and outputs the input information to a required output terminal. At the time of generating collision in information obtained from respective input terminals, the input information is temporarily stored in a buffer part 3-I to evade the collision of respective information. Consequently, the system can be allowed to sufficiently correspond also to the acceleration or capacity increment of information.

40. 发明专利

JPS62239699A HIGH SPEED HIGHWAY SWITCH CIRCUIT 失效
公开(公告)号：JPS62239699A
公开(公告)日：1987-10-20
申请号：JP8233786
申请日：1986-04-11
申请人： FUJITSU LTD
发明人： SHIMOE TOSHIO , KATO YUJI
IPC分类号： H04Q3/52
摘要： PURPOSE:To attain high speed switching operation by compensating the delay in the switching based on the reduction of the operating frequency due to the delay time in a multi-stage gate circuit by a holding function of a selector selecting optional one input among plural inputs and providing a latch circuit to the output side. CONSTITUTION:The titled circuit consists of a synchronizing flip-flop 10 arrang ing the location of the head of information (sound information, data, picture information or the like) subjected to time division multiplex on plural input HW 101-104, a selector 20 selecting an optional input among plural inputs HW 101-104 and giving an output, a gate circuit 30 holding the output of the selector 20 at the edge of the synchronizing clock pulse (CLK) for one clock period and a latch circuit 60 taking the synchronizing timing of the output HW 105. Thus, the number of passing gates in the channel switching circuit network between the input HW and the output HW is decreased, and the circuit copes with the transmission of moving picture information calling for a high speed switching.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式