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31. 发明专利

JPS55158699A PRINTED BOARD CONTAINING BLOCK 失效
公开(公告)号：JPS55158699A
公开(公告)日：1980-12-10
申请号：JP6612479
申请日：1979-05-30
申请人： FUJITSU LTD
发明人： OKAMOTO ITSUO , AMAGASA SHIGERU , SUGANO TAKU , ZENITANI HIDEKI , SATOU TAKASHI
IPC分类号： H05K7/14

32. 发明专利

JPS52141241A FIXING METHOD OF LIGHT TRANSMITTING BODY TERMINAL 失效
公开(公告)号：JPS52141241A
公开(公告)日：1977-11-25
申请号：JP5664776
申请日：1976-05-19
申请人： FUJITSU LTD
发明人： OKA AKIRA , OKAMOTO ITSUO , MURAI HITOSHI
IPC分类号： G02B6/36 , H01B11/00 , H01P3/00 , H02G15/08
摘要： PURPOSE:To fix a light transmitting body in a holder by thermal contraction and expansion, by heating the holder and cooling the fiber whose outer diameter is slightly larger than an inner diameter of the holder at room temperature.

33. 发明专利

JPS529450A OPTICAL TRANSMISSION PATH COUPLER 失效
公开(公告)号：JPS529450A
公开(公告)日：1977-01-25
申请号：JP8525575
申请日：1975-07-14
申请人： FUJITSU LTD
发明人： OKA AKIRA , OKAMOTO ITSUO , MURAI HITOSHI , FURUTA YOUSUKE , KUWABARA HIDEO , MATSUI KIYOSHI
IPC分类号： G02B6/36 , G02B6/38
摘要： PURPOSE:In order to promote the splicing efficiency, through cutting off the remoting edge from the shaft-core of butt-plane of a fiber holder in tapershape or step-shape, in an optical transmission path coupler in which a pair of fiber holders which contains the front edge of optical fiber being naked are reciprocally joined.

34. 发明专利

JPS529449A OPTICAL TRANSMISSION PATH COUPLER 失效
公开(公告)号：JPS529449A
公开(公告)日：1977-01-25
申请号：JP8525075
申请日：1975-07-14
申请人： FUJITSU LTD
发明人： OKA AKIRA , OKAMOTO ITSUO , MURAI HITOSHI , FURUTA YOUSUKE , KUWABARA HIDEO , MATSUI KIYOSHI
IPC分类号： G02B6/36 , G02B6/38
摘要： PURPOSE:In order to improve the transmission characteristics of optical fiber, by means of making the taper angle of shaft-core taper hole smaller on its insertionside, in an optical transmission coupler which reciprocally joins paired fiber holder which contains the front-edge of optical fiber being naked in the shaftcore taper hole.

35. 发明专利

JPH0784868A SEMICONDUCTOR STORAGE DEVICE 失效
公开(公告)号：JPH0784868A
公开(公告)日：1995-03-31
申请号：JP22621993
申请日：1993-09-10
申请人： FUJITSU LTD
发明人： OKAMOTO ITSUO
IPC分类号： G06F12/06 , G11C11/401 , G11C11/407
摘要： PURPOSE:To save electric power by supplying no current to the memory cell selecting means of a block other than a block including an address to be accessed. CONSTITUTION:A memory cell part 1 has memory cells distributed by addresses. A memory cell selection part 2 is supplied with addresses and selects specific memory cells corresponding to the addresses of the memory cell part 1. A current control part 3 controls the operating current of the memory cell selection part 9. Then the block selection part 9 is supplied with addresses and selects on block including addresses supplied from plural blocks consisting of a specific number of addresses, and the current control part 3 is so controlled that current supply to the memory cell selection part 2 corresponding to the block other than the selected block is stopped. Therefore, the current control circuit 3 is controlled so that no current flows to the circuit corresponding to the block other than the block including the address to be accessed in the memory selection part 2.

36. 发明专利

JPH06203565A PULL-UP CIRCUIT 失效
公开(公告)号：JPH06203565A
公开(公告)日：1994-07-22
申请号：JP180193
申请日：1993-01-08
申请人： FUJITSU LTD
发明人： OKAMOTO ITSUO
IPC分类号： G11C11/41 , G11C11/417
摘要： PURPOSE:To improve the load characteristic of a pull-up circuit, to make the ampli-tude on a read-out exclusive bit line small and to stabilize the amplitude when a current limitting condition is added on an object to be pulled up in the pull-up circuit. CONSTITUTION:Transistors T1, T2 are connected in series between a power source line VDD and the object 14, the gate of the transistor T1 is connected to a point P being the series connection point of the transistor T1 and T2, the gate of the transistor T2 is connected to a referece power source VB1. Further, transistors T3, T4 are connected in series between the power source line VDD and an electric power feeding point X, the gate of the transistor T3 is connected to the power source VDD, the gate of the transistor T4 is connected to a reference power source VB2, a transitor T5 is connected between the electric power feeding point X and a second power source line VSS, the gate is connected to the power source line VSS.

37. 发明专利

JPS61154200A SHELF CONSTRUCTION FOR MOUNTING COMMUNICATION CIRCUIT UNIT 失效
公开(公告)号：JPS61154200A
公开(公告)日：1986-07-12
申请号：JP27382184
申请日：1984-12-27
申请人： FUJITSU LTD
发明人： OKAMOTO ITSUO , OKA AKIRA , SUGANO TAKU , HONGO TOMOYUKI
IPC分类号： H05K7/14

39. 发明专利

JPS58164297A BLOCK FOR ELECTRONIC DEVICE 失效
公开(公告)号：JPS58164297A
公开(公告)日：1983-09-29
申请号：JP4638882
申请日：1982-03-25
申请人： FUJITSU LTD
发明人： OKAMOTO ITSUO , AMAGASA SHIGERU , SUGANO TAKU , SAWANO SATAROU , TOYAMA MITSUSADA
IPC分类号： H05K7/14

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