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    • 22. 发明专利
    • Wiring board, electronic circuit apparatus and manufacturing method thereof
    • 接线板,电子电路设备及其制造方法
    • JP2008109005A
    • 2008-05-08
    • JP2006292216
    • 2006-10-27
    • Nippon Telegr & Teleph Corp 日本電信電話株式会社
    • SATO NORIOISHII HITOSHIMORIMURA HIROKI
    • H01L25/065H01L21/3205H01L23/52H01L25/07H01L25/18
    • H01L2224/16
    • PROBLEM TO BE SOLVED: To uniformize a signal delay time of each of through electrode wirings.
      SOLUTION: A semiconductor device 101 comprises a plurality of semiconductor chips 102a, 102b. The semiconductor chips 102a, 102b are each provided with a plurality of through electrodes 106 (106a or 106b), and the through electrodes 106 are electrically connected to input-output terminals 103 via through electrode wirings 110, 111 coupled along a laminate direction. At least one part of the through electrodes 106 is a through electrode for signal delay adjustment having a profile molded corresponding to the length of the through electrode wirings 110, 111 including this through electrode so that the signal delay time of each of the through electrode wirings 110, 111 can be equalized.
      COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:使通孔电极布线的信号延迟时间均匀化。 解决方案:半导体器件101包括多个半导体芯片102a,102b。 半导体芯片102a,102b分别设置有多个贯通电极106(106a或106b),并且贯通电极106通过沿着层叠方向连接的电极配线110,111与输入输出端子103电连接。 通孔电极106的至少一部分是用于信号延迟调整的通孔,其具有对应于包括该贯穿电极的贯通电极布线110,111的长度模制的轮廓,使得每个通孔电极布线的信号延迟时间 110,111可以相等。 版权所有(C)2008,JPO&INPIT
    • 23. 发明专利
    • Electrodeposition method
    • 电沉积法
    • JP2007044847A
    • 2007-02-22
    • JP2005234188
    • 2005-08-12
    • Nippon Telegr & Teleph Corp 日本電信電話株式会社
    • SAKATA TOMOMIISHII HITOSHISATO NORIOKUWABARA HIROSHIMACHIDA KATSUYUKI
    • B81C1/00C25D13/00C25D13/12
    • PROBLEM TO BE SOLVED: To provide an electrodeposition method for use in forming an organic film, by which the organic film can be selectively formed in an area where voltage application is desired such as an electrode while preventing abnormal deposition in an area where voltage is not applied. SOLUTION: According to the method, oxygen plasma is applied to carbon-based contaminants (organic matter) remaining on surfaces of a control electrode 118 and a mobile portion electrode 109, in order to eliminate the contaminants. Next a substrate 101 subjected to oxygen plasma treatment, is treated with an hydrochloric acid, and the substrate is soaked in a hydrofluoric acid solution of a 0.5% concentration for 30 seconds, for instance. Thereafter the substrate 101 is washed with water, and immediately electrodeposited, whereby the organic film 110 is formed by electrodeposition only on a surface where the control electrode 118 is exposed. COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:提供一种用于形成有机膜的电沉积方法,通过该电沉积方法,可以在需要电压的区域中选择性地形成有机膜,例如电极,同时防止在 不施加电压。 解决方案:根据该方法,将氧等离子体施加到残留在控制电极118和可移动部分电极109的表面上的碳基污染物(有机物质)上,以消除污染物。 接下来,进行氧等离子体处理的基板101,用盐酸处理,将基板浸渍在例如0.5%浓度的氢氟酸溶液中30秒钟。 此后,将基板101用水洗涤,并立即电沉积,由此仅在暴露控制电极118的表面上通过电沉积形成有机膜110。 版权所有(C)2007,JPO&INPIT
    • 24. 发明专利
    • Manufacturing method of microstructure
    • 微结构的制造方法
    • JP2006196655A
    • 2006-07-27
    • JP2005006247
    • 2005-01-13
    • Nippon Telegr & Teleph Corp 日本電信電話株式会社
    • SATO NORIOISHII HITOSHIKODATE JUNICHIMACHIDA KATSUYUKI
    • H01L27/12B81C3/00H01L21/02
    • PROBLEM TO BE SOLVED: To uniformly seal a hollow microstructure through formation of a sealing film using a transfer method such as lamination or STP method or the like.
      SOLUTION: First, a filling structure 103 is formed on a substrate 100 between the adjacent microstructures 110 to fill the periphery of substrate 100a. Almost identical flat surfaces are formed with the upper surface of the microstructure 110 and the upper surface of the filling structure 103. Moreover, since a recess 103a is provided to the filling structure 103, the surface conditions of the planes formed become almost uniform. Thereafter, a sealing film 105 of the uniformed structure is formed, for example, with the STP method on the microstructure 110 and filling structure 103.
      COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:通过使用诸如层压或STP方法等的转印方法通过形成密封膜来均匀地密封中空微结构。 解决方案:首先,在相邻微结构110之间的基板100上形成填充结构103以填充基板100a的周边。 几乎相同的平面形成有微结构110的上表面和填充结构103的上表面。此外,由于在填充结构103中设置有凹部103a,所以形成的平面的表面状态变得几乎均匀。 此后,例如通过STP法在微结构110和填充结构103上形成均匀结构的密封膜105.版权所有(C)2006,JPO&NCIPI
    • 25. 发明专利
    • Electronic component device
    • 电子元器件
    • JP2005315694A
    • 2005-11-10
    • JP2004133226
    • 2004-04-28
    • Nippon Telegr & Teleph Corp 日本電信電話株式会社
    • SHIMAMURA TOSHISHIGEURANO MASAMIISHII HITOSHIMACHIDA KATSUYUKI
    • G01P15/125B81B3/00B81B7/02G01B7/00G01R27/26
    • PROBLEM TO BE SOLVED: To detect the capacity of a variable capacity structure at high speed, while suppressing deterioration of detection accuracy, even when a parasitic capacity is large to the capacity of the variable capacity structure. SOLUTION: This device has a variable shape structure 1 displaced corresponding to a control signal or a physical quantity to be detected, and a structure displacement detection unit 2 for detecting the capacity showing displacement of the variable shape structure 1. The variable shape structure 1 is equipped with the variable capacity structure 10 whose capacity is changed corresponding to its displacement. The structure displacement detection unit 2 is equipped with an electric field generation part 20 for generating an electric field on the variable capacity structure 10, a guide signal generation part 22 for outputting a guide signal Sd which is a base for electric field generation to the electric field generation part 20, a capacity information extraction part 23 for extracting an information signal Si showing the capacity of the variable capacity structure 10 from a capacity signal Scap of the variable capacity structure 10, and an output adjusting part 24 for converting the information signal Si into a format capable of information processing. COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:即使当寄生容量大到可变容量结构的容量时,为了在抑制检测精度的降低的同时,高速地检测可变容量结构的容量。 解决方案:该装置具有对应于要检测的控制信号或物理量移位的可变形状结构1,以及用于检测表示可变形状结构1的位移的能力的结构位移检测单元2.可变形状 结构1配备有容量根据其位移而变化的可变容量结构10。 结构位移检测单元2配备有用于在可变容量结构10上产生电场的电场产生部20,导向信号生成部22,用于将作为电场产生的基底的引导信号Sd输出到电 场产生部分20,容量信息提取部分23,用于从可变容量结构10的容量信号Scap提取示出可变容量结构10的容量的信息信号Si;以及输出调节部分24,用于将信息信号Si 成为能够进行信息处理的格式。 版权所有(C)2006,JPO&NCIPI