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21. 发明专利

JPH0691952A PRINTING CONTROL CIRCUIT 失效
公开(公告)号：JPH0691952A
公开(公告)日：1994-04-05
申请号：JP24167792
申请日：1992-09-10
申请人： HITACHI LTD
发明人： KAWAMATA YOSHIO , JINGU KUNIO
IPC分类号： B41J5/30 , G06F12/14
摘要： PURPOSE:To form a highly reliable protecting circuit by providing a protecting address assigning means for memory block and an address comparing means for comparing the sizes of two input addresses. CONSTITUTION:When a raster scan reading circuit performs zero clearing operation (zero writing operation) for address in a specific region, an address signal 65 becomes large as compared with an output 24. For this reason, a comparison result signal 25 becomes low and an output 26 changes the same as WE signal B 64. Therefore, the content of the address designated by the raster scan reading circuit is cleared to be zero. On the other hand, when the raster scan reading circuit performs zero clearing operation for address in a specific region, the address signal 65 becomes smaller than or the same as the output 24. For this reason, the comparison result signal 25 becomes high to protect the content of the address wrongly designated by the raster scan reading circuit from the zero clearing.

22. 发明专利

JPH0415885A PLOTTING DEVICE 失效
公开(公告)号：JPH0415885A
公开(公告)日：1992-01-21
申请号：JP11760190
申请日：1990-05-09
申请人： HITACHI LTD
发明人： JINGU KUNIO
IPC分类号： B41J5/30 , G06T11/20 , G09G5/00 , G09G5/36
摘要： PURPOSE:To shorten the time for address calculation by converting the address in a segmentation system at the time of accessing a graphic memory. CONSTITUTION:Picture data corresponding to the two-dimensional plotting area of X-bits for X-axis and Y bits for Y-axis bit is stored in a memory where the head address is an address B and a data unit which can be accessed at once is one word=N bits. A segment selector 11, an offset register 14 and a segment register 13 are given in CPU 1. When CPU 1 accesses the graphic memory 9, the addition value of the value of the segment register 13 and the value of the offset register 14 comes to an address value. When CPU accesses a certain point (x,y) in the plotting area, the value of (x/N) is written into the segment selector 11 and the value of (y) into the offset register 14. Thus, the value of the segment register being the value of B+(x/N).Y and the value of the offset register, whose value is (y) are added and the address value of the graphic memory being B+(x/N).Y+y is obtained. Thus, address calculation can be executed at high speed.

23. 发明专利

JPS63291144A MEMORY CONTROLLER 失效
公开(公告)号：JPS63291144A
公开(公告)日：1988-11-29
申请号：JP12588187
申请日：1987-05-25
申请人： HITACHI LTD
发明人： OKUNO TERUAKI , JINGU KUNIO
IPC分类号： G06F12/06
摘要： PURPOSE:To extend a memory by allotting plural memory devices to the address space of a CPU as programmable conditions to determine address decoding conditions by the data writing from the CPU to the memory device. CONSTITUTION:A register 13 to store the address decoding conditions of plural memories IC with a different capacity and a comparing circuit 14 to compare and discriminate the coincidence and dissidence of the address decoding conditions and the address from a CPU 11 are provided. As the programmable conditions to determine the address decoding conditions by the data writing from the CPU 11 to the register 13, respective memories IC are allotted to the address space of the CPU 11. Thus, a tip switch to set an address from an external part is eliminated and operability is improved.

24. 发明专利

JPS63249253A WAIT GENERATING CIRCUIT 失效
公开(公告)号：JPS63249253A
公开(公告)日：1988-10-17
申请号：JP8319287
申请日：1987-04-04
申请人： HITACHI LTD
发明人： KAWAMATA YOSHIO , JINGU KUNIO
IPC分类号： G06F9/30 , G06F13/10 , G06F13/42
摘要： PURPOSE:To facilitate extension of peripheral I/Os by multi-allocating peripheral I/Os in plural positions of the address space of a CPU and using the address signal of the CPU to control the number of access waits of the CPU to peripheral I/Os. CONSTITUTION:Peripheral I/Os 23-1-23-5 are multi-allocated in plural positions of the address space of a CPU 21 and the address signal of the CPU 21 is used to control the number of access waits of the CPU 21 to peripheral I/Os 23-1-23-5. That is, the number of wait states for each peripheral I/O selecting signal outputted from a CPU chop or a private chip constituted as a gate array is set in accordance with the range of the address to be accessed. Thus, the number of waits is changed without changing once manufactured hardware at all, and the number of connected peripheral I/Os is freely increased only by addition of an external address decoder.

25. 发明专利

JP2003171070A METHOD AND SYSTEM FOR CONFIRMING OPERATION STATE OF ELEVATOR 审中-公开
公开(公告)号：JP2003171070A
公开(公告)日：2003-06-17
申请号：JP2001369691
申请日：2001-12-04
申请人： HITACHI LTD
发明人： JINGU KUNIO
IPC分类号： B66B3/00 , B66B5/00 , H04M11/00
摘要： PROBLEM TO BE SOLVED: To enable general users to simultaneously confirm the operation state of an elevator from a plurality of portable telephones. SOLUTION: This system for confirming the operation state of the elevator monitors the operation of the elevator, compiles a Web page based on the information, and transmits the information to the portable telephones by a packet communication. The packet communication, which is different from a circuit exchanging system occupying the circuit, does not occupy the circuit except for transmitting/receiving the data, so that the operation state of the elevator can be simultaneously confirmed by the plurality of portable telephones. COPYRIGHT: (C)2003,JPO

26. 发明专利

JPH1153093A INPUT DEVICE 失效
公开(公告)号：JPH1153093A
公开(公告)日：1999-02-26
申请号：JP20920897
申请日：1997-08-04
申请人： HITACHI LTD
发明人： JINGU KUNIO , MIYAZAKI KAZUO
IPC分类号： G06F3/02 , G06F3/023 , H03M11/04
摘要： PROBLEM TO BE SOLVED: To prevent or suppress misinput on a touch panel which has keys of a virtual keyboard arrayed on a display screen and has a flat surface. SOLUTION: The input device has a display part provided with an input area where a desired key array is displayed and a display area where characters and symbols are displayed, a data input part which obtains coordinate data by selecting a key part 10 displayed in the input area of the display part with a pen, a finger, etc., and a key input detecting means and a control part which convert the coordinate data corresponding to the key part selected in the input area into data showing a specific character or function. A border areas 1018 of specific width is set between keys 1016a and 1016b displayed in the input area and when this border area 1018 is selected, it is decided which of the keys 1016a and 1016b the choice belongs to, thereby performing input assigned to the decided part.

27. 发明专利

JPH0367824A DOCUMENT PRINTING METHOD 失效
公开(公告)号：JPH0367824A
公开(公告)日：1991-03-22
申请号：JP19942389
申请日：1989-08-02
申请人： HITACHI LTD
发明人： JINGU KUNIO , ENOMOTO JUNICHI , TAKAGISHI KAZUFUMI , KAWAMATA YOSHIO
IPC分类号： B41J13/00 , B41J29/42 , B41J29/48 , B41J29/50 , B65H3/44 , B65H7/20 , G06F3/12
摘要： PURPOSE:To print without wasting paper by adopting a method to confirm both the size and quality of paper, and then selecting paper. CONSTITUTION:When printing is to be performed, WP1 transmits to a printing device 5 a paper type set pin notice request 21 to find out the type of paper above a paper cassette 7a and below a paper cassette 7b which are inserted into the printing device 5. Next, the printing device 5, on its receipt, detects a paper type set pin 32 of the paper cassettes 7a, 7b, and transmits it to WP1 as a paper type set pin notice 24. On its receipt, WP1 confirms the agreement of a paper type designation data 31 and the paper type set pin 32. Next, WP1 transmits to the printing device 5 a printing data 22, and simultaneously transmits an agreed paper cassette notice 23 informing which paper cassette, upside or downside, the agreement was made with. On its receipt, the printing device 5 receives a printing data for one page, performs letter development and selects the agreed paper cassette to perform its printing.

28. 发明专利

JPS6444761A RASTER-SCAN TYPE PRINTER CONTROLLER 失效
公开(公告)号：JPS6444761A
公开(公告)日：1989-02-17
申请号：JP19977487
申请日：1987-08-12
申请人： HITACHI LTD
发明人： JINGU KUNIO
IPC分类号： B41J2/32 , B41J2/485 , B41J21/00 , G06K15/02
摘要： PURPOSE:To obtain a ring buffer system of a bit map memory realizable with a simple construction, by a method wherein, a printable area of l-words in a raster-scan direction and m-rasters in a paper feed direction is provided, a memory width for the amount of n-rasters is set to be smaller than m-rasters of a raster-scan type printer, and the memory capacity of the bit map memory is set larger than l.n-words by a predetermined amount. CONSTITUTION:An address of a bit map memory 6 corresponding to the 1st word of the (n+1)-th raster is the (n+1)-th address of the bit map memory in this helical system, but was the 1st address in a conventional cylindrical system. Therefore, the need for correcting the address in the prior art is eliminated, and a direct writing or reading is made possible. Since, the writing processing of the data of the (n+1)-th raster is carried out after the completion of the reading of the 1st raster, the (n+1)-th address of the bit map memory 6, which is the 2nd word of the 1st raster, has been read already at the writing processing. In this case, a multi-assigning of the bit map memory 6 is carried out with the shift in a raster-scan direction for every n-rasters by the amount of one word. Therefore, a memory of (m-n) words is added to an address succeeding the l.n address, whereby the bit map memory 6 has a capacity of (l-1).n+m words.

29. 发明专利

JPS63225290A DISPLAY CONTROL CIRCUIT 失效
公开(公告)号：JPS63225290A
公开(公告)日：1988-09-20
申请号：JP5973887
申请日：1987-03-14
申请人： HITACHI LTD
发明人： JINGU KUNIO
IPC分类号： G09G5/22 , G09G5/24 , G09G5/36 , G09G5/39 , G09G5/393

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