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21. 发明专利

JPH0230278A SIGNAL PROCESSING UNIT 失效
公开(公告)号：JPH0230278A
公开(公告)日：1990-01-31
申请号：JP17905688
申请日：1988-07-20
申请人： HITACHI LTD
发明人： SEKIYA MASATAKA , NISHIJIMA HIDEO , OWASHI HITOAKI , OTSUBO HIROYASU , YAMAUCHI HIROTO
IPC分类号： H04N5/262
摘要： PURPOSE:To realize the simultaneous operation of data write and readout by writing a video signal by one horizontal scanning share via a buffer memory in the lump, transferring the signal to a memory capable of readout at random through the address setting and storing the signal therein. CONSTITUTION:A storage circuit 11 writes an output of a serial/parallel converter 7 and an ADC 5 serially by a command of a memory controller 6, and reads a data written already at random on the other hand. A luminance signal among a data read from the storage circuit 11 is converted into a serial data by a serial/parallel converter 15 and given to a DAC 28 via a Y inversion circuit 25 and solarization circuit 27. Moreover, a chrominance signal is converted into an analog signal by a DAC 28. Signals 41, 42, 44 are respectively signals commanding the mirror state, the zoom state and the mosaic state and each function is processed in an independent block by the state command signal, the combination of modes is attained and the mixture mode is realized.

22. 发明专利

JPH01278192A METHOD FOR PROCESSING COLOR VIDEO SIGNAL 失效
公开(公告)号：JPH01278192A
公开(公告)日：1989-11-08
申请号：JP10540188
申请日：1988-04-30
申请人： HITACHI LTD
发明人： OWASHI HITOAKI , OTSUBO HIROYASU , SEKIYA MASATAKA , MITSUBE AKISHI , NISHIJIMA HIDEO , MASUDA MICHIO
IPC分类号： H04N9/77 , H04N9/79 , H04N11/04
摘要： PURPOSE:To suppress color flickering and to improve picture quality by expanding and reducing the field term length of a luminance signal and a color difference signal at every field alternately at the time of reading out the luminance signal and the color difference signal written on a memory. CONSTITUTION:A readout control circuit 14 performs readout control so that the number of scanning lines of a signal read out of a field memory 5 can be set at 262 and 263 alternately at every field. And the readout control is performed so that the number of scanning lines can be extended or reduced by the odd times the 1/2 of the cycle 2tau of a chrominance subcarrier, non- magnified times in this case, less than that of another scanning line at the final scanning line (263-th scanning line) alternately at every field of 263 fields. Therefore, it is possible to keep the phase relation of a crosstalk chroma signal component in the luminance signal read out of the memory 5 with a chroma signal constant. In such a way, the color flickering due to fluctuation in color saturation or hue can be eliminated, and the picture quality can be improved.

23. 发明专利

JPH01208029A ENCODER AND DECODER 失效
公开(公告)号：JPH01208029A
公开(公告)日：1989-08-22
申请号：JP3096788
申请日：1988-02-15
申请人： HITACHI LTD
发明人： OWASHI HITOAKI , OTSUBO HIROYASU , SEKIYA MASATAKA , MITSUBE AKISHI , NISHIJIMA HIDEO , MASUDA MICHIO
IPC分类号： H04N19/50 , H03M7/38 , H03M7/50 , H04N19/85
摘要： PURPOSE:To reduce a quantization error by performing coding by applying non-linear quantization on differential data of (m) bits except for the most significant bit of the differential data, and setting the data of (m) bits except for the most significant bit of the data obtained by an addition processing as recovery data. CONSTITUTION:A digital signal of (m) bits inputted from a terminal 10 is inputted to an amplitude limitation circuit 20, and amplitude limitation is performed so that it stays within a prescribed level. Here, an amplitude-limited signal is inputted to a difference detection circuit 30, and a difference is found at every sampling value with a prescribed interval. A code bit is attached on a differential signal level, then, it goes the one of (m+1) bits, however, bit compression to (n) bits is performed by inputting the differential signal of (m) bits except for the most significant bit to a non-linear quantization circuit 40. A bit-compressed signal is inputted to a representative value setting circuit 60 via a transmission path 50, then, it is expanded to the differential signal of (m) bits. An expanded deferential signal is inputted to an adder circuit 70, and addition at every prescribed interval corresponding to the detection circuit 30 is performed, and it is recovered to an original signal, then, is outputted from a terminal 80. Thus, the quantization error can be reduced.

24. 发明专利

JPS6214066A DIGITAL CYCLE MEASURING CIRCUIT 失效
公开(公告)号：JPS6214066A
公开(公告)日：1987-01-22
申请号：JP15224685
申请日：1985-07-12
申请人： HITACHI LTD
发明人： OKAMOTO CHIKAYUKI , NISHIJIMA HIDEO , SEKIYA MASATAKA , KOBAYASHI JUN
IPC分类号： G01R23/10 , G01P3/489
摘要： PURPOSE:To obtain a speed comparator circuit which enables a higher accuracy simply, by determining the lowest order bit information on the basis of a sam pling value of a clock signal by an FG signal while the timing of applying a clock to a speed comparison counter and stopping it is determined by synchro nizing the FG signal with the clock signal. CONSTITUTION:FFs 61 and 62 sample a clock 21 at the leading edge of an FG signal 22 and send it to the Q output. Here, the Q output of the FF62 gives a preceding sampling value while the Q output of the FF61 outputs a new sampling value. Then, a logical gate 67 outputs a signal 85 which will be high when the clock 21 corresponds to a high level with the counts of a counter 34 reaching 4. A logical gate 66 outputs signals 84 and 84' which will be high when the clock 21 corresponds to a low level with the counts of a counter 64 reach 1 or 0, according to the output of a logical gate 70. The inversion of Q output of an FF63 having the outputs 84 and 85 as input gives signals 86 and 86'. The output of ANDing the signals and a raw clock signal 21 provides shaping clock pulses 82 and 82'.

25. 发明专利

JPS61251385A SLOW MOTION DEVICE OF MAGNETIC RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPS61251385A
公开(公告)日：1986-11-08
申请号：JP9109485
申请日：1985-04-30
申请人： HITACHI LTD
发明人： SEKIYA MASATAKA , NISHIJIMA HIDEO , OKAMOTO CHIKAYUKI , FUKUSHIMA ISAO , FUNASHIRO HIDEKAZU
IPC分类号： H04N5/93 , G11B15/18 , H04N5/783
摘要： PURPOSE:To obtain a slow motion picture image having no noisebar free from adjustment by providing a noise phase detecting means for detecting a noise position of a reproducing signal from a magnetic tape and outputting a pulse displaying the noise position corresponding in a reproduced picture plane. CONSTITUTION:Since a noise is detected from an envelope signal a by a noise detector 11 and a pulse c is generated, a frame feed circuit 17 is operated by the pulse c. A crawling driving signal f outputted from the circuit 17 is fed to a driving circuit 21 through an AND gate 16 to carawling drive a capstan 14. When the pulse c is not outputted from the circuit 11, the circuit 17 stops the output of the crawling driving signal f thereby the capstan 14 stops. In this manner, there is no noise bar on a reproducing picture plane, and thereafter, the circuit 17 outputs an accelerating pulse d and a brake pulse a again, and a magnetic tape 1 is intermittently fed. This operation is repeated and a slow motion reproduction is carried out.

26. 发明专利

JPS61230582A STILL PICTURE REPRODUCING DEVICE FOR MAGNETIC RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPS61230582A
公开(公告)日：1986-10-14
申请号：JP7085885
申请日：1985-04-05
申请人： HITACHI LTD
发明人： SEKIYA MASATAKA , NISHIJIMA HIDEO , OKAMOTO CHIKAYUKI
IPC分类号： H04N5/93
摘要： PURPOSE:To obtain noiseless still picture reproducing by detecting noise that is difficult to be detected with increasing detecting sensitivity according to a noise position, and dealing with the detected noise by identifying whether it is caused by a tape scratch, etc. or not. CONSTITUTION:A reproducing signal which is picked up at heads 6 and 7 and is amplified at an amplifier 9 is envelope-detected at a comparator 13 and generates a signal 30 that is a part to become noise on a reproducing picture. On the other hand, the rotation of magnets 11 and 12 induces voltage on a drum rotating head 15 and is amplified at an amplifier 16 and a signal 36 is generated at a head switching signal generating circuit 17. So that the D input of a D flip flop is high, a signal 32 is generated by signals 30 and 31. The signal 32 is inputted to a driving pulse circuit 29 passing through an AND gate 24, etc. and a signal 38 is obtained and a capstan motor 27 is rotated at low speed in the normal direction. Thereby, the noise on a scope is slowly moved from up to down and the signal 30 is no more detected and the signal 32 is always maintained at a low and the capstan motor stops. Thus, the noiseless reproducing is obtained.

27. 发明专利

JPS61143822A DIGITAL CONTROL DEVICE 失效
公开(公告)号：JPS61143822A
公开(公告)日：1986-07-01
申请号：JP26522884
申请日：1984-12-18
申请人： HITACHI LTD
发明人： SEKIYA MASATAKA , NISHIJIMA HIDEO , OKAMOTO CHIKAYUKI , FUKUSHIMA ISAO , FUNASHIRO HIDEKAZU
IPC分类号： G05D13/62 , H02P29/00 , H03L7/00 , H03L7/06
摘要： PURPOSE:To reduce the size of a circuit and to attain a digital constitution by using a sample data of a phase compensating circuit as a preset value of a frequency/voltage converter for obtaining sample data of a speed control signal. CONSTITUTION:A digital control device for driving a capstan motor 11 by a driving circuit 13 is constituted of a reference phase generator 15, a phase system controller 16, a ROM22, a latch circuit 23, a computing element 24, a phase control system consisting of a phase counter 25, a data frequency divide 26, etc. and a speed control system consisting of a clock frequency divider 27, a speed system controller 28, an f/v converter 30, etc. Consequently, input sample data Xn are divided 26 by A at its frequency and latched by a latch circuit 23 through a computing element 24. The sample data Xn/A outputted from the circuit 23 are supplied to the f/v converter 30 as a preset input. Thus, the speed control data are added to the phase control data by the converter 30, so that the whole constitution can be simplified.

28. 发明专利

JPS60223393A STILL PICTURE REPRODUCING DEVICE OF MAGNETIC RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPS60223393A
公开(公告)日：1985-11-07
申请号：JP7844484
申请日：1984-04-20
申请人： HITACHI LTD
发明人： SEKIYA MASATAKA , OKAMOTO CHIKAYUKI , NISHIJIMA HIDEO , KOBORI YASUNORI , JINNO KEIJIROU
IPC分类号： G11B15/467 , H04N5/783
摘要： PURPOSE:To attain complete noiseless still picture by detecting a bar noise on a pattern in the reproduction of a still picture from an output signal of two video heads and utilizing alternately a detection signal intermittently so as to cope with unbalance of noise detection. CONSTITUTION:A frequency division signal HS13 is fed to an HS frequency division circuit 20, inputted and the said frequency division circuit outputs an HS frequency division signal 23. A noise pulse 14 representing a bar noise is inputted to an input terminal S of an RS flip-flop 22. When the bar noise is detected from a video head CH-1 or CH-2, a 0 output of the RS flip-flop goes to ''H'' and a capstan 2 is driven.

29. 发明专利

JPS60210183A Control circuit for motor 失效
标题翻译：电机控制电路
公开(公告)号：JPS60210183A
公开(公告)日：1985-10-22
申请号：JP6334784
申请日：1984-04-02
申请人： Hitachi Ltd
发明人： OKAMOTO CHIKAYUKI , KOBORI YASUNORI , SEKIYA MASATAKA
IPC分类号： H02P29/00 , H02P1/16
CPC分类号： H02P1/16
摘要： PURPOSE:To remove a noise at the normal time by providing a time constant circuit, thereby effectively starting a motor. CONSTITUTION:When a start signal 18 becomes a L level, a transistor 22 is turned OFF, and a control signal 19 becomes a high voltage. Simultaneously, a transistor 17 is turned OFF, a charging from a constant-voltage source 16 through a resistor 15 to a capacity 14 is started, and a signal 20 gradually rises. When a motor 1 rotates one revolution, a FG signal generated from a generator 2 is added to the signal 20. An amplifier 3 outputs the FG signal to a frequency/ voltage converter 4 in this step. Since the rotation of the motor 1 sufficiently rises at this time point, the FG signal is correctly detected. Noise when the FG signal is detected is removed by a low pass filter which has the capacity 14 and a resistor 13.
摘要翻译：目的：通过提供时间常数电路来消除正常时的噪音，从而有效启动电机。构成：当启动信号18变为L电平时，晶体管22截止，控制信号19变为高电压。同时，晶体管17截止，从恒压源16通过电阻器15到容量14的充电开始，信号20逐渐上升。当电动机1旋转一圈时，从发生器2产生的FG信号被加到信号20上。放大器3在该步骤中将FG信号输出到频率/电压转换器4。由于电动机1的旋转在该时刻充分上升，所以正确地检测出FG信号。检测到FG信号时的噪声由具有容量14的低通滤波器和电阻13去除。

30. 发明专利

JPH0723421A REPRODUCTION SYSTEM CHANGEOVER CONTROLLER 失效
公开(公告)号：JPH0723421A
公开(公告)日：1995-01-24
申请号：JP15178493
申请日：1993-06-23
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： KAMITSUMA MITSUO , OKOCHI TAKEO , SEKIYA MASATAKA
IPC分类号： H04N5/765 , H04N9/80
摘要： PURPOSE:To set the reproduction system conformed to a tape by providing the reproduction system changeover controller to a conventional system configuration. CONSTITUTION:When a reproduction command is sent from a reproduction system changeover controller 1 to a reproduction device 3, the reproduction device 3 sets a VTR 9 to the reproduction state. The reproduction device 3 outputs a video signal to the NTSC changeover switch SW 4 and outputs a control signal recorded on the tape to the reproduction system changeover controller 1. The reproduction system changeover controller 1 discriminates whether or not the signal of the NTSC system is reproduced based on the frequency of the signal and outputs a video processing switching signal to the NTSC changeover switch SW4. When the NTSC SW is turned on, the video signal is fed to a video output form changeover device 7 and when the NTSC changeover switch is turned off, and the signal is sent to a PAL/SECAM/ MESCAM video processing unit 6 via a PAL/SECAM/MESECAM recording discrimination device 5 and in the case of the reproduction of the NTSC signal, a reproduction system control signal is outputted to the video output form changeover device 7 to control the reproduction system.

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