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    • 26. 发明专利
    • DATA COMPARISON METHOD
    • JPS54162432A
    • 1979-12-24
    • JP7080678
    • 1978-06-14
    • HITACHI LTD
    • KUBOKI SHIGEOHAMADA NAKAHARU
    • G06F7/04G06F7/02G06F7/22G06F17/30
    • PURPOSE:To reduce the number of circuits to make it possible to achieve a small chip size when circuits are made into a LSI, by giving a constitution where outputs of circuits are checked for coincidence successively in respect to timing. CONSTITUTION:Decoder 114 decodes the reset of counter 113 to input control signal a to register 101, and set data is read out to coincidence circuit 107. Next, calculated value 21a of counter 21 and output 101a of register 101 are checked for coincidence in 107, and obtained coincidence signal 107a is outputted to 101b through multiplexer 108. Next, output 101b is inputted to timing generation circuit 111 and generates control signal 114b through OR gate 112, counter 113 and decoder 114, and contents 102a of register 102 are read out to circuit 107. Similarly, outputs of registers 103, 104 and 105 are checked for coincidence. Thus, data of plural registers can be checked for coincidence by only one coincidence circuit.
    • 28. 发明专利
    • TREND GRAPH DISPLAY UNIT
    • JPS5468119A
    • 1979-06-01
    • JP13463177
    • 1977-11-11
    • HITACHI LTD
    • HAMADA NAKAHARUHARA TOSHITAKAYOSHIKAWA MITSUOHAYASHI YUKITO
    • G01R13/00G01R13/20G09G1/00G09G1/16G09G5/36
    • PURPOSE:To make smooth graph of steep gradience and easy to see, by providing the spot control section to produce the spot having the same time as either of the adjacent spots on the non-display scanning line between the adjacent spots on the time axis produced with the trend data memory every memory. CONSTITUTION:The trend graph generation section 400n is costituted with the trend data memory 410n, first and second comparison circuits 430n and 440n, data latch circuit 450n, and spot control logic 460n. To the memory 410n thus constituted, the data to be the beginning point of the trend curve is stored from the external information source via the input and output circuit 100 in the order of the time displayed, and the output of the memory 410n is fed to one input terminal A of the circuit 430n and the signal 302 representing the number of scanning line from the timing control circuit 300 is fed to the input terminal B. Furthermore, the output of the memory 410n delayed by one unit for the circuit 450n is fed to one input terminal A and the signal 302 representing the scanning line number is fed to other input terminal B. Thus, the spot is interpolated on the scanning line, enabling to make easy to see display.