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21. 发明专利

JP2009089384A Method and system for providing fast and accurate adaptive control methods 有权
标题翻译：提供快速和准确的自适应控制方法的方法和系统
公开(公告)号：JP2009089384A
公开(公告)日：2009-04-23
申请号：JP2008248645
申请日：2008-09-26
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIDAKA YASUO
IPC分类号： H03H21/00 , H04B3/06
CPC分类号： G05B13/021 , H03H21/0012 , H03H2021/0056
摘要： PROBLEM TO BE SOLVED: To provide a method and a system for providing accurate, adaptive control that substantially eliminates or reduces at least part of the disadvantages and problems associated with conventional optimization methods and systems.
SOLUTION: A method is provided that includes a step for preparing a low-pass filter in an adaptive filter architecture employing a fast steepest descent method. The method further includes decomposing an error signal, injecting a small change to one or more weight parameters for a linear combiner, measuring changes in an error correlation vector, and calculating one or more gradients, wherein the gradients are processed by the low-pass filter.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于提供精确的自适应控制的方法和系统，其基本上消除或减少与常规优化方法和系统相关联的至少一部分缺点和问题。解决方案：提供了一种方法，其包括在采用快速最速下降法的自适应滤波器架构中制备低通滤波器的步骤。该方法还包括分解误差信号，向线性组合器注入一个或多个权重参数的小变化，测量误差相关矢量的变化以及计算一个或多个梯度，其中梯度由低通滤波器。版权所有（C）2009，JPO＆INPIT

22. 发明专利

JP2008005483A Signal adjusting method and adaptive equalizer 有权
标题翻译：信号调整方法和自适应均衡器
公开(公告)号：JP2008005483A
公开(公告)日：2008-01-10
申请号：JP2007143820
申请日：2007-05-30
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIDAKA YASUO
IPC分类号： H04B3/04 , H04L27/01
CPC分类号： G01D21/00 , H04L25/03019 , H04L25/03343 , H04L25/061 , H04L25/068
摘要： PROBLEM TO BE SOLVED: To make the amount of compensation applied by equalizers match the level of attenuation owing to the media as closely as possible. SOLUTION: A method for adjusting a signal includes applying at least one of a loss compensation for frequency-dependent distortion and an offset compensation for DC-offset distortion to a signal before or after the distortion occurs. The method also includes sampling the signal and monitoring the sampled values for a first set of data patterns to generate a plurality of data values and boundary values. The method further includes adjusting at least one of the loss compensation and the offset compensation applied to the signal based on one or more of the sampled data values and boundary values associated with the detected data pattern in the first set of data patterns. The method further includes, after adjusting at least one of the loss compensation and the offset compensation, adjusting at least one of the loss compensation and the offset compensation applied to the signal as well based on one or more of the sampled data values and boundary values associated with the pattern in the second set of data patterns. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了使由均衡器施加的补偿量与由于介质尽可能接近的衰减水平相匹配。解决方案：一种用于调整信号的方法包括对失真发生之前或之后的信号应用用于频率相关失真的损耗补偿和DC偏移失真的偏移补偿中的至少一个。该方法还包括采样信号并监测第一组数据模式的采样值以产生多个数据值和边界值。该方法还包括基于与第一组数据模式中检测到的数据模式相关联的一个或多个采样数据值和边界值来调整施加到信号的损耗补偿和偏移补偿中的至少一个。该方法还包括：在调整损耗补偿和偏移补偿中的至少一个之后，基于一个或多个采样数据值和边界值来调整施加到信号的损耗补偿和偏移补偿中的至少一个与第二组数据模式中的模式相关联。版权所有（C）2008，JPO＆INPIT

23. 发明专利

JP2007325264A Signal adjusting method and receiver 有权
标题翻译：信号调整方法与接收机
公开(公告)号：JP2007325264A
公开(公告)日：2007-12-13
申请号：JP2007143822
申请日：2007-05-30
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIDAKA YASUO
IPC分类号： H04L27/01
CPC分类号： H04L25/063 , H04L25/03885
摘要： PROBLEM TO BE SOLVED: To maintain output characteristics independently from a communication path used for communication by matching a compensation quantity with an attenuation level due to a medium thereof. SOLUTION: The method has at least a step of combining a first path to a second path to generate an output signal. This method further has a step of using a clock signal and sampling an output signal to generate a plurality of data values and boundary values, wherein each of the values includes a high value or a low value based on the sampling of the output signal. The method further has a step of detecting a value transition between two successive data values and confirming a sampled boundary value between the two successive data values, and also has a step of differently adjusting the first offset compensation applied to the first path and the second offset compensation applied to the second path on the basis of at least a high value or a low value of the boundary value and on the basis of at least two data values having arrived immediately before the boundary value. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：通过将补偿量与由于其介质引起的衰减水平进行匹配，来保持独立于用于通信的通信路径的输出特性。解决方案：该方法至少具有将第一路径组合到第二路径以产生输出信号的步骤。该方法还具有使用时钟信号和采样输出信号以产生多个数据值和边界值的步骤，其中每个值基于输出信号的采样包括高值或低值。该方法还具有检测两个连续数据值之间的值转换并确认两个连续数据值之间的采样边界值的步骤，并且还具有不同地调整施加到第一路径的第一偏移补偿和第二偏移基于边界值的至少高值或低值，并且基于紧接在边界值之前到达的至少两个数据值，施加到第二路径的补偿。版权所有（C）2008，JPO＆INPIT

24. 发明专利

JP2007006499A Communication system, interconnection network cable and network elements 有权
标题翻译：通信系统，互连网络电缆和网络元件
公开(公告)号：JP2007006499A
公开(公告)日：2007-01-11
申请号：JP2006173057
申请日：2006-06-22
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIDAKA YASUO
IPC分类号： H04B3/02 , H04J99/00 , H04L25/03
CPC分类号： H04M3/40 , H04M3/18
摘要： PROBLEM TO BE SOLVED: To reduce effects of various types of interferences such as inter-symbol interferences and near-end crosstalk caused by attenuation of signals propagated in a cable.
SOLUTION: A network system includes a cross-connected cable assembly interconnecting two or more network elements. The cross-connected cable assembly enables reduction in the effects of near-end crosstalk. Network elements may support separate gain adjustments for individual ports to further enhance the effectiveness of cross-connected ports.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：减少由于在电缆中传播的信号的衰减引起的各种类型的干扰，如符号间干扰和近端串扰的影响。解决方案：网络系统包括互连两个或多个网络元件的交叉连接的电缆组件。交叉连接的电缆组件能够减少近端串扰的影响。网络元件可以支持各个端口的单独的增益调整，以进一步增强交叉连接端口的有效性。版权所有（C）2007，JPO＆INPIT

25. 发明专利

JP2004242312A Method and system for applying error compensation to signal using feedback control 有权
公开(公告)号：JP2004242312A
公开(公告)日：2004-08-26
申请号：JP2004027083
申请日：2004-02-03
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIDAKA YASUO
IPC分类号： H04B3/06 , H04L25/03
CPC分类号： H04L25/0305 , H04L2025/03617
摘要： PROBLEM TO BE SOLVED: To provide a method and system for applying error compensation to a signal using feedback control for eliminating defects related to previous error compensation methods and systems.
SOLUTION: The method of applying error compensation to a signal causes a transmitter to apply error adjustment to a signal and to transmit the signal over a channel at a channel speed. The method includes receiving the signal from the channel at the channel speed and sampling the signal at a speed lower than the channel speed in order to yield the sampled signal. The method includes discriminating an error related to the signal and determining compensation information for applying the error adjustment. The compensation information is based on the error and is determined at a compensation speed, which is lower than the channel speed. The method also includes communication of information to the transmitter for applying error adjustment. The information communicated to the transmitter comprises the compensation information. The information communicated to the transmitter may also comprises intermediate information from which the compensation information is discriminated.
COPYRIGHT: (C)2004,JPO&NCIPI

26. 发明专利

JP2004242305A Equalization of signal for transmission 审中-公开
公开(公告)号：JP2004242305A
公开(公告)日：2004-08-26
申请号：JP2004025618
申请日：2004-02-02
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KOYANAGI YOICHI , HIDAKA YASUO , GAI WEIXIN , TAMURA YASUTAKA
IPC分类号： H04L25/03 , H03H7/30 , H04B3/04
CPC分类号： H04L25/03343
摘要： PROBLEM TO BE SOLVED: To provide a high-speed and efficient equalization method and system for the transmission of a signal. SOLUTION: The equalization of a signal includes a step for receiving a signal of a data sequence having an amplitude. The adjustment of the data sequence signal is determined to equalize the data sequence signal. According to the adjustment, a control signal is generated to adjust the amplitude of the data sequence signal. The control signal has an analog form. The amplitude of the data sequence signal is adjusted using the control signal for equalizing the data sequence signal. COPYRIGHT: (C)2004,JPO&NCIPI

27. 发明专利

JPH10262037A CLOCK TRANSFER CONTROL CIRCUIT 失效
公开(公告)号：JPH10262037A
公开(公告)日：1998-09-29
申请号：JP6511897
申请日：1997-03-18
申请人： FUJITSU LTD
发明人： HIDAKA YASUO
IPC分类号： G06F1/06 , G06F1/12 , H03K19/0175 , H04L7/00
摘要： PROBLEM TO BE SOLVED: To provide a highly versatile clock transfer control circuit, without the need for difficult timing design capable of coping, even with the change of the frequency ratio of internal clocks and external clocks. SOLUTION: This circuit is provided with a shift register 3 for shifting delayed external clocks, for which the external clocks are delayed by the internal clocks and a combination logic circuit 35 for generating the timing control signals of the pulse width of one cycle of the internal clocks of the same frequency as the external clocks for all the values for which the integer N is scheduled of the frequency ratio. In such a manner, since the timing control signals are generated, corresponding to all the values for which the integer N is scheduled of the frequency ratio in the combination logic circuit, even the change in the frequency ratio is coped with, versatility is improved, and the need of the difficult timing design is eliminated as well.

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