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21. 发明专利

JP2011061152A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2011061152A
公开(公告)日：2011-03-24
申请号：JP2009212267
申请日：2009-09-14
申请人： Denso Corp , 株式会社デンソー
发明人： SAKURAI SHINYA , YAMADA AKIRA , NAGATA JUNICHI
IPC分类号： H01L27/04 , H01L21/76 , H01L21/762 , H01L21/822 , H01L21/8234 , H01L27/06 , H01L27/08 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide an inexpensive semiconductor device having high breakdown voltage without causing dead time even immediately after turning off of high reference potential changing in a pulse-like manner. SOLUTION: In this semiconductor device 22, (n) MOS transistor elements Tr 1 -Tr 12 (n≥2) are sequentially serially connected to one another by using a GND side and a power side as a first stage and an n-th stage, respectively; gate terminals of the MOS transistors Tr 2 -Tr 12 of the respective stages excluding the first stage are respectively sequentially connected between serially-connected resistive elements R 1 -R 12 of the respective stages; and gate terminals of at least the MOS transistors Tr 2 -Tr 6 of the lower stages, excluding the first stage, relative to the center are sequentially connected between serially-connected capacitive elements C 1 -C 12 of the respective stages through diode elements A 2 -A 6 each using a capacitive element side and a gate terminal side as an anode and a cathode, respectively. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供具有高击穿电压的便宜的半导体器件，即使在以类似脉冲的方式切换高参考电位之后即使紧接着也不会产生死区时间。解决方案：在该半导体器件22中，通过使用（n）个MOS晶体管元件Tr -Tr 12 （n≥2），顺序地串联连接 GND侧和电源侧分别作为第一级和第n级; 除了第一级之外的各个级的MOS晶体管Tr 2Tr 12 的栅极端子分别顺序地连接在串联连接的电阻元件R＆lt; SB＆ SB> -R SB = 12 ; 并且除了第一级之外，相对于中心的下级的至少MOS晶体管Tr 2Tr 6 的栅极端子依次连接在串联连接的电容分别通过二极管元件A 2 -A 6 的各级元件C C 12 元件侧和栅极端子侧分别作为阳极和阴极。版权所有（C）2011，JPO＆INPIT

22. 发明专利

JP2007201722A Output circuit 审中-公开
标题翻译：输出电路
公开(公告)号：JP2007201722A
公开(公告)日：2007-08-09
申请号：JP2006016764
申请日：2006-01-25
申请人： Denso Corp , 株式会社デンソー
发明人： KOMINAMI MASATSUNA , NAGATA JUNICHI
IPC分类号： H03F3/30 , H03K17/66
摘要： PROBLEM TO BE SOLVED: To provide a push-pull output circuit preventing oscillation of the output voltage.
SOLUTION: In the output circuit provided with: a source side output transistor Q1; a sink side output transistor Q2; diodes D1, D2 for connecting base terminals of the transistors Q1, Q2; and a current control transistor Q3 whose collector terminal is connected to the base terminal of the sink side output transistor Q2 to control the base current of the source side and sink side output transistors Q1, Q2, the collector terminal and the base terminal of the current control transistor Q3 are connected via a capacitive element 6. Thus, when a potential of a loop path comprising the transistors Q1, Q2 and the diodes D1, D2 is fluctuated by a noise for oscillating the output voltage, the potential variation is transmitted to the base terminal of the current control transistor Q3 and the current control transistor Q3 can supply a collector current for canceling the potential variation.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种防止输出电压振荡的推挽输出电路。解决方案：在输出电路中，提供有：源极侧输出晶体管Q1; 宿侧输出晶体管Q2; 用于连接晶体管Q1，Q2的基极的二极管D1，D2; 以及集电极端子连接到漏极侧输出晶体管Q2的基极的电流控制晶体管Q3，以控制源极侧和漏极侧输出晶体管Q1，Q2，集电极端子和基极端子的基极电流控制晶体管Q3通过电容元件6连接。因此，当包括晶体管Q1，Q2和二极管D1，D2的环路的电位由于用于振荡输出电压的噪声而波动时，电位变化被传输到电流控制晶体管Q3的基极端子和电流控制晶体管Q3可以提供用于消除电位变化的集电极电流。版权所有（C）2007，JPO＆INPIT

23. 发明专利

JP2007195006A Overcurrent detection circuit 审中-公开
标题翻译：过流检测电路
公开(公告)号：JP2007195006A
公开(公告)日：2007-08-02
申请号：JP2006012138
申请日：2006-01-20
申请人： Denso Corp , 株式会社デンソー
发明人： NAGATA JUNICHI , KOMINAMI MASATSUNA
IPC分类号： H03K17/08 , G01R19/165
摘要： PROBLEM TO BE SOLVED: To provide an overcurrent detection circuit capable of improving the accuracy of overcurrent detection by excluding Early effect caused in transistors configuring a current mirror circuit.
SOLUTION: The overcurrent detection circuit 21, wherein when the MOS transistor 2 is conductive to drive a load 1, the MOS transistor 2 supplies a current being 1/n of a load current to a MOS transistor 3, the current is mirrored by a current mirror circuit 6 to allow a current sensing resistor 10 and a voltage detection circuit 11 to detect an overcurrent, is configured such that an Early effect cancel circuit 29 is arranged among the current mirror circuit 6, the MOS transistor 3, and the current sensing resistor 10.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够通过排除构成电流镜电路的晶体管中引起的早期效应来提高过电流检测精度的过电流检测电路。解决方案：过电流检测电路21，其中当MOS晶体管2导通以驱动负载1时，MOS晶体管2将负载电流的1 / n的电流提供给MOS晶体管3，电流被镜像由电流镜电路6允许电流检测电阻10和电压检测电路11检测过电流，使得在电流镜电路6，MOS晶体管3和电流检测电阻10.版权所有（C）2007，JPO＆INPIT

24. 发明专利

JP2007010635A Method of regulating current detecting circuit and inspecting device 审中-公开
标题翻译：调节电流检测电路和检测器件的方法
公开(公告)号：JP2007010635A
公开(公告)日：2007-01-18
申请号：JP2005195555
申请日：2005-07-04
申请人： Denso Corp , 株式会社デンソー
发明人： KOMINAMI MASATSUNA , NAGATA JUNICHI
IPC分类号： G01R19/00 , G01R19/165
摘要： PROBLEM TO BE SOLVED: To provide a method of regulating a current detecting circuit and an inspecting device which can raise the accuracy of current detecting by the current detecting circuit.
SOLUTION: Current sources Cur1d-Cur4d and Cur1s-Cur4s are respectively provided to electrodes Ed1-Ed4 and Es1-Es4 arranged to a detected body (output transistor Mo). When the current is applied to the above detected body so that the current voltage characteristic of the current detecting circuit should be regulated, the current (but is also equally) is applied to the electrode pair of the detected body, respectively. Further, the current states of these current sources Cur1d-Cur4d and Cur1s-Cur4s is supervised, respectively. When the current capacity of this current source is less than the predetermined value, it is judged that a probe is in a noncontact state about the electrode corresponding to the current source.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种调节电流检测电路的方法和可以提高电流检测电路的电流检测精度的检查装置。解决方案：电流源Cur1d-Cur4d和Cur1s-Cur4分别提供给布置到检测体（输出晶体管Mo）的电极Ed1-Ed4和Es1-Es4。当将电流施加到上述检测体上使得电流检测电路的电流特性应受调节时，分别对检测体的电极对施加电流（但同样地）。此外，这些电流源Cur1d-Cur4d和Cur1s-Cur4s的当前状态分别被监视。当该电流源的电流容量小于预定值时，判断探头处于与电流源对应的电极的非接触状态。版权所有（C）2007，JPO＆INPIT

25. 发明专利

JP2005277860A Load driver, and high voltage application test method for load driver 有权
标题翻译：负载驱动器和负载驱动器的高电压应用测试方法
公开(公告)号：JP2005277860A
公开(公告)日：2005-10-06
申请号：JP2004089197
申请日：2004-03-25
申请人： Denso Corp , 株式会社デンソー
发明人： KITAGAWA MASAHIRO , NAGATA JUNICHI , KOJIMA AKIO
IPC分类号： G01R31/28 , H03K5/08 , H03K5/153 , H03K17/08 , H03K17/0812 , H03K17/082 , H03K17/10 , H03K17/687
CPC分类号： H03K17/0822 , H03K5/08 , H03K17/08122 , H03K17/102
摘要： PROBLEM TO BE SOLVED: To provide a load driver capable of more surely preventing simultaneous turning-on of two MOSFETs even in application of an overvoltage and easily executing a high voltage application test.
SOLUTION: In the load driver 21 for driving a load 2 wherein two FETs 3, 4 are connected in series at a low side of the load 2, a clamp circuit 9 (10) is connected between a drain and a gate of the FET 3(4), respectively, and a resistive element 11 and a switch circuit 22 are connected in series between the gate and the source of the FET 3. In the case of ordinary drive operations, the switch circuit 22 is closed, and in conducting the high voltage application test, the switch circuit 22 is opened and a high voltage is applied between the gate and the source, drain of each of the FETs 3, 4.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供能够更可靠地防止两个MOSFET的同时导通的负载驱动器，即使在施加过电压并且容易执行高电压应用测试时也是如此。解决方案：在用于驱动负载2的负载驱动器21中，其中两个FET3,4串联连接在负载2的低侧，钳位电路9（10）连接在漏极和栅极之间 FET 3（4）以及电阻元件11和开关电路22串联连接在FET3的栅极和源极之间。在普通驱动操作的情况下，开关电路22闭合，并且在进行高电压应用测试时，开关电路22断开，并且在每个FET 3,4的栅极和源极之间施加高电压。版权所有（C）2006，JPO＆NCIPI

26. 发明专利

JP2005269829A Power supply device 有权
标题翻译：电源设备
公开(公告)号：JP2005269829A
公开(公告)日：2005-09-29
申请号：JP2004081311
申请日：2004-03-19
申请人： Denso Corp , 株式会社デンソー
发明人： HAYAKAWA JUNJI , BAN HIROYUKI , NAGATA JUNICHI
IPC分类号： G05F1/56 , H02M3/155 , H02M3/158 , H05B37/02
CPC分类号： H02M3/158 , H02M2001/0045 , H02M2001/0048 , H02M2001/007 , Y02B70/1491
摘要： PROBLEM TO BE SOLVED: To provide a power supply device capable of realizing abrupt rising of an output voltage while reducing power loss and suppressing noise.
SOLUTION: The power supply device comprises a switching circuit 20 which selectively supplies an input voltage Vin supplied to a power conversion circuit 1 or an output voltage V1out outputted from the power conversion circuit 1, to a voltage drop power supply circuit 30. The switching circuit 20 supplies the input voltage Vin to the voltage drop power supply circuit 30 when an input voltage is fed to the power conversion circuit 1. Thus, the output voltage Vout of the voltage drop power supply circuit 30 is quickly raised. Then, if the output voltage V1out of the power conversion circuit 1 exceeds the output voltage Vout, the switching circuit 20 switches the voltage supplied to the voltage drop power supply circuit 30 to the output voltage V1out of the power conversion circuit 1. Thus, the difference between input and output voltages of the voltage drop power supply circuit 30 decreases to reduce power loss, suppressing noises generated at the power conversion circuit 1.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供能够在降低功率损耗和抑制噪声的同时实现输出电压的突然上升的电源装置。解决方案：电源装置包括切换电路20，其将提供给电力转换电路1的输入电压Vin或从电力转换电路1输出的输出电压V1out选择性地提供给电压降电源电路30。当输入电压被馈送到电力转换电路1时，开关电路20将输入电压Vin提供给电压降电源电路30.因此，电压降电源电路30的输出电压Vout迅速升高。然后，如果电力转换电路1的输出电压V1out超过输出电压Vout，则切换电路20将供给到电压降电源电路30的电压切换到电力转换电路1的输出电压V1out。因此，降压电源电路30的输入和输出电压之间的差异减小以减少功率损耗，抑制在电力转换电路1处产生的噪声。（C）2005年，JPO和NCIPI

27. 发明专利

JP2014110599A Two-wire differential voltage type output circuit and semiconductor device 审中-公开
标题翻译：双线差分电压型输出电路和半导体器件
公开(公告)号：JP2014110599A
公开(公告)日：2014-06-12
申请号：JP2012265176
申请日：2012-12-04
申请人： Denso Corp , 株式会社デンソー
发明人： KITAGAWA MASAHIRO , NAGATA JUNICHI
IPC分类号： H03K19/0175 , H04L25/02 , H04L25/10
摘要： PROBLEM TO BE SOLVED: To reduce noise by reducing an operating time difference between a pair of MOSFETs of an output stage.SOLUTION: A PMOSFET 1 and an NMOSFET 2 are connected between a DC power supply VD and an output terminal CANH and between an output terminal CANL and a ground, respectively. The PMOSFET 1 is driven from an input terminal S via a first pre-buffer circuit 5, and the NMOSFET 2 is driven from the input terminal S via an inverter circuit 7 and a second pre-buffer circuit 6. The output terminal CANH is connected to a gate of the NMOSFET 2 via a capacitor 3, and the output terminal CANL is connected to a gate of the PMOSFET 1 via a capacitor 4. If the PMOSFET 1 operates first, the capacitor 3 can rapidly drivingly increase a gate potential of the NMOSFET 2. If the NMOSFET 2 operates first, the capacitor 4 functions similarly.
摘要翻译：要解决的问题：通过减少输出级的一对MOSFET之间的工作时间差来降低噪声。解决方案：PMOSFET 1和NMOSFET 2连接在直流电源VD和输出端子CANH之间以及输出端端子CANL和接地。 PMOSFET1经由第一预缓冲电路5从输入端子S驱动，并且NMOSFET2经由反相器电路7和第二预缓冲器电路6从输入端子S驱动。输出端子CANH被连接经由电容器3连接到NMOSFET2的栅极，并且输出端子CANL经由电容器4连接到PMOSFET 1的栅极。如果PMOSFET 1首先工作，则电容器3可以快速地增加栅极电位 NMOSFET 2.如果NMOSFET 2首先工作，则电容器4的功能类似。

28. 发明专利

JP2012228116A Load drive device 有权
标题翻译：负载驱动装置
公开(公告)号：JP2012228116A
公开(公告)日：2012-11-15
申请号：JP2011095231
申请日：2011-04-21
申请人： Denso Corp , 株式会社デンソー
发明人： SENDA YASUTAKA , NAGATA JUNICHI
IPC分类号： H02M1/08 , H02M7/48
摘要： PROBLEM TO BE SOLVED: To prevent current from flowing round into an internal circuit or a reference point through a contact between plural drive circuits and a switching element.SOLUTION: Current flow-round prevention circuits 15 and 25 are placed between internal circuits 16 and 26 which current is likely to flow round into and need to be protected against it and an IGBT 1 which is a switching element. Then, the current flow-round prevention circuit 15 or 25 on either a drive circuit 10 or 20 side which is not operated is turned off to ensure that the gate voltage of the IGBT 1 acting as a switching element is not applied to the internal circuits 16 and 26 which need to be protected against a current flow-round. This makes it possible to prevent current from flowing round into either of the internal circuits 16 and 26.
摘要翻译：要解决的问题：为了防止电流通过多个驱动电路和开关元件之间的接触流入内部电路或参考点。解决方案：电流回流防止电路15和25放置在内部电路16和26之间，电流可能流入并需要被保护，并且作为开关元件的IGBT1。然后，将不工作的驱动电路10或20侧的电流回流防止电路15或25断开，以确保用作开关元件的IGBT1的栅极电压不施加到内部电路 16和26需要保护免受当前的流动。这使得可以防止电流流入内部电路16和26中的任何一个。版权所有：（C）2013，JPO和INPIT

29. 发明专利

JP2012114632A Load drive device 有权
标题翻译：负载驱动装置
公开(公告)号：JP2012114632A
公开(公告)日：2012-06-14
申请号：JP2010261158
申请日：2010-11-24
申请人： Denso Corp , 株式会社デンソー
发明人： MIURA RYOTARO , SADAMATSU HIROKAZU , NAGATA JUNICHI
IPC分类号： H03K17/08 , H03K17/687
摘要： PROBLEM TO BE SOLVED: To provide a load drive device that is reliable enough to suppress element destruction or the like and can ensure accuracy of a constant current supplied to a switching device such as an IGBT.SOLUTION: A voltage limiting circuit 6 is provided between a point between a first resistor 3 and a source of a first PchMOSFET 4, and an output terminal of an operational amplifier 5. The voltage limiting circuit 6 controls a gate voltage of the first PchMOSFET 4 such that a gate-source potential difference of the first PchMOSFET 4 is not excessive. For example, the gate voltage of the first PchMOSFET 4 is clamped with a clamp voltage, so that the gate-source voltage of the first PchMOSFET 4 is a preset voltage. This can prevent a potential difference exceeding a gate-source withstand voltage of the first PchMOSFET 4.
摘要翻译：要解决的问题：提供一种足够可靠的负载驱动装置，以抑制元件破坏等，并且可以确保提供给诸如IGBT的开关装置的恒定电流的精度。解决方案：电压限制电路6设置在第一电阻器3和第一PchMOSFET 4的源极之间的点与运算放大器5的输出端之间。限压电路6控制栅极电压第一PchMOSFET 4，使得第一PchMOSFET 4的栅源电位差不过大。例如，第一PchMOSFET 4的栅极电压用钳位电压钳位，使得第一PchMOSFET 4的栅极 - 源极电压为预置电压。这可以防止超过第一个PchMOSFET 4的栅极 - 源极耐受电压的电位差。版权所有：（C）2012，JPO＆INPIT

30. 发明专利

JP2012083851A Semiconductor device and manufacturing method of the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2012083851A
公开(公告)日：2012-04-26
申请号：JP2010227704
申请日：2010-10-07
申请人： Denso Corp , 株式会社デンソー
发明人： KAWAMOTO TEPPEI , NAGATA JUNICHI
IPC分类号： G05F3/30 , H01L21/822 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacturing method of the same.SOLUTION: A semiconductor device includes a first semiconductor element having PN junction, a second semiconductor element having PN junction, and a circuit including the first semiconductor element and the second semiconductor element as constituent elements, and an addition signal in which a first forward voltage generated in the PN junction of the first semiconductor element and a second forward voltage generated in the PN junction of the second semiconductor element are added is output from the circuit. In the semiconductor device, the first semiconductor element and the second semiconductor element are in serial connection, and at actual use temperature regions respectively of the first semiconductor element and the second semiconductor element, a temperature characteristic of a first signal output from the circuit when the circuit does not include the second semiconductor element as the constituent element and a temperature characteristic of a second signal output from the circuit when the circuit does not include the first semiconductor device are inverted.
摘要翻译：要解决的问题：提供一种半导体器件及其制造方法。解决方案：半导体器件包括具有PN结的第一半导体元件，具有PN结的第二半导体元件和包括第一半导体元件和第二半导体元件作为组成元件的电路，以及附加信号，其中第一从第一半导体元件的PN结中产生的正向电压和在第二半导体元件的PN结中产生的第二正向电压相加。在半导体器件中，第一半导体元件和第二半导体元件串联连接，并且在第一半导体元件和第二半导体元件的实际使用温度区域，当从第一半导体元件和第二半导体元件输出的第一信号的温度特性电路不包括第二半导体元件作为构成元件，并且当电路不包括第一半导体器件时从电路输出的第二信号的温度特性反转。版权所有（C）2012，JPO＆INPIT

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