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11. 发明专利

JP2007208773A Oscillator, pll oscillator, radio equipment 有权
标题翻译：振荡器，PLL振荡器，无线电设备
公开(公告)号：JP2007208773A
公开(公告)日：2007-08-16
申请号：JP2006026616
申请日：2006-02-03
申请人： Toshiba Corp , 株式会社東芝
发明人： SAI AKIHIDE , OKUNI HIDENORI , YAMAJI TAKAFUMI
IPC分类号： H03L7/099 , H03K3/03
CPC分类号： H03L7/0995 , H03L7/0891 , H03L7/18
摘要： PROBLEM TO BE SOLVED: To provide an oscillator, a PLL oscillator and radio equipment capable of optimizing a phase noise level and power consumption according to the switching of modulation systems and a propagation environment. SOLUTION: The oscillator is equipped with a plurality of oscillation parts connected with one another in parallel and a control part which controls the number of parallel connection of the plurality of oscillation parts based on an instruction signal showing precision allowed for an oscillation output of the oscillation parts. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种振荡器，PLL振荡器和能够根据调制系统的切换和传播环境来优化相位噪声电平和功耗的无线电设备。解决方案：振荡器配备有并联连接的多个振荡部分，以及控制部分，其基于表示允许振荡输出的精度的指令信号来控制多个振荡部分的并联数量的振荡部分。版权所有（C）2007，JPO＆INPIT

12. 发明专利

JP2007020101A Clock generator and wireless receiver employing the same 审中-公开
标题翻译：使用其的时钟发生器和无线接收器
公开(公告)号：JP2007020101A
公开(公告)日：2007-01-25
申请号：JP2005201979
申请日：2005-07-11
申请人： Toshiba Corp , 株式会社東芝
发明人： SAI AKIHIDE , UENO TAKESHI , YAMAJI TAKAFUMI , ITAKURA TETSURO
IPC分类号： H03L7/00
CPC分类号： H03L7/23 , H03L7/18
摘要： PROBLEM TO BE SOLVED: To provide a clock generator in which it is unnecessart to lay around long wiring for distributing a clock signal and which can matches phases between clock signals of the same frequency. SOLUTION: The clock generator 10 including a plurality of phase locked loops 12-1 to 12-n each for receiving a reference signal from a common reference signal source 11 to generate a plurality of clock signal groups of different frequencies, respectively, comprises: phase comparators 13-1 to 13-n each for generating a voltage signal corresponding to a phase difference between a phase of the reference signal and that of a feedback signal; VCOs 15-1 to 15-n which are controlled by voltage signals from the phase comparators 13-1 to 13-n; and frequency divider groups D1-Dm which are cascaded within a feedback path from outputs of the VCOs 15-1 to 15-n to feedback signal inputs of the phase comparators 13-1 to 13-n, wherein clock signal groups are extracted from outputs of the frequency divider groups D1-Dm. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种时钟发生器，其中不必要地布置用于分配时钟信号的长布线，并且可以匹配相同频率的时钟信号之间的相位。解决方案：时钟发生器10包括多个锁相环12-1至12-n，每个用于从公共参考信号源11接收参考信号，以分别产生不同频率的多个时钟信号组，包括：相位比较器13-1至13-n，用于产生对应于参考信号的相位与反馈信号的相位之间的相位差的电压信号; 由相位比较器13-1至13-n的电压信号控制的VCO 15-1至15-n; 以及分压器组D1-Dm，其在从VCO 15-1至15-n的输出的反馈路径内级联到相位比较器13-1至13-n的反馈信号输入，其中从输出中提取时钟信号组的分频器组D1-Dm。版权所有（C）2007，JPO＆INPIT

13. 发明专利

JP2005108874A Electronic circuit device including capacitive element 有权
标题翻译：包括电容元件的电子电路设备
公开(公告)号：JP2005108874A
公开(公告)日：2005-04-21
申请号：JP2003335951
申请日：2003-09-26
申请人： Toshiba Corp , 株式会社東芝
发明人： ITO TOMOHIKO , YAMAJI TAKAFUMI , ITAKURA TETSURO
IPC分类号： H01L23/522 , H01L21/768 , H01L21/822 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To provide an electronic circuit device including a capacitive element, capable of increasing the capacitance per unit area.
SOLUTION: The electronic circuit device including a plurality of capacitive elements being formed by a multilevel metallization in an integrated circuit has a pair of interdigital electrodes 101 and 102 combining the capacitive elements in the in-plane direction and the vertical direction of the multilevel metallization, and an electrode 104 for interrupting capacitive coupling of the interdigital electrodes 101 and 102 and the outer part of the capacitive element.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种包括电容元件的电子电路装置，其能够增加每单位面积的电容。解决方案：包括在集成电路中的多层金属化形成的多个电容元件的电子电路器件具有一对叉指电极101和102，它们在面内方向和垂直方向上组合电容元件多层金属化，以及用于中断指状电极101和102与电容元件的外部的电容耦合的电极104。版权所有（C）2005，JPO＆NCIPI

14. 发明专利

JP2004297718A Operational amplifying circuit 有权
公开(公告)号：JP2004297718A
公开(公告)日：2004-10-21
申请号：JP2003090835
申请日：2003-03-28
申请人： Toshiba Corp , 株式会社東芝
发明人： KUROSE DAISUKE , YAMAJI TAKAFUMI , UENO TAKESHI , ITO TOMOHIKO
IPC分类号： H03F3/45 , H03F1/22
摘要： PROBLEM TO BE SOLVED: To provide an operational amplifying circuit for reinforcing amplitude thereof without increasing power consumption.
SOLUTION: The operational amplifying circuit is composed of a differential pair 13 in which gate terminals become input terminals, a first cascode stage 11 for reinforcing output impedance by a boost amplifier and using conductive type transistors different from the differential pair, and a second cascode stage 12 using conductive type transistors same as the differential pair without using the boost amplifier, wherein a gate area of a transistor of the second cascode stage is set in size larger than a gate area of a transistor of the first cascode stage.
COPYRIGHT: (C)2005,JPO&NCIPI

15. 发明专利

JP2004236143A Pipeline type a/d converter 审中-公开
标题翻译：管路式A / D转换器
公开(公告)号：JP2004236143A
公开(公告)日：2004-08-19
申请号：JP2003024153
申请日：2003-01-31
申请人： Toshiba Corp , 株式会社東芝
发明人： YAMAJI TAKAFUMI , UENO TAKESHI
IPC分类号： H03M1/44 , H03M1/74
摘要： PROBLEM TO BE SOLVED: To provide a pipeline type A/D converter by which conversion characteristics with high precision are obtained in a desired signal band and with low power consumption and at a low cost.
SOLUTION: A conversion stage 12A at the initial stage in the pipeline type ADC comprises a sub-ADC 21 for converting an analog signal to be outputted from a sample and hold circuit into a digital signal, a sub-DAC 24 for converting the digital signal into the analog signal by using the number of capacitors corresponding to the digital signal, a vector filter 23 for filtering a selection vector signal by every element and for outputting a feedback vector signal having element values according to selected frequencies of each capacitor and a selector 22 for selecting each element of the feedback vector signal by the number corresponding to the digital signal in an ascending order of the element values and for generating the selection vector signal.
COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：提供一种流水线型A / D转换器，其以期望的信号频带和低功耗以低成本获得高精度的转换特性。解决方案：流水线型ADC的初始阶段的转换级12A包括用于将从采样和保持电路输出的模拟信号转换为数字信号的子ADC21，用于转换的子DAC24 通过使用与数字信号相对应的电容器的数量将数字信号转换为模拟信号;矢量滤波器23，用于通过每个元件对选择矢量信号进行滤波，并输出具有根据每个电容器的选定频率的元素值的反馈矢量信号;以及选择器22，用于按照元件值的升序选择与数字信号相对应的数量的反馈矢量信号的每个元素，并用于产生选择矢量信号。版权所有（C）2004，JPO＆NCIPI

16. 发明专利

JP2013074323A Time error estimation device, error correction device, and a/d converter 有权
标题翻译：时间错误估计装置，错误校正装置和A / D转换器
公开(公告)号：JP2013074323A
公开(公告)日：2013-04-22
申请号：JP2011209672
申请日：2011-09-26
申请人： Toshiba Corp , 株式会社東芝
发明人： SUGIMOTO TOMOHIKO , YAMAJI TAKAFUMI , MATSUNO JUNYA , FURUTA MASANORI
IPC分类号： H03M1/10
CPC分类号： H03M1/0836 , H03M1/1215
摘要： PROBLEM TO BE SOLVED: To precisely estimate a sampling time error of an A/D conversion part in A/D conversion in a time interleaving manner with simple constitution.SOLUTION: A time error estimation device of a time interleaving A/D converter which outputs a plurality of digital output signals, obtained by performing A/D conversion by a plurality of A/D conversion part respectively in different timing, from a plurality of output terminals is configured to estimate sampling time errors of the plurality of A/D conversion parts, and includes a correlator which finds a correlation value representing similarity between the plurality of digital output signals, and a weight adder which estimates the sampling time errors of the plurality of A/D conversion parts on the basis of a result obtained by adjusting the weight of the correlation value with a differential value of output signals of the plurality of A/D conversion parts.
摘要翻译：要解决的问题：以简单的结构以时间交织方式精确估计A / D转换中的A / D转换部分的采样时间误差。解决方案：时间交织A / D转换器的时间误差估计装置，其输出通过分别在不同时刻通过多个A / D转换部分进行A / D转换而得到的多个数字输出信号多个输出端被配置为估计多个A / D转换部分的采样时间误差，并且包括找出表示多个数字输出信号之间的相似度的相关值的相关器和估计采样时间误差的权重加法器基于通过利用多个A / D转换部分的输出信号的差分值调整相关值的权重而获得的结果，来产生多个A / D转换部分。版权所有（C）2013，JPO＆INPIT

17. 发明专利

JP2013074308A Analog-digital conversion device and signal processing system 有权
标题翻译：模拟数字转换器和信号处理系统
公开(公告)号：JP2013074308A
公开(公告)日：2013-04-22
申请号：JP2011209491
申请日：2011-09-26
申请人： Toshiba Corp , 株式会社東芝
发明人： WAKI NAOYA , MATSUNO JUNYA , YAMAJI TAKAFUMI , FURUTA MASANORI
IPC分类号： H03M1/12
CPC分类号： H03M1/0626 , H03M1/0836 , H03M1/1215
摘要： PROBLEM TO BE SOLVED: To reduce the size of an analog-digital conversion device and to decrease the throughput needed to correct an error due to a mismatch between interleaves.SOLUTION: The analog-digital conversion device converts an analog input signal into a digital output signal. The analog-digital conversion device includes an analog-digital conversion unit 12, a pseudo-alias signal generation part 114, a gain control part 116, and an alias signal correction part 118. The analog-digital conversion unit 12 converts the analog input signal into a plurality of digital signals. The pseudo-alias signal generation part 114 generates a pseudo-alias signal simulating an alias signal component included in a composite signal composed of the plurality of digital signals. The gain control part 116 generates a gain control signal controlling the gain of the digital output signal using the pseudo-alias signal. The alias signal correction part 118 corrects the alias signal component using the gain control signal.
摘要翻译：要解决的问题：为了减小模拟数字转换装置的尺寸并降低由于交错之间的不匹配而纠正错误所需的吞吐量。解决方案：模数转换器将模拟输入信号转换为数字输出信号。模拟数字转换装置包括模拟数字转换单元12，伪别名信号生成部分114，增益控制部分116和别名信号校正部分118.模拟数字转换单元12将模拟输入信号成多个数字信号。伪别名信号生成部分114生成模拟由多个数字信号组成的复合信号中包含的别名信号分量的伪别名信号。增益控制部分116使用伪别名信号产生控制数字输出信号的增益的增益控制信号。别名信号校正部分118使用增益控制信号校正别名信号分量。版权所有（C）2013，JPO＆INPIT

18. 发明专利

JP2010147698A Signal processing circuit and receiver using the same 审中-公开
标题翻译：使用信号处理电路和接收器
公开(公告)号：JP2010147698A
公开(公告)日：2010-07-01
申请号：JP2008321375
申请日：2008-12-17
申请人： Toshiba Corp , 株式会社東芝
发明人： FURUTA MASANORI , YAMAJI TAKAFUMI
IPC分类号： H04L27/38 , H04B1/16 , H04B1/26 , H04B1/30
CPC分类号： H04L27/22 , H04L27/38
摘要： PROBLEM TO BE SOLVED: To constitute a signal processing circuit which converts an over-sampled three-phase signal into an orthogonal signal of a baseband signal band having lower power consumption. SOLUTION: A signal processing circuit includes a decimation filter 100, which down-samples over-sampled first three-phase digital signals to obtain second three-phase digital signals, and a converter 200 which subjects the second three-phase digital signals to a three-phase to IQ conversion, and obtains orthogonal digital signals. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：构成将过采样三相信号转换为具有较低功耗的基带信号频带的正交信号的信号处理电路。解决方案：信号处理电路包括抽取滤波器100，其抽样过采样的第一三相数字信号以获得第二三相数字信号;以及转换器200，其使第二三相数字信号到三相到IQ转换，并获得正交数字信号。版权所有（C）2010，JPO＆INPIT

19. 发明专利

JP2009239653A Sample rate converter and receiver using the same 审中-公开
标题翻译：采样速率变换器和接收器
公开(公告)号：JP2009239653A
公开(公告)日：2009-10-15
申请号：JP2008083594
申请日：2008-03-27
申请人： Toshiba Corp , 株式会社東芝
发明人： FURUTA MASANORI , YAMAJI TAKAFUMI , UENO TAKESHI
IPC分类号： H03H17/00 , H03H17/02
CPC分类号： H03H17/0621 , H03H17/0282
摘要： PROBLEM TO BE SOLVED: To provide a sample rate converter in which a higher-order filter for removing folding noise can be configured in a small area. SOLUTION: A sample rate converter includes: a selector to select either one of a first feedback signal and an input signal and to obtain a selected input signal; a decimator performing decimation on an Nth-order integration signal in accordance with a decimation ratio to generate an output signal; an interpolator performing interpolation, corresponding to the decimation ratio, on the output signal to generate a second feedback signal; a multiplier which multiplies the second feedback signal by a selection coefficient to generate a multiplication signal; a subtractor which subtracts the multiplication signal from the selected input signal to generate a residual signal; an adder which adds a third feedback signal and the residual signal to sequentially generate integration signals; a register circuit configured to hold the integration signals; a selector to select the first feedback signal from the held integration signals; and a selector to select the third feedback signal from the held integration signals. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种采样率转换器，其中可以在小的区域中配置用于去除折叠噪声的高次滤波器。解决方案：采样率转换器包括：选择器，用于选择第一反馈信号和输入信号中的任一个并获得所选择的输入信号; 抽取器，根据抽取比率对N次积分信号执行抽取以产生输出信号; 对输出信号执行对应于抽取比例的内插的内插器，以产生第二反馈信号; 乘法器，其将第二反馈信号乘以选择系数以产生乘法信号; 减法器，其从所选择的输入信号中减去乘法信号以产生残余信号; 加法器，其添加第三反馈信号和残留信号以顺序地产生积分信号; 配置为保持积分信号的寄存器电路; 选择器，用于从保持的积分信号中选择第一反馈信号; 以及选择器，用于从保持的积分信号中选择第三反馈信号。版权所有（C）2010，JPO＆INPIT

20. 发明专利

JP2008311863A Multiple-input and multiple-output amplifier, and active inductor, filter and radio communication equipment using the same 审中-公开
标题翻译：多输入和多输出放大器及其主动电感器，滤波器和无线电通信设备
公开(公告)号：JP2008311863A
公开(公告)日：2008-12-25
申请号：JP2007156580
申请日：2007-06-13
申请人： Toshiba Corp , 株式会社東芝
发明人： YAMAJI TAKAFUMI , ITO RUI , ITAKURA TETSURO
IPC分类号： H03F3/68 , H03H11/48 , H03H11/50 , H04B1/04 , H04B1/30 , H04B1/40
CPC分类号： H04L27/3854 , H03F3/19 , H03F3/211 , H03F2200/451 , H04B1/40 , H04L27/233
摘要： PROBLEM TO BE SOLVED: To provide a multiple-input and multiple-output noninverting amplifier capable of amplifying a symmetrical multiphase signal, such as a symmetrical three-phase signal. SOLUTION: The noninverting amplifier has n external input terminals 11 to 13 for respectively receiving n (n≥3) input voltage signals whose sum is fixed, n amplifying units 31, and n external output terminals 21 to 23 for respectively outputting amplified n output voltage signals, wherein an amplifying unit has n-1 internal input terminals 311 and 312 connected to a combination of n-1 terminals, which is different in each amplifying unit, n-1 voltage-current converters 314 and 315 for converting input voltage signals from the internal input terminals into current signals and outputting them, and a load R for converting an addition current signal obtained by adding the current signals from the voltage-current converters 314 and 315 into an output voltage signal and leading the output voltage signal to the external output terminals 21 to 23. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供能够放大诸如对称三相信号的对称多相信号的多输入多输出同相放大器。解决方案：同相放大器具有n个外部输入端子11至13，用于分别接收总和固定的n（n≥3）个输入电压信号，n个放大单元31和n个外部输出端子21至23，用于分别输出放大 n个输出电压信号，其中放大单元具有连接到每个放大单元不同的n-1个端子的组合的n-1个内部输入端子311和312，用于转换输入的n-1个电压 - 电流转换器314和315 将来自内部输入端子的电压信号转换为电流信号并输出;以及负载R，用于将通过将来自电压 - 电流转换器314和315的电流信号相加而获得的相加电流信号转换为输出电压信号并使输出电压信号到外部输出端子21到23.
版权所有（C）2009，JPO＆INPIT

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