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11. 发明专利

JPH0879267A TRANSMISSION CONVERGENCE SUB-LAYER MULTIPLEX GENERATION /TERMINATION DEVICE 失效
公开(公告)号：JPH0879267A
公开(公告)日：1996-03-22
申请号：JP20956394
申请日：1994-09-02
申请人： NIPPON TELEGRAPH & TELEPHONE , NEC CORP
发明人： OGAWA TAKESHI , DOI YUKIHIRO , AZUMA ISAO , IMAGAWA HITOSHI , AKATA MASAO , MIURA TAKAO
IPC分类号： H04Q3/00 , H04J3/00 , H04J3/16 , H04L12/64 , H04L12/951 , H04Q11/04 , H04L12/28
摘要： PURPOSE: To reduce a hardware amount by sharing a circuit for generating or terminating a TC layer by plural paths. CONSTITUTION: A TC layer multiplex generation device 120 shares a TC layer computing part 121 for generating the TC layer by the respective paths, stores ATM layer information received for the respective paths in a register 123 and generates the TC layer by using a time division multiplex processing. Also, a TC layer multiplex termination device shares the TC layer computing part 121 for terminating the TC layer by the respective paths, stores the TC layer information received for the respective paths in the register and performs the processing of terminating the TC layer by using the time division multiplex processing every time the respective bytes of the respective paths of an STM highway incoming line arrive.

12. 发明专利

JP2003224595A BAND CONTROL SYSTEM FOR LINE CONTROL PART 审中-公开
公开(公告)号：JP2003224595A
公开(公告)日：2003-08-08
申请号：JP2002023192
申请日：2002-01-31
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： TSUNODA MITSUHARU , MATSUMOTO KAZUHIRO , KATO SOICHI , DOI YUKIHIRO , SAWADA OSAMU
IPC分类号： H04L12/815 , H04L12/863 , H04L12/873 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To prevent an overflow in an optical subscriber control part in the congestion of an outgoing ATM cell and the increase of a transfer delay time due to fluctuation and also to enable a line control part to control a band at every optical subscriber concerning the band control system of the line control part which is arranged between an ATM switch and the optical subscriber control part for storing a plurality of subscribers. SOLUTION: An out-going band control part of the line control part comprises a plurality of divided buffers for storing cells inputted from a plurality of connections by the unit of subscriber. The band control part also comprises a sorting processing part for identifying the header of the out-going input cell and allocating a corresponding buffer number to a subscriber number, and a reading processing part for reading the cell out to an output transmission line, which is stored in each buffer, by period corresponding to the band allocated by the unit of subscriber. Thus, the cell outputted from the output transmission line is controlled to be supplied to each optical subscriber control part. COPYRIGHT: (C)2003,JPO

13. 发明专利

JP2001016671A SLAVE SYNCHRONIZATION DEVICE 失效
公开(公告)号：JP2001016671A
公开(公告)日：2001-01-19
申请号：JP18180999
申请日：1999-06-28
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： SHIMOE TOSHIO , KATAKURA HITOSHI , DOI YUKIHIRO
IPC分类号： H04J3/06 , H04L7/00 , H04Q11/04
摘要： PROBLEM TO BE SOLVED: To enable a salve synchronization device replaceable by a DCS(digital clock supply device) to attain a slave synchronization at a low cost with high accuracy in a slave station adopting a slave synchronization system. SOLUTION: This slave synchronization device is provided with a clock monitor means 11 that detects a start point on a time base to which a reference clock synchronously with a transmission line is given, a high speed clock generating means 12 that is synchronously with the reference clock and generates a high-speed clock whose frequency is higher than the frequency of the reference clock, and a frequency synthesis means 13 that applies direct frequency synthesis processing to the high-speed clock to generate a clock to be supplied devices in a station and transmits the generated clock to a confounding path. Then the frequency synthesis means 13 has a frequency divider means 13a that conducts frequency division processing and is provided with an initializing means 14 that initializes the frequency divider means 13a synchronously with either of a front edge or a tail end edge of the clock received from an opposite system via the confounding path for a predetermined period in succession to the start point detected by the clock monitor means 11.

14. 发明专利

JPH0879268A ATM EXCHANGE 失效
公开(公告)号：JPH0879268A
公开(公告)日：1996-03-22
申请号：JP20973594
申请日：1994-09-02
申请人： NIPPON TELEGRAPH & TELEPHONE , NEC CORP
发明人： DOI YUKIHIRO , TAKAGI KOJI , AKATA MASAO
IPC分类号： H04L1/22 , H04L12/28 , H04Q3/00
摘要： PURPOSE: To simplify confounding control and to perform a cell continuity test of an ATM or the like without specially setting a route with a standby system device of cells for tests or control by realizing system' changeover control only through instruction to a functional block for performing system changeover CONSTITUTION: Instead of a line switching means inside a intersecting selector, filters and a multiplex circuit are provided. Tow filters 301-1 and 301-2 for filtering ATM cells are provided inside one intersecting selector to permit input from both active system and standby system. Also, a function for generating the ATM cells provided with the state information of respective devices in an overhead area inside the functional blocks 10-1 and 10-2 of the active system and the standby system is provided. Thus, when the ATM cells provided with the device state information of an active system device are generated also in the functional block 10-2 of the standby system and transmitted to the intersecting selectors 3-1 and 3-2, since the intersecting selectors pass them through, the ATM cells are passed through from either one of the active system and the standby system.

15. 发明专利

JPH11355304A CELL BUFFER AND ATM NODE 失效
公开(公告)号：JPH11355304A
公开(公告)日：1999-12-24
申请号：JP16374398
申请日：1998-06-11
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： MATSUOKA NAOKI , TOMONAGA HIROSHI , KAWARAI KENICHI , KATO TSUGIO , AMANO MITSUHARU , OMOTANI MASAAKI , GENDA KOICHI , DOI YUKIHIRO
IPC分类号： H04Q3/00 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To decrease the throughput that is necessary for the scheduling by distributing in time series and in the forward direction the information corresponding to the reading time point of a stored cell for each corresponding QoS(quality of service) in a set reading cycle and within an allowance range of deviation of the reading cycle. SOLUTION: A conflict control part 60 decides whether a binary information storing area is included in all storage areas of timing tables 53-1 to 53-N corresponding to each time that is updated in a cycle equal to the length of a cell. If only one binary information storing area exists, the part 60 gives a transmission request to the memory corresponding to the timing table having the information storing area among memories 110-1 to 110-N. At the same time, the part 60 performs the descending processing or service classes to the subsequent adjacent areas corresponding in time series to each other in regard to the binary information of logical value '1' which are individually stored in other areas. The memory that received a transmission request among buffer memories 111 reads out the first stored cell and sends it. A scheduling operation that decides the cell reading time is surely and effectively carried out with decrease of the throughput.

16. 发明专利

JP2000013397A ATM EXCHANGE 失效
公开(公告)号：JP2000013397A
公开(公告)日：2000-01-14
申请号：JP17889498
申请日：1998-06-25
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： TOMONAGA HIROSHI , MATSUOKA NAOKI , AMANO MITSUHARU , MATSUO SATOSHI , OMOTANI MASAAKI , GENDA KOICHI , DOI YUKIHIRO
IPC分类号： H04Q3/00 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To allow a virtual connection VC shaper to apply VC shaping only to a VC requiring shaping in the case that the VC shaper is provided to conduct VS/VD control. SOLUTION: A class VC distribution section 61 discriminates an input cell to decide whether a cell with a priority class is directly outputted or distributed to a corresponding buffer 62x or a cell of other VC shaping class and non- priority class is distributed to corresponding distribution buffers 62y, 62z. A control section 70 outputs cells with priority in the order of the priority class, the VC shaping class and the non-priority class.

17. 发明专利

JPH11252112A COMMUNICATION NETWORK OF MINIMUM BAND WARRANT TYPE 失效
公开(公告)号：JPH11252112A
公开(公告)日：1999-09-17
申请号：JP5369298
申请日：1998-03-05
申请人： NIPPON TELEGRAPH & TELEPHONE , FUJITSU LTD
发明人： OMOTANI MASAAKI , CHAGI SHINICHIRO , DOI YUKIHIRO , TOMONAGA HIROSHI , MATSUOKA NAOKI , AMANO MITSUHARU
IPC分类号： H04Q3/00 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To reduce functions of a terminal by avoiding cell discard at halfway nodes in a network and eliminating the need for an RM cell processing function for the terminal. SOLUTION: In this communication, RM(reliability maintenance) cells 11, 13 are used to transfer congestion information or a communication available speed of nodes 3, 4, 5 in the network to network entrance nodes 3, 5 so as to bring a frequency band of cells 10, 12 sent from the network entrance nodes 3, 5 to the network to a transmission available band or below. The network entrance node 3 has a function that sends the RM cell into the network and terminates the RM cell from the network and the network exit node 5 has a function of looping back the RM cell sent from the network. The network entrance node 3 extracts the looped-back RM cell 11, changes the cell read speed from a buffer, based on the information in the cell 11 and sends the cell to the network as a user information cell flow 10.

18. 发明专利

JPH11177566A RM CELL PROCESSOR 失效
公开(公告)号：JPH11177566A
公开(公告)日：1999-07-02
申请号：JP34459797
申请日：1997-12-15
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： TOMONAGA HIROSHI , MATSUOKA NAOKI , KAWARAI KENICHI , KATO TSUGIO , AMANO MITSUHARU , KATO YUJI , OMOTANI MASAAKI , GENDA KOICHI , DOI YUKIHIRO
IPC分类号： H04Q3/00 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To provide an RM cell processor reducing the scale of a device while realizing a conventional function at the RM cell processor of an ATM exchange housing ABR by VS/VD. SOLUTION: An input-side line interface part 100 is provided with a first VC shaper part 101 terminating an F-RM cell and inserting the F-RM cell based on congestion information of a B-RM cell from an output-side line interface part 300, the first output-side buffer part 103 of the B-RM cell, and a B-RM cell rewriting part 104 rewriting the B-RM cell from the part 103 to the parameter of a B-RM cell on the side of a call originating terminal. The part 300 is provided with a second output-side buffer part 303 of the F-RM cell and a second VC shaper part 301 terminating the B-RM cell from a call- incoming terminal side and looping the F-RM cell as the B-RM cell given congestion information on the call-incoming terminal as the B-RM cell.

19. 发明专利

JP2004145510A Duplex control system 审中-公开
公开(公告)号：JP2004145510A
公开(公告)日：2004-05-20
申请号：JP2002308119
申请日：2002-10-23
申请人： Fujitsu Ltd , Nippon Telegr & Teleph Corp , Oki Electric Ind Co Ltd , 富士通株式会社 , 日本電信電話株式会社 , 沖電気工業株式会社
发明人： TANAKA KAZUNORI , KONDO EIJI , DOI YUKIHIRO , SAWADA OSAMU , MATSUMOTO KAZUHIRO
IPC分类号： G06F11/20 , H04L1/22
摘要： PROBLEM TO BE SOLVED: To provide a duplex control system, which can switch a control route to an action system device when a malfunction occurs within a standby system device during a download operation.
SOLUTION: The duplex control system comprises a circuit 202 for determining the active system device, which determines the status of the upper device in an action state, on the basis of signals input by the both upper devices, and a selector 201, which selects a reset signal transmitted by the upper device in the action state. The control system comprises a control system selection register 203 which stores data for identifying the upper devices; a selector 204 when it enters a reset signal from the selector 201, which switches an output signal from the value stored in the control system selection register 203 to a result determined by the circuit 202; and a selector 205, which selects another control bus for the upper devices, in response to a selected result of the selector 204.
COPYRIGHT: (C)2004,JPO

20. 发明专利

JPH0964885A SYSTEM CHANGEOVER SYSTEM FOR SWITCH IN ATM EXCHANGE 失效
公开(公告)号：JPH0964885A
公开(公告)日：1997-03-07
申请号：JP21631895
申请日：1995-08-24
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： MAKIMOTO AKIO , OZAKI NAOHIKO , YAMANAKA NAOAKI , DOI YUKIHIRO
IPC分类号： H04Q3/00 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To realize changeover of an uninterruptible system in which loss of an active system cell, duplicated active system cells and inverted sequence of the active system cell are prevented in the case of changeover of ATM switches in duplicate. SOLUTION: The system is provided with an ACT(active/complementary transmission) bit provision section 102 providing an exclusive ACT bit to a cell 103 received by ATM switches 101 in duplicate. A cell selector 110 is provided to an output of the ATM switches 101 and the selector 110 pass through cells passing through an active system switch. Furthermore, when an active ATM switch is selected from a standby ATM switch, an output of the switch is tentatively stopped. Since ACT bits exclusive to both system input cells are provided, loss and duplicate of active cells are prevented at system changeover. Furthermore, the reversed sequence of active cells on the occurrence of system changeover is prevented by stopping tentatively the switch output.

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