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    • 120. 发明专利
    • Package for high frequency semiconductor
    • 高频半导体封装
    • JP2013235913A
    • 2013-11-21
    • JP2012106610
    • 2012-05-08
    • Toshiba Corp株式会社東芝
    • TAKAGI KAZUTAKA
    • H01L23/02H01L23/04
    • H01L2224/48091H01L2224/49175H01L2924/12032H01L2924/1305H01L2924/1461H01L2924/16195H01L2924/19107H01L2924/3011H01L2924/30111H01L2924/00014H01L2924/00
    • PROBLEM TO BE SOLVED: To provide a package for a high frequency semiconductor which improves the electric power resistance (current capacity) and reduces reflection loss without impairing band characteristics.SOLUTION: A package for a high frequency semiconductor includes: a metal wall 16 disposed on a conductor base plate 200 and including a semiconductor device therein; feed through lower layer parts 20 and feed through upper layer parts 22s which fit in through holes provided at an input/output part of the metal wall and disposed on the conductor base plate; feed through strip lines 19f, each of which is disposed between the feed through lower layer part and the feed through upper layer part and has impedance equal to or lower than characteristic impedance; impedance conversion circuits 19c, each of which is disposed at the exterior of the metal wall and converts the characteristic impedance into impedance of the feed through strip line; and leads 21 connected with the impedance conversion circuits.
    • 要解决的问题:提供一种提高耐电力(电流容量)并降低反射损耗的高频半导体封装,而不损害带的特性。解决方案:用于高频半导体的封装包括:金属壁16,设置在 导体基板200,其中包括半导体器件; 通过下层部件20进给,并且通过上层部件22s进给,该上层部件22s装配在设置在金属壁的输入/输出部分上并设置在导体基板上的通孔中; 通过带状线19f进给,每个条线布置在通过下层部分的进料和通过上层部分的进料之间,并具有等于或低于特性阻抗的阻抗; 阻抗转换电路19c,其各自设置在金属壁的外部,并将特性阻抗转换成通过带状线的馈送的阻抗; 以及与阻抗转换电路连接的引线21。