专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2004252886A Reference voltage generation circuit 审中-公开
公开(公告)号：JP2004252886A
公开(公告)日：2004-09-09
申请号：JP2003044867
申请日：2003-02-21
申请人： Toshiba Corp , 株式会社東芝
发明人： SHIMIZU KAN
IPC分类号： G05F3/24
摘要： PROBLEM TO BE SOLVED: To provide a circuit that generates a stable reference voltage of a high rejection ratio of a supply voltage superposed on the reference voltage.
SOLUTION: A low-pass filter LPF using a capacitor 12 is connected to an output end of a constant current circuit 11. The supply of power to a reference voltage generation part 13 via the low-pass filter LPF prevents the supply to the reference voltage generation part 13 of a high-frequency supply voltage fluctuation that the reference voltage generation part 13 can not reject. A total capacity to reject a supply voltage superposed on a reference voltage can be thus improved.
COPYRIGHT: (C)2004,JPO&NCIPI

2. 发明专利

JP2007011972A Direct current power supply voltage stabilization circuit 审中-公开
标题翻译：直流电源电压稳定电路
公开(公告)号：JP2007011972A
公开(公告)日：2007-01-18
申请号：JP2005195195
申请日：2005-07-04
申请人： Toshiba Corp , 株式会社東芝
发明人： SHIMIZU KAN
IPC分类号： G05F1/56
CPC分类号： G05F1/575
摘要： PROBLEM TO BE SOLVED: To provide a direct current power supply voltage stabilization circuit for easily preventing oscillation without increasing a voltage difference between input and output.
SOLUTION: A resistance element 38 is inserted between an output terminal of an output terminal transistor 37-1 and an output terminal 34 of a stabilization circuit 31 to use a signal taken out from a connection point N1 of an output terminal of an output transistor and the resistance element for phase compensation, thus preventing the occurrence of oscillation by phase delay due to a capacitive load 200 connected to the output of the stabilization circuit. The output transistors 37-1, 37-2 are constituted by connecting a plurality of transistors in parallel, and the resistance element 38 is inserted only between the output transistor 37-1 as a part thereof and the output terminal. By inserting the resistance element 38 only between the output transistor 37-1 as a part thereof and the output terminal, an increase in a voltage difference between the input and the output due to the resistance element inserted for the phase compensation is prevented.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供直流电源电压稳定电路，用于在不增加输入和输出之间的电压差的情况下容易地防止振荡。解决方案：电阻元件38插入在输出端子晶体管37-1的输出端和稳定电路31的输出端子34之间，以使用从输出端子的输出端子的连接点N1取出的信号输出晶体管和用于相位补偿的电阻元件，从而通过连接到稳定电路的输出的电容性负载200来防止由相位延迟引起的振荡的发生。输出晶体管37-1,37-2通过并联连接多个晶体管而构成，并且电阻元件38仅作为其一部分插入在输出晶体管37-1和输出端之间。通过仅在其输出晶体管37-1和输出端子之间插入电阻元件38，防止由于相位补偿插入的电阻元件而导致的输入与输出之间的电压差的增加。版权所有（C）2007，JPO＆INPIT

3. 发明专利

JP2005062898A Flat-panel display device and driving method of the same 审中-公开
标题翻译：平板显示装置及其驱动方法
公开(公告)号：JP2005062898A
公开(公告)日：2005-03-10
申请号：JP2004318224
申请日：2004-11-01
申请人： Toshiba Corp , 株式会社東芝
发明人： KINOSHITA KOHEI , ARAI TORU , SHIMIZU KAN
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36
摘要： PROBLEM TO BE SOLVED: To reduce the memory capacity needed for block driving of each horizontal pixel array. SOLUTION: A flat-panel display device is provided a display panel 3 having a plurality of pixels arrayed in a matrix, eight driver parts which drive eight pixel blocks, data supply buses SDL1 and SDL2 to which those driver parts are connected in order, and a liquid crystal controller 16 which distributes sequentially supplied pixel data to the data supply buses SDL1 and SDL2. The liquid crystal controller 16 is provided with a data distributing circuit DST including memories M1 to M3 each storing pixel data of one pixel block, and a sequence controller 16 which sections pixel data supplied in sequence from outside into pixel data blocks, writes two pixel data blocks to two memories in order, reads the two pixel data blocks stored in those two memories in parallel during the writing, and supplies those two pixel data blocks to corresponding data supply buses in the 1st and 2nd data supply buses SDL1 and SDL2. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：减少每个水平像素阵列的块驱动所需的存储器容量。解决方案：提供一种平板显示装置，具有排列成矩阵的多个像素的显示面板3，驱动八个像素块的八个驱动器部分，与这些驱动器部件连接的数据提供总线SDL1和SDL2 以及将顺序提供的像素数据分配给数据提供总线SDL1和SDL2的液晶控制器16。液晶控制器16设置有数据分配电路DST，包括存储器M1至M3，每个存储器存储一个像素块的像素数据;以及序列控制器16，将从外部依次提供的像素数据分割为像素数据块，写入两个像素数据按顺序分成两个存储器，在写入期间并行读取存储在这两个存储器中的两个像素数据块，并将这两个像素数据块提供给第一和第二数据提供总线SDL1和SDL2中的对应的数据提供总线。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2008252374A Circuit board 审中-公开
标题翻译：电路板
公开(公告)号：JP2008252374A
公开(公告)日：2008-10-16
申请号：JP2007089531
申请日：2007-03-29
申请人： Toshiba Corp , 株式会社東芝
发明人： TOKIWA MASARU , SHIMIZU KAN , KURODA KOJI
IPC分类号： H04L25/02 , G06F3/00 , H04B3/50 , H05K1/02
摘要： PROBLEM TO BE SOLVED: To suppress deterioration in signal waveform quality caused by an impedance discontinuous part that exists in the middle of a transmission path in a fast-speed signal transmission system for transmitting and receiving a synchronous high-speed pulse signal through one transmission path.
SOLUTION: In the signal transmission system for transmitting and receiving a synchronous high-speed pulse signal through one transmission path 13 between a transmitting side board 11, on which a transmitting side semiconductor device 112 is mounted, and a receiving side board 12, on which a receiving side semiconductor device 122 is mounted, In the transmitting side substrate 11, a connector 113 is mounted and a PCB wiring 114 is formed in a transmission path from the transmitting side semiconductor device 112 to the connector 113. The wiring length of the PCB wiring is set so as to make the round-trip transmission time of a signal propagating on the PCB wiring to be 1/4 or 1/4+n/2 (n is a positive integer) of a switching period of a pulse signal.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：为了抑制由用于发送和接收同步高速脉冲信号的快速信号传输系统中存在于传输路径中间的阻抗不连续部分引起的信号波形质量的劣化，一个传输路径。解决方案：在用于通过安装有发送侧半导体器件112的发送侧板11与接收侧板12之间的一个传输路径13发送和接收同步高速脉冲信号的信号传输系统中，，其上安装有接收侧半导体器件122.在发送侧基板11中，安装有连接器113，并且在从发送侧半导体器件112到连接器113的传输路径中形成PCB布线114.布线长度设置PCB布线，使得在PCB布线上传播的信号的往返传输时间为1/4或1/4 / n + 2（n为正整数），切换周期为脉冲信号。版权所有（C）2009，JPO＆INPIT

5. 发明专利

JPH11212519A LIQUID CRYSTAL DISPLAY DEVICE AND ITS DRIVING METHOD 失效
公开(公告)号：JPH11212519A
公开(公告)日：1999-08-06
申请号：JP1147498
申请日：1998-01-23
申请人： TOSHIBA CORP
发明人： SHIMIZU KAN
IPC分类号： G02F1/133 , G09G3/36
摘要： PROBLEM TO BE SOLVED: To provide a production method of a liquid crystal display device where a luminance difference is not visually recognized between the right and the left of a boundary of two adjacent picture element blocks. SOLUTION: This liquid crystal display device is provided with a scanning line driving circuit 3 which drives scanning lines, a signal line driving circuit 4 which drives signal lines, and a picture element data output circuit 5 which supplies picture element data to the signal line driving circuit 4 through plural video bus lines. The signal line driving circuit 4 consists of plural signal line driving parts 11a to 11d. The picture element data output circuit 5 supplies picture element data to each signal line driving part through a video bus line exclusively used for each signal line driving part. When supplying picture element data of a picture element nearest to the boundary of a picture element block to a video bus line, the picture element data output circuit 5 supplies picture data of a right or left adjacent picture element to the video bus line together. Thus, a luminance difference is not visually recognized between the right and the left of the boundary of the picture element block.

6. 发明专利

JP2003110032A SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
公开(公告)号：JP2003110032A
公开(公告)日：2003-04-11
申请号：JP2001303410
申请日：2001-09-28
申请人： TOSHIBA CORP
发明人： SHIMIZU KAN
IPC分类号： H01L27/04 , G05F3/26 , H01L21/822 , H01L21/8238 , H01L27/092 , H03F3/45 , H03F3/50
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of feeding a constant current and a constant voltage, the output current of which is not fluctuated with temperature fluctuation. SOLUTION: The semiconductor integrated circuit contains a constant voltage circuit, the constant voltage circuit is provided with first and second MIS transistors the doping amounts of which are substantially the same to each other. In the case where the channel lengths of the first and second MIS transistors are set to L1 and L2 and the threshold voltages of the first and second MIS transistors are set to Vth1 and Vth2, respectively, a relation of L2>L1 is satisfied and a difference between the gate voltages of the first and second MIS transistors is set to Vth1-Vth2.

7. 发明专利

JPH09258700A DRIVING CIRCUIT FOR LIQUID CRYSTAL DISPLAY DEVICE 失效
公开(公告)号：JPH09258700A
公开(公告)日：1997-10-03
申请号：JP6679796
申请日：1996-03-22
申请人： TOSHIBA ELECTRONIC ENG , TOSHIBA CORP
发明人： SHIMIZU KAN , ADACHI YOSHIMASA , MASUKO AKIRA
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36 , H04N9/30
摘要： PROBLEM TO BE SOLVED: To provide a driving circuit preventing a stray capacity in a part driven by a video signal from increasing. SOLUTION: Video signals VR, VG, VB corresponding to respective colors of three primary colors are successively sampled from video signal buses 14R, 14G, 14B, respectively by a sample-and-hold circuit 171 , 172 ,... operated by output of each shift stage FF1 , FF2 ,... of a shift register 15. Output of each sample-and- hold circuit operated with timing generated by a sample-and-hold circuit group 17 consisting of each of sample-and-hold circuits 171 , 172 (operated at subsequent timing),... is selected and switched by color changeover switches SW21 , SW22 ,... and outputted to a next stage. Output from corresponding color changeover switches SW21 , SW22 ,... is outputted to a signal line group 11 as a video signal by an output stage sample-and-hold circuit group 21 for each scanning line.

8. 发明专利

JPH09244589A DISPLAY DEVICE 失效
公开(公告)号：JPH09244589A
公开(公告)日：1997-09-19
申请号：JP5317996
申请日：1996-03-11
申请人： TOSHIBA CORP
发明人： SHIMIZU KAN
IPC分类号： G02F1/133 , G09G3/36
摘要： PROBLEM TO BE SOLVED: To reduce power consumption for data transmission and to reduce distortion of a signal waveform in data transmission by converting display data into Gray code display data and transmitting this converted data. SOLUTION: Display data expressed in binary number and a synchronizing signal, etc., are inputted to a control device 20. The inputted binary display data is converted into the Gray code display data by a Gray code conversion circuit 24 in the control circuit 20, and is sent to bus-like transmission line paths 22 connected with X driver ICs 14. In the X driver ICs 14, the Gray code display data to the amt. of one scanning line is received, and then this Gray code display data is converted into binary expression by a binary conversion circuit, and is stored in a data latch circuit. Then, the display data converted into binary expression is converted into a driving signal of a matrix type liquid crystal display part 12 by a D/A converter, and hence each pixel of the matrix type liquid crystal display part 12 is driven by this driving signal.

9. 发明专利

JPH08263012A DRIVING DEVICE AND DISPLAY DEVICE 失效
公开(公告)号：JPH08263012A
公开(公告)日：1996-10-11
申请号：JP6223895
申请日：1995-03-22
申请人： TOSHIBA CORP
发明人： SHIMIZU KAN
IPC分类号： G02F1/133 , G09G3/36 , H04N5/66
摘要： PURPOSE: To drive the display device having a large capacity at high speed by synchronizing a timing when a data holding means fetches display data with the output of display data from a data input part. CONSTITUTION: Delay circuits 112 are inserted to make the output timing of an input part 11 more coincide with the operating timing of other circuit. That is, a clock signal for controlling the operating timing of other circuit is distributed via a buffer and, then, the delay in the buffer is generated. Then, the output timing of the input part 11 and the operating timing of the other circuit are made coincide by adjusting the delay times of mask circuits 111 and the delay circuits 112. A START signal controlling the operation of a driver IC enable- chainingly connected in such a way is synchronized with the clock signal with which the input part 11 samples display data. Thus, since the margin for adjusting delay times of signals of both sides is reduced, the clock signal is made high speed.

10. 发明专利

JPH07140930A CONTROLLER FOR DISPLAY DEVICE, DISPLAY DEVICE USING THE SAME AND DISPLAY SYSTEM THEREOF 失效
公开(公告)号：JPH07140930A
公开(公告)日：1995-06-02
申请号：JP28632493
申请日：1993-11-16
申请人： TOSHIBA CORP
发明人： SHIMIZU KAN
IPC分类号： G02F1/133 , G09G3/36
摘要： PURPOSE:To obtain a controller for a dispay device capable of dealing with various display devices by successively outputting an (n) bit width gradation data group by one display line at every weight bit as one group. CONSTITUTION:A liquid crystal controller 81 of a liquid crystal display device 1 writes the eight bits width gradation data group by one display line inputted in parallel with every weight bit at every pixel based on the signal of a selection input circuit. Then, the controller 81 reads out the eight bits width gradation data group by one display line at every weight bit as one group based on the signal of a selection output circuit. The eight bits width gradation data group outputted from the liquid crystal controller 81 at every weight bit in time division is inputted to a serial-parallel conversion circuit 23 of a signal electrode drive circuit 21. Thus, the revision of the number of output terminals is unnecessitated even when the gradation data with bit width different from each other are inputted.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式