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1. 发明专利

JP2006227104A Display control apparatus 审中-公开
标题翻译：显示控制装置
公开(公告)号：JP2006227104A
公开(公告)日：2006-08-31
申请号：JP2005038063
申请日：2005-02-15
申请人： Toshiba Corp , 株式会社東芝
发明人： ARAI TORU , MASUKO AKIRA
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
摘要： PROBLEM TO BE SOLVED: To provide a display control apparatus reducing power consumption and an electromagnetic interference (EMI).
SOLUTION: A signal line driving circuit comprises; a plurality of source drivers IC1 to ICn which are cascade connected; and a controller 1 for controlling the source drivers IC1 to ICn. Each of the source drivers IC1 to ICn which are cascade connected is set in an active state or a stand-by sate for only a minimum necessary period and is set in a halt state for the other remaining period, and thereby, the power consumption of the source driver IC1 to ICn is substantially reduced.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种降低功耗和电磁干扰（EMI）的显示控制装置。解决方案：信号线驱动电路包括：串联连接的多个源极驱动器IC1〜ICn; 以及用于控制源极驱动器IC1至ICn的控制器1。串联连接的源极驱动器IC1〜ICn中的每一个被设置为活动状态或待机状态仅为最小必需周期，并且在另一个剩余周期中被设置为停止状态，从而将功率消耗源极驱动器IC1至ICn基本上减小。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2006106330A Liquid crystal display device and liquid crystal driving semiconductor device 审中-公开
标题翻译：液晶显示装置和液晶驱动半导体器件
公开(公告)号：JP2006106330A
公开(公告)日：2006-04-20
申请号：JP2004292559
申请日：2004-10-05
申请人： Toshiba Corp , 株式会社東芝
发明人： ARAI TORU , MASUKO AKIRA
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
摘要： PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of suppressing the increase of power consumption and EMI (Electromagnetic Interference) noise accompanying an increase of image data, and to provide a liquid crystal driving semiconductor device.
SOLUTION: The liquid crystal display device comprises: a liquid crystal controller 11 which has a function for producing an image data transfer starting signal and an image data transfer clock and for sequencing image data; a plurality of source drivers 21 which generate inner image data transfer clocks having a period longer than the period of the image data transfer clock and prepare rearranged image data arranged in the order suited for the output; signal lines 15 to 17 through which the image data transfer starting signal, the image data transfer clock and the image data are directly supplied; and a selection signal supply means 31 which supplies a selection signal for specifying the order and the number of the source drivers 21 to the source drivers 21.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：解决的问题：提供一种随着图像数据的增加而能够抑制功耗和EMI（电磁干扰）噪声增加的液晶显示装置，并提供液晶驱动半导体装置。液晶显示装置包括：液晶控制器11，其具有产生图像数据传送开始信号和图像数据传送时钟的功能，并用于对图像数据进行排序; 多个源极驱动器21，其生成具有比图像数据传送时钟的周期长的周期的内部图像数据传送时钟，并准备以适于输出的顺序排列的重新排列的图像数据; 图像数据传送开始信号，图像数据传送时钟和图像数据直接供给的信号线15〜17; 以及选择信号提供装置31，其将用于指定源驱动器21的顺序和数量的选择信号提供给源驱动器21.版权所有：（C）2006，JPO＆NCIPI

3. 发明专利

JP2008309896A Liquid crystal driver and liquid crystal display device 审中-公开
标题翻译：液晶驱动器和液晶显示器件
公开(公告)号：JP2008309896A
公开(公告)日：2008-12-25
申请号：JP2007155584
申请日：2007-06-12
申请人： Toshiba Corp , 株式会社東芝
发明人： ARAI TORU
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
CPC分类号： G09G3/3611 , G09G3/3688 , G09G2310/027 , G09G2310/08 , G09G2320/0223 , G09G2370/08
摘要： PROBLEM TO BE SOLVED: To provide a liquid crystal driver capable of automatically correcting a difference in delay time between inputted data clock and gradation data, and to provide a liquid crystal display device.
SOLUTION: The liquid crystal driver 1 comprises a delay time control part 11. The delay time control part 11 controls a delay time of the data clock such that the data clock is inputted from a data clock line and the phase difference with the gradation data inputted from a gradation data signal line to a first register 13 becomes a prescribed value during the inputting of a load signal which is a sampling signal of a second register. The delay time control part 11, after the completion of inputting of the load signal, retains the controlled delay time and outputs the delay times as a shift clock of a shift register 12.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供能够自动校正输入的数据时钟和灰度数据之间的延迟时间差的液晶驱动器，并提供液晶显示装置。解决方案：液晶驱动器1包括延迟时间控制部分11.延迟时间控制部分11控制数据时钟的延迟时间，使得数据时钟从数据时钟线输入，并且与在输入作为第二寄存器的采样信号的负载信号的输入期间，从灰度数据信号线输入到第一寄存器13的灰度数据变为规定值。延迟时间控制部分11在输入负载信号完成之后保持受控的延迟时间，并将延迟时间作为移位寄存器12的移位时钟输出。（C）2009年，JPO＆INPIT

4. 发明专利

JP2008107733A Liquid crystal display device and line driver 审中-公开
标题翻译：液晶显示设备和线路驱动器
公开(公告)号：JP2008107733A
公开(公告)日：2008-05-08
申请号：JP2006292849
申请日：2006-10-27
申请人： Toshiba Corp , 株式会社東芝
发明人： ARAI TORU , MASUKO AKIRA
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
CPC分类号： G09G3/3614 , G09G3/3677 , G09G2310/0286 , G09G2320/0247
摘要： PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of improving image quality. SOLUTION: The liquid crystal display device is provided with: a liquid crystal panel 41 having pixels 48; column drivers 21 each of which produces a voltage corresponding to image data and supplies gradation data with polarity reversed every two line selection lines 45, of a voltage supplied to the pixels 48 corresponding to the line selection lines 45, to a column selection line 43; line drivers 31 each of which makes a group of gradation data supplied to the pixels 48 connected to the line selection lines 45, every four line selection lines 45, drives the line selection lines 45 within the group in a first driving order different from the arrangement order on the liquid crystal panel 41 and further drives the line selection lines 45 in a second driving order different from the arrangement order on the liquid crystal panel 41 every two frames; and a control circuit 11 which supplies the image data to the column drivers 21. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供能够提高图像质量的液晶显示装置。解决方案：液晶显示装置设置有：具有像素48的液晶面板41; 列驱动器21，其产生对应于图像数据的电压，并且将提供给与行选择线45相对应的像素48的电压的每两行选择线45的极性反转的灰度数据提供给列选择线43; 线驱动器31，其每一个使得提供给连接到线选择线45的像素48的一组灰度数据，每四行选择线45以与布置不同的第一驱动顺序驱动该组内的线选择线45 在液晶面板41上排列，并且每两帧进一步以与液晶面板41上的布置顺序不同的第二驱动顺序驱动线选择线45; 以及将图像数据提供给列驱动器21的控制电路11.版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2005062898A Flat-panel display device and driving method of the same 审中-公开
标题翻译：平板显示装置及其驱动方法
公开(公告)号：JP2005062898A
公开(公告)日：2005-03-10
申请号：JP2004318224
申请日：2004-11-01
申请人： Toshiba Corp , 株式会社東芝
发明人： KINOSHITA KOHEI , ARAI TORU , SHIMIZU KAN
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36
摘要： PROBLEM TO BE SOLVED: To reduce the memory capacity needed for block driving of each horizontal pixel array. SOLUTION: A flat-panel display device is provided a display panel 3 having a plurality of pixels arrayed in a matrix, eight driver parts which drive eight pixel blocks, data supply buses SDL1 and SDL2 to which those driver parts are connected in order, and a liquid crystal controller 16 which distributes sequentially supplied pixel data to the data supply buses SDL1 and SDL2. The liquid crystal controller 16 is provided with a data distributing circuit DST including memories M1 to M3 each storing pixel data of one pixel block, and a sequence controller 16 which sections pixel data supplied in sequence from outside into pixel data blocks, writes two pixel data blocks to two memories in order, reads the two pixel data blocks stored in those two memories in parallel during the writing, and supplies those two pixel data blocks to corresponding data supply buses in the 1st and 2nd data supply buses SDL1 and SDL2. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：减少每个水平像素阵列的块驱动所需的存储器容量。解决方案：提供一种平板显示装置，具有排列成矩阵的多个像素的显示面板3，驱动八个像素块的八个驱动器部分，与这些驱动器部件连接的数据提供总线SDL1和SDL2 以及将顺序提供的像素数据分配给数据提供总线SDL1和SDL2的液晶控制器16。液晶控制器16设置有数据分配电路DST，包括存储器M1至M3，每个存储器存储一个像素块的像素数据;以及序列控制器16，将从外部依次提供的像素数据分割为像素数据块，写入两个像素数据按顺序分成两个存储器，在写入期间并行读取存储在这两个存储器中的两个像素数据块，并将这两个像素数据块提供给第一和第二数据提供总线SDL1和SDL2中的对应的数据提供总线。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2007279399A Display control apparatus 审中-公开
标题翻译：显示控制装置
公开(公告)号：JP2007279399A
公开(公告)日：2007-10-25
申请号：JP2006105742
申请日：2006-04-06
申请人： Toshiba Corp , 株式会社東芝
发明人： ARAI TORU
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
CPC分类号： G09G3/3688 , G09G2310/08 , G09G2330/021 , G09G2330/06
摘要： PROBLEM TO BE SOLVED: To provide a display control apparatus capable of reducing power consumption and EMI.
SOLUTION: In the display control apparatus in which source drivers are mutually cascade-connected, each source driver is provided with: a data input circuit 9 for inputting data; a clock input circuit 2 for inputting a clock signal; a latch circuit 5 for latching data synchronously with the clock signal; a data output circuit 10 for outputting the data input to the data input circuit 9; a clock output circuit 3 for outputting the clock signal input to the clock input circuit 2; a data input signal generation circuit 13 for outputting a data input signal to the succeeding stage; a drive start detection circuit for latching a start pulse signal or the data input signal output from the preceding stage synchronously with the clock signal; and a control circuit for starting the clock input circuit 2 during a period from the start of data latch in the initial stage up to the input of the data input instruction signal output from the preceding source driver to drive the clock input circuit 2 only for a prescribed period.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供能够降低功耗和EMI的显示控制装置。解决方案：在源极驱动器相互串联连接的显示控制装置中，每个源极驱动器具有：用于输入数据的数据输入电路9; 用于输入时钟信号的时钟输入电路2; 用于与时钟信号同步地锁存数据的锁存电路5; 数据输出电路10，用于输出输入到数据输入电路9的数据; 时钟输出电路3，用于输出输入到时钟输入电路2的时钟信号; 数据输入信号生成电路13，用于向后级输出数据输入信号; 驱动启动检测电路，用于与时钟信号同步地锁存起始脉冲信号或从前一级输出的数据输入信号; 以及控制电路，用于在从初始阶段的数据锁存开始到从前一个源极驱动器输出的数据输入指令信号的输入之间的一段时间内启动时钟输入电路2，以仅驱动时钟输入电路2 规定期限版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2006292848A Liquid crystal driving device and display device 审中-公开
标题翻译：液晶驱动装置和显示装置
公开(公告)号：JP2006292848A
公开(公告)日：2006-10-26
申请号：JP2005110280
申请日：2005-04-06
申请人： Toshiba Corp , 株式会社東芝
发明人： ARAI TORU
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
摘要： PROBLEM TO BE SOLVED: To provide a liquid crystal driving device and a liquid crystal display device that are adaptive to a necessary number of gradations, and can prevent a display characteristic from being lowered to decrease the number of wiring lines for reference voltage supply.
SOLUTION: A multiplexer 11 time-divides analog reference voltages V0 to Vn of a reference voltage generation section 8, and sample holding circuits SH0 to SHn constituting a sample holding section 13 provided on a source driver section 7 through a reference voltage transmission line 12 sample and hold the analog reference voltages V0 to Vn respectively in predetermined timing for a data transfer clock to be stopped; and the reference voltages becomes gradation voltages for the designated number of gradations through resistance division and gradation voltages corresponding to image data are selected by a D/A conversion section 17 and passed through an output circuit 24 to become liquid crystal driving outputs, which are applied to horizontal liquid crystal pixels respectively.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种适应于必要数量的等级的液晶驱动装置和液晶显示装置，并且可以防止显示特性降低以减少参考电压的布线数量供应。解决方案：多路复用器11对参考电压产生部分8的模拟参考电压V0至Vn进行时间分割，以及通过参考电压传输设置在源极驱动器部分7上的构成采样保持部分13的采样保持电路SH0至SHn 线12在预定定时分别采样并保持模拟参考电压V0至Vn，以便数据传输时钟停止; 并且参考电压通过电阻划分成为指定数量的灰度的灰度电压，并且通过D / A转换部分17选择与图像数据相对应的灰度电压，并通过输出电路24成为应用的液晶驱动输出到水平液晶像素。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2005286879A Image transmission device, image reception device, and image transmission system 有权
标题翻译：图像传输设备，图像接收设备和图像传输系统
公开(公告)号：JP2005286879A
公开(公告)日：2005-10-13
申请号：JP2004100545
申请日：2004-03-30
申请人： Toshiba Corp , 株式会社東芝
发明人： SASAKI TAKASHI , HACHIUMA MASAYUKI , ARAI TORU
IPC分类号： H04N11/04 , G06T9/00 , G09G5/00 , H04N1/41
CPC分类号： H04N11/046
摘要： PROBLEM TO BE SOLVED: To transmit or receive image data with low power consumption and less transmission lines. SOLUTION: An image transfer system is provided with a timing controller 1 converting image data of RGB into multi-valued data to be outputted, and a source driver 3 receiving the multi-valued data transferred from the timing controller 1 through wiring 2 and reconstructing original image data. The timing controller 1 has an image data capturing portion 4, a color-differentiating portion 5, an MED forecasting portion 6, a color difference calculating portion 7, an encoding portion 8, a D/A converter (DAC) 9, and a multi-valued output portion 10. The source driver 3 has a multi-valued input portion 11, an A/D converter (ADC) 12, an encoding reconstructing portion 13, an MED forecasting portion 14, a color difference reconstructing portion 15, and an image data output portion 16. Since the multi-valued data that are image data multi-valued are transferred through less transmission lines, a statistical character of image is used, power consumption is reduced, and the number of transmission lines is greatly reduced. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：以低功耗和较少的传输线传输或接收图像数据。解决方案：图像传送系统设置有将RGB的图像数据转换为要输出的多值数据的定时控制器1，以及源驱动器3，其接收从定时控制器1通过布线2传送的多值数据并重建原始图像数据。定时控制器1具有图像数据捕获部分4，色差部分5，MED预测部分6，色差计算部分7，编码部分8，D / A转换器（DAC）9和多源极驱动器3具有多值输入部分11，A / D转换器（ADC）12，编码重建部分13，MED预测部分14，色差重建部分15和由于作为多值的图像数据的多值数据通过较少的传输线路传送，因此使用图像的统计特性，功耗降低，并且传输线路数量大大减少。版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JPS63171094A CHROMINANCE SIGNAL STORING SYSTEM 失效
公开(公告)号：JPS63171094A
公开(公告)日：1988-07-14
申请号：JP175187
申请日：1987-01-09
申请人： TOSHIBA CORP
发明人： ARAI TORU
IPC分类号： H04N9/87
摘要： PURPOSE:To store chrominance signals without using a frame synchronizer with a TBC by writing the demodulated color signals from a VTR in a corresponding memory according to the phase information of a chrominance subcarrier (SC) through a write input register with a necessary address. CONSTITUTION:With outputs from a decoder 15 corresponding to count-up signals at every time a quadri counter 14 counts four SCs, the respective four registers of a write register 11 are controlled so as to incorporate input VTR demodulated chrominance signal in four states according to the phase information of the SC in the respective registers. The incorporated signal is written two-dimension ally in the respective memories of the memory 12 corresponding to the respective registers according to a horizontal signal, a phase pulse SC' which synchronizing with the zero-cross of the SC and horizontal and vertical addresses from horizontal and vertical address counters 16 and 17 which count the respective horizontal synchronizing signals. Therefore, the modulated chrominance signal having a time base error by a jitter, etc., can be stored without the time base error without using the frame synchronizer with the TBC. Reading out and outputting are executed in the same way, as well favorable still pictures can be obtained.

10. 发明专利

JPH10312175A LIQUID CRYSTAL DISPLAY DEVICE AND LIQUID CRYSTAL DRIVE SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH10312175A
公开(公告)日：1998-11-24
申请号：JP12244297
申请日：1997-05-13
申请人： TOSHIBA CORP
发明人： ARAI TORU , TAGUCHI TAKASHI , ITAKURA TETSURO
IPC分类号： G02F1/133 , G09G3/36
摘要： PROBLEM TO BE SOLVED: To provide a liquid crystal display device and a liquid crystal drive semiconductor device reducing power consumption and a cost by reducing memory capacity storing the image data. SOLUTION: This liquid crystal display device is provided with an active matrix type display matrix substrate 1 and a drive circuit 2a, and the drive circuit 2a is provided with a controller 12a and plural signal line drive ICs 11a. Switching elements 7, 31 interlocked with each other and switch controlled are provided respectively on the display matrix substrate 1 and the signal line drive ICs 11a. The required pixel data among the digital pixel data from the outside are selected by the switching element 31 through a high speed memory 13 and a low speed memory 14 in the signal line drive IC 11a to be converted to an analog voltage by a D/A converter 15. This analog voltage is supplied to signal lines 4 of answering pixels through the switching elements 7 in the display matrix substrate 1.

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