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    • 1. 发明专利
    • Nonvolatile semiconductor device
    • 非线性半导体器件
    • JP2008052811A
    • 2008-03-06
    • JP2006227510
    • 2006-08-24
    • Toshiba Corp株式会社東芝
    • FUJII SAYAKONAKAUCHI TAKAHIRONARUGE KIYOMI
    • G11C16/06H01L21/8247H01L27/115H01L29/788H01L29/792
    • PROBLEM TO BE SOLVED: To provide a semiconductor storage device wherein erroneous writing and erroneous erasure in a memory cell associated with minuteness of the memory cell are reduced. SOLUTION: The nonvolatile semiconductor device wherein a charge storage layer and a control gate layer are layered on a channel via an insulating film and memory cells MC11 to MC1n, ..., MCm1 to MCmn each having a diffusion layer forming a current path are disposed in a matrix shape sandwiching the channel and which has bit lines BL1 to BLn connected to the diffusion layers of the plurality of memory cells MC11 to MC1n, ..., MCm1 to MCmn is provided with transistors TR1 to TRn connected to the bit lines BL1 to BLn and discharging voltage applied to the diffusion layers of the memory cells MC11 to MCmn and having a prescribed value or more. Drains of the transistors TR1 to TRn are connected to the bit lines BL1 to BLn and sources thereof are grounded. Each of the transistors TR1 to TRn has a prescribed threshold and is carried out diode-connection. COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:提供一种半导体存储装置,其中与存储单元的细微关联的存储单元中的错误写入和错误擦除减少。 解决方案:其中电荷存储层和控制栅极层经由绝缘膜在沟道上层叠的非易失性半导体器件以及具有形成电流的扩散层的存储单元MC11至MC1n,...,MCm1至MCmn 路径被布置成夹着通道的矩阵形状,并且具有连接到多个存储单元MC11至MC1n,...,MCm1至MCmn的扩散层的位线BL1至BLn设置有连接到该多路存储器单元的晶体管TR1至TRn 位线BL1〜BLn和施加到存储单元MC11〜MCmn的扩散层的放电电压并具有规定值以上。 晶体管TR1至TRn的漏极连接到位线BL1至BLn,并且其源极接地。 晶体管TR1〜TRn中的每一个具有规定的阈值,并进行二极管连接。 版权所有(C)2008,JPO&INPIT