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1. 发明专利

JP2007242228A Method for manufacturing ferroelectric random access memory device 审中-公开
标题翻译：制造电磁随机存取存储器件的方法
公开(公告)号：JP2007242228A
公开(公告)日：2007-09-20
申请号：JP2007113399
申请日：2007-04-23
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： LEE JIN-WOO , JUNG DONG-JIN , KIM KI-NAM
IPC分类号： G11C11/22 , G11C14/00
CPC分类号： G11C11/22
摘要： PROBLEM TO BE SOLVED: To provide a ferroelectric random access memory device which is improved in reliability and can obtain a high sensing margin when performing write operation.
SOLUTION: The ferroelectric random access memory device comprises: word lines; cell electrode lines corresponding to each word line; bit lines arranged so as to cross the word lines; an memory cell array each of which includes a switching transistor and a ferroelectric capacitor; a row decoder circuit which generates a selection signal for selecting one of the word lines of the array and non-selection signal to be supplied to the unselected word lines, and which drives one of the cell electrode lines corresponding to the selected word line with the driving signal; and a driving signal generating circuit which generates a first level driving signal during write operation, and generates a second level driving signal higher than the first level during read operation.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种在执行写入操作时可靠性提高并且可以获得高感测余量的铁电随机存取存储器件。铁电随机存取存储器包括：字线; 对应于每个字线的单元电极线; 布置成跨越字线的位线; 每个存储单元阵列包括开关晶体管和铁电电容器; 行解码器电路，其生成用于选择要提供给未选字线的阵列的一条字线和非选择信号的选择信号，并且将与所选择的字线对应的单元电极线之一与驾驶信号; 以及驱动信号发生电路，其在写入操作期间产生第一电平驱动信号，并且在读取操作期间产生高于第一电平的第二电平驱动信号。版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2007294995A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2007294995A
公开(公告)日：2007-11-08
申请号：JP2007174271
申请日：2007-07-02
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIM KI-NAM , JUNG DONG-JIN
IPC分类号： H01L21/8246 , H01L21/8247 , H01L21/02 , H01L21/8242 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/78 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11502 , H01L28/55
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor which prevents the deterioration on the uses at high temperatures and of repeated read/wright, and has a large sensing margin.
SOLUTION: The semiconductor device includes a conductive layer formed on an active region of a semiconductor substrate having an element separation region to define the active region and a non-active region; a first insulating film formed on the semiconductor substrate with the conductive layer included; a capacitor including a lower electrode, a ferroelectric film and an upper electrode, which are laminated sequentially on the first insulating film, and formed such that the upper electrode and the ferroelectric film are overlapped on a part of the lower electrode; a second insulating film formed on the first insulating film with the capacitor included; a first opening formed so as to penetrate the second insulating film and exposing the lower electrode; a second opening which penetrates the second insulating film and the first insulating film and exposes an upper surface of the semiconductor substrate of a side of the conductive layer; and a contact layer to electrically connect the lower electrode and the semiconductor substrate of the side of the conductive layer through the first opening and the second opening.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体，其防止高温下的使用劣化和重复的读/写，并且具有大的感测余量。解决方案：半导体器件包括形成在具有元件分离区域的半导体衬底的有源区上以限定有源区和非有源区的导电层; 形成在具有导电层的半导体衬底上的第一绝缘膜; 包括下电极，铁电体膜和上电极的电容器，其顺序层叠在第一绝缘膜上，并且形成为使得上电极和铁电体膜重叠在下电极的一部分上; 形成在具有电容器的第一绝缘膜上的第二绝缘膜; 形成为穿透所述第二绝缘膜并使所述下电极露出的第一开口; 第二开口，其穿过所述第二绝缘膜和所述第一绝缘膜，并且暴露所述半导体衬底的所述导电层侧的上表面; 以及接触层，以通过第一开口和第二开口电连接导电层侧面的下电极和半导体衬底。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2000036571A CAPACITOR AND MANUFACTURE THEREOF 失效
公开(公告)号：JP2000036571A
公开(公告)日：2000-02-02
申请号：JP19232099
申请日：1999-07-06
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： JUNG DONG-JIN
IPC分类号： H01L21/02 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L21/8247 , H01L27/04 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/788 , H01L29/792 , H01L27/10
摘要： PROBLEM TO BE SOLVED: To provide a ferrodielectric capacitor capable of exhibiting the improved performance, by improving the crystallinity of a ferrodielectric material as well as the manufacture thereof. SOLUTION: A capacitor lower electrode 110, multilayer dielectric films 112, 113 containing relatively more Ti component than Zr component on the upper part and a capacitor upper electrode 114 are successively formed on the first insulating film 106 on a semiconductor substrate 100 so as to form a capacitor. Next, a material layer 116 for avoiding the diffusion of a capacitor composing material is formed on the capacitor as if wrapping the capacitor. Through these capacitor and manufacture thereof, the concentration ratio of Zr content and Ti content can be evenly distributed, thereby making feasible of improving the crystallinity of the ferrodielectric.

4. 发明专利

JP2003051584A Ferroelectric memory element having expanded plate line and its manufacturing method 有权
标题翻译：具有扩展板线的电磁记忆元件及其制造方法
公开(公告)号：JP2003051584A
公开(公告)日：2003-02-21
申请号：JP2002186422
申请日：2002-06-26
申请人： Samsung Electronics Co Ltd , 三星電子株式会社
发明人： NAM SANG-DON , LEE KYU-MANN , KIM HYUN-HO , JUNG DONG-JIN , KIM KI-NAM
IPC分类号： H01L27/105 , G11C11/22 , H01L21/8246 , H01L27/115
CPC分类号： H01L27/11502 , G11C11/22 , H01L27/11507
摘要： PROBLEM TO BE SOLVED: To provide a ferroelectric memory element and a method of manufacturing the element. SOLUTION: The ferroelectric memory element is directly connected to ferroelectric capacitors arranged on at least two rows in which one expanded plate lines adjoin each other in a cell array region. The ferroelectric capacitors arranged on at least the two rows can commonly use an upper electrode. In this case, the commonly used upper electrode is directly brought into contact with the expanded plate lines. Each plate line is constituted of a local plate line and a main plate line.
摘要翻译：要解决的问题：提供一种铁电存储元件和该元件的制造方法。解决方案：铁电存储元件直接连接到布置在至少两排的铁电电容器中，其中一个扩展板线在单元阵列区域中彼此相邻。布置在至少两排的铁电电容器通常可以使用上电极。在这种情况下，常用的上电极直接与扩展板线接触。每个板线由局部板线和主板线构成。

5. 发明专利

JP2001044377A ONE TRIPLE METAL WIRING TRANSISTOR, ONE CAPACITOR, AND ITS MANUFACTURE 失效
公开(公告)号：JP2001044377A
公开(公告)日：2001-02-16
申请号：JP2000224413
申请日：2000-07-25
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： JUNG DONG-JIN , KIM KI-NAM
IPC分类号： H01L27/105 , H01L21/02 , H01L21/316 , H01L21/8246 , H01L27/10 , H01L27/115
摘要： PROBLEM TO BE SOLVED: To achieve improved ohmic contact between the lower electrode of a ferroelectric capacitor and the ohmic contact of a contact plug by forming an interlayer insulating film and an oxide prevention film on a semiconductor substrate, then forming a diffusion prevention film pattern on it, and etching the exposed oxidation prevention film. SOLUTION: A first interlayer insulation-film 108 is deposited on a silicon substrate 100 including a transistor 104, then tungsten is deposited, and the tungsten is etched in a specific pattern for forming a bit line 110. Then, a second interlayer insulating film 112 is deposited on the first interlayer insulating film 108 including the bit line 110. Then, an oxidation prevention film 118 and a diffusion prevention film 132 are formed in lamination on it, the diffusion prevention film 132 is subjected to patterning for forming a diffusion prevention film pattern, and the exposed oxide film 118 is etched, thus improving the ohmic contact between the lower electrode of a ferroelectric capacitor and a contact plug 114.

6. 发明专利

JP2000076870A Non-volatile dram having ferroelectric capacitor 有权
标题翻译：具有电磁电容器的非挥发性DRAM
公开(公告)号：JP2000076870A
公开(公告)日：2000-03-14
申请号：JP22576299
申请日：1999-08-09
申请人： Samsung Electronics Co Ltd , 三星電子株式会社
发明人： JUNG DONG-JIN
IPC分类号： G11C14/00 , G11C11/22
CPC分类号： G11C11/22
摘要： PROBLEM TO BE SOLVED: To provide a non-volatile DRAM provided with a ferroelectric capacitor.
SOLUTION: A non-volatile DRAM includes two or more word lines WL1,..., WLi, at least one plate line PL, at least one pair of bit lines BLn and BLnB arranged so as to intersect the word lines WLi, and two or more memory cells MCi. Each of the memory cells MCi is connected between the bit lines BLn and BLnB, and composed of two access transistors T1 and T2, and two ferroelectric capacitors CF1 and CF2. A memory device includes a plate voltage supplying circuit connected to the plate line PL and it supplies either voltage of a first voltage or a second voltage to the plate line PL. The memory device consists of a precharge circuit 106 connected to the pair of bit lines BLn and BLnB.
COPYRIGHT: (C)2000,JPO
摘要翻译：要解决的问题：提供一种设置有铁电电容器的非易失性DRAM。解决方案：非易失性DRAM包括两个或多个字线WL1，...，WLi，至少一个板线PL，布置成与字线WLi相交的至少一对位线BLn和BLnB，以及两个或更多的存储单元MCi。每个存储单元MCi连接在位线BLn和BLnB之间，由两个存取晶体管T1和T2以及两个铁电电容器CF1和CF2组成。存储装置包括连接到板线PL的板电压供给电路，并且向板线PL提供第一电压或第二电压的电压。存储器件由连接到一对位线BLn和BLnB的预充电电路106组成。

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