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1. 发明专利

JP2006156670A Material for printed wiring board, printed wiring board, and method of manufacturing printed wiring board 有权
标题翻译：印刷线路板，印刷线路板材料及制造印刷线路板的方法
公开(公告)号：JP2006156670A
公开(公告)日：2006-06-15
申请号：JP2004344514
申请日：2004-11-29
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , MAEDA SHUJI
IPC分类号： H05K1/03 , H05K1/11 , H05K3/00
摘要： PROBLEM TO BE SOLVED: To provide a material for printed wiring board in which the quality of boring can be inspected easily because light in the visible region does not transmit from a part other than a through hole after boring, and to provide a printed wiring board having high conduction reliability by forming a through hole well using that material for printed wiring board, and to provide its manufacturing method.
SOLUTION: On the opposite surfaces of a hard insulation layer 2 formed by curing a thermosetting resin and not softening in the temperature range of 100-400°C, an adhesive resin layer 3 becoming fusible temporarily in that temperature range and a protective film 4 are arranged in this order and integrated to produce a material 1 for printed wiring board wherein at least one of the hard insulation layer 2, the adhesive resin layer 3 and the protective film 4 does not transmit light.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种印刷线路板的材料，其中可以容易地检查镗孔的质量，因为可见区域中的光在镗孔之后不会从通孔之外的部分传播，并且提供通过使用该印刷电路板用材料形成贯通孔，具有高导电可靠性的印刷电路板，并提供其制造方法。解决方案：在通过固化热固性树脂形成并且在100-400℃的温度范围内不软化而形成的硬质绝缘层2的相对表面上，粘合树脂层3在该温度范围内暂时变得易熔，薄膜4按此顺序排列并集成在一起，以生产印刷电路板的材料1，其中硬绝缘层2，粘合树脂层3和保护膜4中的至少一个不透光。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2004327510A Copper-plated laminated board for multilayered printed wiring board, multilayered printed wiring board and method of manufacturing the same 有权
公开(公告)号：JP2004327510A
公开(公告)日：2004-11-18
申请号：JP2003116466
申请日：2003-04-22
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , MAEDA SHUJI , FUKUI TARO
IPC分类号： B32B5/28 , B32B15/08 , H05K3/38 , H05K3/40 , H05K3/46
CPC分类号： H05K3/4655 , H05K3/386 , H05K3/4069 , H05K3/4617 , H05K3/4626 , H05K3/4652 , H05K2201/0129 , H05K2201/0195
摘要： PROBLEM TO BE SOLVED: To provide a copper-plated laminated board for multilayered printed wiring board for which alignment can be performed easily at the time of superimposing a plurality of one-sided circuit boards having adhesive layers upon another, and to provide a multilayered printed wiring board that can reduce the occurrence of defective positional deviations, because the board is manufactured by using the copper-plated laminated board, and to provide a method of manufacturing the wiring board. SOLUTION: In the copper-plated laminated board 1 for multilayered printed wiring board, copper foil 2 on which a circuit is not yet formed, a hard insulating layer 3 formed by curing a thermosetting resin, an adhesive layer 4 which can be melted temporarily by heating, and a protective film 5, are arranged in this order and integrated. The multilayered printed wiring board is manufactured by using the copper-plated laminated board. In addition, the manufacturing method of the multilayered printed wiring board can also be obtained. COPYRIGHT: (C)2005,JPO&NCIPI

3. 发明专利

JP2007266325A Printed-wiring material, and manufacturing method thereof, and manufacturing method of multilayer printed-wiring board 审中-公开
标题翻译：印刷材料及其制造方法，以及多层印刷线路板的制造方法
公开(公告)号：JP2007266325A
公开(公告)日：2007-10-11
申请号：JP2006089637
申请日：2006-03-28
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , MAEDA SHUJI
IPC分类号： H05K3/46 , H05K1/11 , H05K3/40
摘要： PROBLEM TO BE SOLVED: To provide a printed-wiring material capable of improving press formation properties when forming a multilayer printed-wiring board, enhancing the filling properties of the resin of an adhesive layer between circuits, and machining to the reliable multilayer printed-wiring board. SOLUTION: The printed-wiring board material is formed by providing an adhesive layer 2 on both the surfaces of an insulating base 1, and filling a conductive material 4 into a through-hole 3 that is open on both the surfaces. The thickness of one adhesive layer 2a in the adhesive layers 2 on both the surfaces is made larger than that of the other adhesive layer 2b. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够在形成多层印刷电路板时提高压制成形性的印刷布线材料，提高电路之间的粘合剂层的树脂的填充性能，并且将其加工成可靠的多层印刷电路板。解决方案：印刷电路板材料通过在绝缘基体1的两个表面上设置粘合剂层2并且将导电材料4填充到在两个表面上开口的通孔3中而形成。两个表面上的粘合剂层2中的一个粘合剂层2a的厚度被制成大于另一个粘合剂层2b的厚度。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2006156432A Method for manufacturing multilayer printed wiring board 审中-公开
标题翻译：制造多层印刷线路板的方法
公开(公告)号：JP2006156432A
公开(公告)日：2006-06-15
申请号：JP2004339974
申请日：2004-11-25
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , MAEDA SHUJI
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayer printed wiring board in which IVH connection can be attained while ensuring a space for containing or mounting an electronic circuit component, and the like.
SOLUTION: The method for manufacturing a multilayer printed wiring board comprises (1) a step for forming a first through hole 5 and a second through hole 6 by boring an unclad multilayer board 10, produced by arranging an adhesive resin layer 3 and a protective film 4 integrally in this order on the opposite sides of a hard insulating layer 2 formed by curing a thermosetting resin, from one protective film 4 side to the other protective film 4 side, (2) a step for filling the first through hole 5 with conductive paste 7, (3) a step for stripping the protective film 4 and projecting the conductive paste 7 from the adhesive resin layer 3 to obtain a bonding sheet 11, and (4) a step for arranging circuit boards having a third through hole 9 for containing a component on the opposite sides of the bonding sheet 11 while aligning the position of the third through hole 9 and the second through hole 6 and integrating them.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种制造可以实现IVH连接的多层印刷线路板的方法，同时确保用于容纳或安装电子电路部件的空间等。＆lt; P＆gt;解决方案：多层印刷电路板的制造方法包括：（1）通过将未粘合的多层板10进行镗孔来形成第一通孔5和第二通孔6的步骤，其通过布置粘合树脂层3和在从一个保护膜4侧到另一个保护膜4侧固化热硬化性树脂而形成的硬质绝缘层2的相反侧的整体上的保护膜4，（2）填充第一通孔 5，导电膏7，（3）剥离保护膜4并从粘合树脂层3突出导电膏7以获得粘合片11的步骤，以及（4）用于布置具有第三至第孔9，用于在对准第三通孔9和第二通孔6的位置并使它们一体化的同时在接合片11的相对侧上容纳部件。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2007093307A Inspection method for double-sided printed wiring board 有权
标题翻译：双面打印接线板检查方法
公开(公告)号：JP2007093307A
公开(公告)日：2007-04-12
申请号：JP2005280913
申请日：2005-09-27
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , HAMATSU TSUTOMU , MAEDA SHUJI
IPC分类号： G01N21/956 , H05K3/00 , H05K3/40
摘要： PROBLEM TO BE SOLVED: To provide an inspection method on a double-sided printed wiring board for checking whether or not foreign matter exists between via holes and a circuit pattern. SOLUTION: The plurality of via holes 4 for a circuit are formed in places other than a peripheral part of an insulating substrate 1. A plurality of through holes 5 for inspection are provided lengthwise and crosswise at regular intervals in the peripheral part of the insulating substrate 1 to form a test coupon 7 comprising a plurality of via holes 6 for inspection by filling the respective through holes 5 with a conductive paste 3. Further, metal layers 8 are formed on both sides of the insulating substrate 1, and then, circuit patterns 9 are formed by performing etching on places other than the peripheral part of the insulating substrate 1 while removing the metal layers 8 in the peripheral part of the insulating substrate 1. The surface thus exposed of the conductive paste 3 in the via holes 6 for inspection is observed to check whether or not foreign matter 15 exists. Based on the result thereof, it is determined whether or not the foreign matter 15 exists between the conductive paste 3 in the via hole 4 and the metal layers 8. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于检查通孔和电路图案之间是否存在异物的双面印刷线路板上的检查方法。解决方案：用于电路的多个通孔4形成在除了绝缘基板1的周边部分之外的位置。多个用于检查的通孔5在周边部分中以规则的间隔纵向和横向设置绝缘基板1形成测试试样7，其包括多个通孔6，用于通过用导电膏3填充相应的通孔5进行检查。此外，金属层8形成在绝缘基板1的两侧，然后通过在除绝缘基板1的周边部分中的金属层8之外进行除了绝缘基板1的周边部分之外的部分进行蚀刻来形成电路图案9.由此，导电膏3暴露在通孔中的表面观察6检查是否存在异物15。基于其结果，确定在通孔4中的导电浆料3和金属层8之间是否存在异物15。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2006066738A Multi-layer printed wiring board, copper-clad laminate therefor, and method for manufacturing the same 有权
标题翻译：多层印刷布线板及其制造方法及其制造方法
公开(公告)号：JP2006066738A
公开(公告)日：2006-03-09
申请号：JP2004249210
申请日：2004-08-27
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , MAEDA SHUJI
IPC分类号： H05K3/46 , B32B15/08
摘要： PROBLEM TO BE SOLVED: To provide a copper-clad laminate for a multi-layer printed wiring board for highly precisely maintaining the shape of a via hole, and for satisfactorily packing resin between circuits, and to provide a multi-layer printed wiring board which is excellent in insulation and its manufacturing method by manufacturing the multi-layer printed wiring board by using the copper-clad laminate for the multi-layer printed wiring board. SOLUTION: This copper-clad laminate for a multi-layer printed wiring board is configured so that a copper foil, a hard insulating layer formed by hardening thermosetting resin so as not to be softened in a temperature range ranging from 100°C to 400°C, an adhesive resin layer formed so as to be temporarily melted in the temperature range and a protection film can be arranged and integrated in this order. The adhesive resin layer is configured so that the rate of minimum melding viscosity (A) measured by a melting viscosity measuring unit after heat treatment in 100°C and 90 minutes to minimum melting viscosity (B) before the heat treatment can satisfy (a) formula: 1≤(A/B)≤10. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供一种用于高精度地保持通孔形状的多层印刷电路板的覆铜层压板，并且令树脂在电路之间令人满意地包装，并提供多层印刷通过使用用于多层印刷线路板的覆铜层压板，制造多层印刷线路板的绝缘性优异的布线板及其制造方法。＆lt; P＆gt;解决方案：用于多层印刷线路板的该覆铜层压板被构造成铜箔，硬质绝缘层，其通过硬化热固性树脂而形成，以便在100℃的温度范围内不被软化在400℃下，可以在温度范围内暂时熔融形成的粘合树脂层和保护膜以这种顺序排列和整合。粘合树脂层被配置为使得通过热处理后的熔融粘度测量单元在100℃和90分钟内测量的最小熔融粘度（A）至热处理前的最低熔融粘度（B）的速率可以满足（a）公式：1≤（A / B）≤10。版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JP2006013172A Method for manufacturing multilayer wiring board 审中-公开
标题翻译：制造多层接线板的方法
公开(公告)号：JP2006013172A
公开(公告)日：2006-01-12
申请号：JP2004188794
申请日：2004-06-25
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , MAEDA SHUJI
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayer wiring board in which through holes enabling a component to be mounted with a pin while communication reliability is secured through simple stages can be formed when the multilayer wiring board where interlayer connections are made through inter-statial via holes (IVH) is manufactured.
SOLUTION: The multilayer wiring board is manufactured by molding a laminate of sheet materials 1 having an insulating layer 3, a conductor layer 2, etc., together in one body. The sheet materials 1 include a sheet material where a patterned conductor layer 2 and insulating layer 3 are laminated, and the insulating layer 3 has a through hole 5 filled with a conductive material. The sheet materials 1 arranged as outermost layers on one side or both the sides of the laminate each has a surface type conductor layer 2 which is arranged on the outermost surface of the laminate and an insulating film 3 laminated on the conductor layer 2, and the insulating layer 3 has no through hole 5. After the laminate is molded in one body, a through hole 8 is bored in the obtained molding and a conductor film 9 is formed on its internal surface.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：解决问题的方案：为了提供一种多层布线板的制造方法，其中，当多层布线板的层间连接时，可以形成多孔布线板，其中通孔能够使部件安装有引脚，同时通过简单的阶段确保通信可靠性通过制成通孔（IVH）。解决方案：多层布线板通过将具有绝缘层3，导体层2等的片材1的层压体在一体成型而成型而制造。片材1包括层叠图案化导体层2和绝缘层3的片材，绝缘层3具有填充有导电性材料的通孔5。在层叠体的一侧或两侧配置为最外层的片材1具有布置在层叠体的最外表面上的表面型导体层2和层叠在导体层2上的绝缘膜3，绝缘层3没有通孔5.在将层压体模制成一体之后，在所获得的模制品中钻出通孔8，并且在其内表面上形成导体膜9。版权所有（C）2006，JPO＆NCIPI

8. 发明专利

JP2004179341A Method for manufacturing printed wiring material 审中-公开
公开(公告)号：JP2004179341A
公开(公告)日：2004-06-24
申请号：JP2002342900
申请日：2002-11-26
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , MAEDA SHUJI , NISHIMOTO SHINYA
IPC分类号： H05K3/38 , H05K3/18 , H05K3/22
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a printed wiring material for forming circuits with fine wiring, which ensures adhesiveness of circuits to an insulating layer.
SOLUTION: The method comprises steps of forming a B-stage insulating layer 3 on a surface of a substrate 2 by applying a resin film 1 having a thermosetting resin as a main component to the substrate 2, forming a circuit 4 by plating on a surface of the insulating layer 3, pressing the resultant to embed the circuit 4 into the insulating layer 3, and completely curing the insulating layer 3 up to a C-stage.
COPYRIGHT: (C)2004,JPO

9. 发明专利

JP2004050655A Forming method for insulating resin layer onto wiring board 审中-公开
公开(公告)号：JP2004050655A
公开(公告)日：2004-02-19
申请号：JP2002211910
申请日：2002-07-22
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： NISHIMOTO SHINYA , MAEDA SHUJI , KANETANI DAISUKE
IPC分类号： B29C43/10 , B29C43/18 , B29C43/56 , B29K101/10 , B29L9/00 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To reduce the generation of voids in an insulating resin layer which is formed by hardening a thermosetting resin film. SOLUTION: A laminated article 5 is heated between hot platens 11 and 11 being confronted with each other under a pressure-reduced atmosphere. At the same time, a diaphragm 16 comprising an elastic body which is arranged in a manner to cover one hot platen 11 is expanded by compressed air, and the laminated article 5 is pressurized under a state being pressed to the other hot platen 11. Thus, the thermosetting resin film 3 forms the hardened insulating resin layer on the wiring board 2 by this forming method for the insulating resin layer onto the wiring board. At least to either one of molding platens 12 and 12 to which the confronted hot platens 11 and 11 are respectively attached, an oscillating member which applies a vibration is attached, and the vibration is applied to the laminated article 5 which is heat-pressurized between the hot platens 11 and 11 by the oscillating member. COPYRIGHT: (C)2004,JPO

10. 发明专利

JP2003347744A Resin film for manufacturing multilayer printed circuit board 审中-公开
标题翻译：用于制造多层印刷电路板的树脂膜
公开(公告)号：JP2003347744A
公开(公告)日：2003-12-05
申请号：JP2002154806
申请日：2002-05-28
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , MAEDA SHUJI , NISHIMOTO SHINYA
IPC分类号： B32B27/20 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a resin film for manufacturing a multilayer printed circuit board, which enables formation of an insulating layer having excellent insulation reliability, without damaging its adhesion to a conductive layer.
SOLUTION: The resin film 3 for manufacturing a multilayer printed circuit board is adhered to the surface of a circuit board 4 by vacuum lamination. In the lamination, stacking is performed using a first layer consisting of a thermosetting resin composition which comprises rubber constituents soluble in alkali and inorganic fillers, and a second layer consisting of a thermosetting resin composition which comprises neither the rubber constituents nor the inorganic fillers.
COPYRIGHT: (C)2004,JPO

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