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1. 发明专利

JPH09305661A SOURCE AUTHENTICATING METHOD 失效
公开(公告)号：JPH09305661A
公开(公告)日：1997-11-28
申请号：JP11601296
申请日：1996-05-10
申请人： HITACHI LTD
发明人： KAWAZURE YOSHIAKI , CHIBA HIROYUKI
IPC分类号： G06F15/00 , G06F21/00 , G06F21/44 , G06Q10/00 , G06Q30/06 , G06Q50/00 , G09C1/00 , H04L9/32 , G06F17/60
摘要： PROBLEM TO BE SOLVED: To provide a souce authenticating method for making the generation responsible source of transmission data clear. SOLUTION: A means for mutually authenticating two parties actually executing communication is buried in an electronic envelope part (604 and 616) and a means for authenticating a data generation responsible person by a data delivery requesting person is buried in a ciphering data part (602) so that a data dilivery agent authenticates the data generation resonsible source by the electronic envelope 604 part. The electronic envelope is re-generated so as to permit the data delivery requesting person to authenticate the data delivery agent (616) and delivered to the data delivery requesting person so that the data delivery agent is authenticated and the data source is authenticated by a cipher or data 622 part.

2. 发明专利

JPH07146787A METHOD FOR RETRIEVING INFLUENCE PROGRAM 失效
公开(公告)号：JPH07146787A
公开(公告)日：1995-06-06
申请号：JP29316693
申请日：1993-11-24
申请人： HITACHI LTD
发明人： IWATA TAKAO , CHIBA HIROYUKI , UMEMOTO HAJIME , SHOZUI MASAYA
IPC分类号： G06F9/06
摘要： PURPOSE:To prevent the omission of the setting change of the dependence accompanying the update of a program by automatically setting the mutual dependence relation of programs to a dependence relation data base based on the converted edition result to an execution enabled program of programs depending to each other. CONSTITUTION:When a program to be affected by the update of the program is retrieved in the programs constituting a tree structure program and depending to each other, the mutual dependence of each program recorded in make files 25 and 26 which is used in the conversion edition to the execution enabled program of the programs is registered in a dependence relation control data base after the conversion edition is completed. When the program is updated, the mutual dependence relation of the programs to be recorded in the make files 25 and 26 and the dependence relation registered in the dependence relation control data base are compared and the program existing in the only one side is extracted as an influence program to be affected by the update of the program to be an update object.

3. 发明专利

JPH0778047A INTERACTIVE TYPE INFORMATION SYSTEM CONSTITUTION SYSTEM 失效
公开(公告)号：JPH0778047A
公开(公告)日：1995-03-20
申请号：JP22309993
申请日：1993-09-08
申请人： HITACHI LTD
发明人： CHIBA HIROYUKI
IPC分类号： G06F3/02 , G06F3/048 , G06F3/14 , G06F13/00 , G06F15/00 , G06F17/50
摘要： PURPOSE:To constitute a tool which provides the operation procedure of a tool that individual users are accustomed to using. CONSTITUTION:The interactive type information system constitution system enables the operation procedure of the tool to be customized by a user by describing a U1 definition file 4 by operating a tool main body part 5 for performing a target process with a context 2 holding the state of operation and transition information 40 described in the U1 definition file 4 by a U1 interpretation part 1 interpreting the operation of the user received from input/ output equipment 7. The operation procedure of the tool is thus customized and then even a user who is accustomed to the interface of a specific tool can constitute a tool providing an easy-to-use interface.

4. 发明专利

JPH05143553A SWITCH CIRCUIT FOR PACKET TRANSFER AND PARALLEL PROCESSOR SYSTEM USING THE CIRCUIT 失效
公开(公告)号：JPH05143553A
公开(公告)日：1993-06-11
申请号：JP6177792
申请日：1992-03-18
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： SHUDO SHINICHI , NAKAKOSHI JUNJI , HAMANAKA NAOKI , CHIBA HIROYUKI , HIGUCHI TATSUO , TAKEUCHI SHIGEO , OGATA YASUHIRO , TOBA TATSU
IPC分类号： G06F15/173 , G06F15/16 , G06F15/163 , G06F15/177
摘要： PURPOSE:To efficiently transfer a broadcast packet in a packet transfer between processors in a network for a parallel processor. CONSTITUTION:A broadcast buffer 107 having an output every reception processor 101, a broadcast controller 109 transferring a packet to be transferred from a transmission processor to the broadcast buffer and transferring the packet of the buffer to a processor capable of performing a reception, a circuit transmitting the existence of the transfer request to the buffer from the transmission processor to the broadcast controller and a circuit transferring the packet of the broadcast buffer to the reception processor preferentially when the broadcast controller and the processor request the transfer of the packet to the same reception processor at the same time are provided within a network 102. Therefore, all the processors are capable of transferring the broadcast packet from the processors capable of performing a reception and are capable of transferring the packet preferentially even if the processors are not capable of receiving the broadcast packet.

5. 发明专利

JPH0554007A LOAD DISTRIBUTING DEVICE FOR PARALLEL COMPUTER 失效
公开(公告)号：JPH0554007A
公开(公告)日：1993-03-05
申请号：JP21689591
申请日：1991-08-28
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： TOBA TATSU , HIGUCHI TATSUO , NAKAKOSHI JUNJI , CHIBA HIROYUKI , HAMANAKA NAOKI , SHUDO SHINICHI , TAKEUCHI SHIGEO , OGATA YASUHIRO
IPC分类号： G06F15/16 , G06F15/177
摘要： PURPOSE:To reduce the communication overhead for detection of the load value of another processor element PE at the time of distributing the load among PEs in a parallel computer. CONSTITUTION:A network 1 is provided with load value register groups 3-1 to 3-4 and comparators 4-1 to 4-6 for load value comparison correspondingly to PEs. Lines 6-1 to 6-4 through which the comparison results are reported and lines 5-1 to 5-4 through which values of load value registers are updated are provided between the network and PEs. Since comparators 4-1 to 4-6 which compare the load values are provided in the network and means which report the results of comparators are provided between the network and PEs, each of all PEs connected to the network can always obtain relative load information between its own load value and load values of the other PEs.

6. 发明专利

JPH0528122A BROADCASTING METHOD AND PARALLEL COMPUTER THEREFOR 失效
公开(公告)号：JPH0528122A
公开(公告)日：1993-02-05
申请号：JP18074391
申请日：1991-07-22
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： OGATA YASUHIRO , NAKAKOSHI JUNJI , HAMANAKA NAOKI , CHIBA HIROYUKI , SHUDO SHINICHI , HIGUCHI TATSUO , TAKEUCHI SHIGEO , TOBA TATSU
IPC分类号： G06F15/173 , G06F15/80
摘要： PURPOSE:To effectively attain a broadcasting function in a limited processor range only. CONSTITUTION:A routing bit generating circuit 208 is provided to a processor PE for decision of a transfer route of messages to a receiving destination processor group 100 together with the partial broadcasting route pointing circuits 403-405 and a route pointing information changing circuit 311 provided to a tandem switch EX respectively. Meanwhile the transfer control circuits 708-711 are provided to a network for definition of a range of the group 100. Then a boundary register group 70 and the circuits 708-711 corresponding to each output port are provided in a crossbar switch XB. When a partial broadcast message is transferred to the downstream side of each output port form a certain input port, it is judged whether the processor PE belonging to the partial broadcast range where the processor PE connected to the input port belongs is connected to the output port or not. Based on this deciding result, the partial broadcast message is transferred to the switch EX from the output port.

7. 发明专利

JP2001236334A INTER-PROCESSOR COMMUNICATION METHOD AND PARALLEL PROCESSORS FOR SAME 失效
公开(公告)号：JP2001236334A
公开(公告)日：2001-08-31
申请号：JP2001004398
申请日：2001-01-12
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： HAMANAKA NAOKI , NAKAKOSHI JUNJI , HIGUCHI TATSUO , CHIBA HIROYUKI , SHUDO SHINICHI , TAKEUCHI SHIGEO , OGATA YASUHIRO , TOBA TATSU
IPC分类号： G06F15/17 , G06F15/16
摘要： PROBLEM TO BE SOLVED: To decrease the overhead of a data copy for buffering by an OS when data are sent out to a network for inter-process communication. SOLUTION: A PATH table for finding a cluster number and the page table origin of another processes from a virtual communication path (PATH) from a process to another process is provided in an area for an OS in a memory corresponding to the processes. When data are transmitted, a cluster number and a page table origin are found by the PATH table from PATH specified by a transmission instruction and to the cluster specified by the former, the value and virtual address of the latter and data read directly out of the area of the process are transmitted. A reception-side cluster converts the virtual address and stores the data directly in the process area.

8. 发明专利

JP2000285186A DATA EXCHANGE METHOD 失效
公开(公告)号：JP2000285186A
公开(公告)日：2000-10-13
申请号：JP9127399
申请日：1999-03-31
申请人： HITACHI LTD
发明人： KITAJIMA TETSUYA , KAWAZURE YOSHIAKI , CHIBA HIROYUKI
IPC分类号： G06F12/14 , G06F1/00 , G06F19/00 , G06F21/10 , G06F21/64 , G06Q10/00 , G06Q10/10 , G06Q40/00 , G06Q40/02 , G06Q40/04 , G06Q50/00 , G06Q99/00 , G09C1/00 , G06F17/60
摘要： PROBLEM TO BE SOLVED: To exchange electronic data between several persons while guaranteeing contents without interposing any center system to be the third person or the like. SOLUTION: When transmitting data between two persons to exchange data, the recipient of data transmits the data while guaranteeing the contents by applying his own electronic signature. After the contents of data and a right transferor are confirmed, the right recipient of data applies his own electronic signature to the data and transmits them to the right transferor. The right transferor confirms the recipient of data and transmits the right of data to the recipient after applying his own electronic signature so that the exchange of data is executed between two persons.

9. 发明专利

JP2000250988A ACCOUNT SETTLEMENT PROCESSING METHOD AND ITS IMPLEMENTATION DEVICE, AND MEDIUM WHERE ITS PROCESSING PROGRAM IS RECORDED 失效
公开(公告)号：JP2000250988A
公开(公告)日：2000-09-14
申请号：JP5209499
申请日：1999-03-01
申请人： HITACHI LTD
发明人： WATANABE KIYOSHI , CHIBA HIROYUKI , TOMIYAMA TOMOYA , KAWAZURE YOSHIAKI , MORITA HIKARI , AKUTSU TAKESHI
IPC分类号： G07F19/00 , G06F19/00 , G06Q20/00 , G06Q30/06 , G06Q50/00 , G07F7/08 , G06F17/60
摘要： PROBLEM TO BE SOLVED: To efficiently perform an account settling process which is carried out by selecting a specific settling method out of settling methods by providing a means which sets the amount of money to be paid by the settling method selected according to payable information and a means which settles the set amount of paid money, etc. SOLUTION: A selling-store side decision process part 20 decides a settling method capable of settling the purchase amount of a purchase article among settling method acceptable by a store and sets it as settable information. A customer-side decision process part 21 decides a settling method capable of paying the purchase amount by a customer among settling methods in settable information and sets it as payable information. A settlement selecting process part 22 inputs the settling method selected by the customer from the payable information and the amount of money to be paid by the settling method and sets the payment amount of money by the selected settling method. A settling process part 23 settles the payment amount set by the selected settling method.

10. 发明专利

JPH11355111A PHASE COMPARING DEVICE AND SIGNAL DELAY CIRCUIT 失效
公开(公告)号：JPH11355111A
公开(公告)日：1999-12-24
申请号：JP16179798
申请日：1998-06-10
申请人： HITACHI LTD
发明人： CHIBA HIROYUKI , TAKEYARI RYOJI , ISHIKAWA KYOSUKE
IPC分类号： H03K5/13 , H03K5/26 , H03L7/091
摘要： PROBLEM TO BE SOLVED: To obtain an output signal without including a phase noise component by cancelling the leak of a clock signal which is demodulated by means of a data signal in a phase comparing device. SOLUTION: Sample-and-hold circuits 3 and 4 are triggered by the rising and falling of a data positive phase input signals and a synthesizing circuit 5 is triggered by the output signal of a data delay circuit 6 having a delay being equal to the one which occurs in outputs from the sample-and-hole circuits 3 and 4. Thus, only a DC voltage of a state where the sample-and-hold circuit 3 and 4 are held is selected in the synthesizing circuit 5 and the unnecessary leak of the clock signal to the output of the phase comparing device is cancelled.

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