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1. 发明公开

EP4235741A1 HIGH POWER GENERATOR AND METHOD OF SUPPLYING HIGH POWER PULSES 审中-公开
公开(公告)号：EP4235741A1
公开(公告)日：2023-08-30
申请号：EP22461517.9
申请日：2022-02-28
申请人： TRUMPF Huettinger Sp. Z o. o.
发明人： The designation of the inventor has not yet been filed
IPC分类号： H01J37/32 , C23C14/34 , H01J37/34 , H03K3/00 , H03K4/00
摘要： High-power- (HP-) generator (10) and method to deliver pulsed high power with a high value of voltage and/or high current value to a capacitive load, in particular to a plasma process, comprising:
- several low-power- (LP-) generators (14, 16 ,18),
∘ each LP-generator (14, 16, 18) comprising an energy storage component (C1, L1), wherein in use the energy storage component (C1, L1) is charged to a predefined value related to the energy storage component,
∘ each LP-generator (14, 16, 18) supplying, in use, at its output an LP-generator-value which corresponds to the value of the energy storage component (C1, C2, Cn L1, L2, Ln) incorporated in the respective LP-generator (14, 16, 18),

- a coupling (20) in which the LP-generators (14, 16, 18) are electrically connected such that a coupling-value at the output of the coupling (20), which corresponds to the output value of the HP-generator (10), may be obtained, and which is, in use, at least in some states of the HP-generator (10) higher than the LP-generator-value at the output of one of the LP-generators (14, 16, 18),
- a control unit (22) configured to select the contribution of LP-generators (14, 16, 18) to the output value of the HP-generator (10) during power delivery of the HP-generator (10), in order to generate a rise and/or decay of a pulse at the output of the coupling (20),
- the control unit (22) is further configured to select the contribution of LP-generators (14, 16, 18) in a galvanically isolated way, in particular via a fiber optic connection or magnetically coupling.

2. 发明授权

EP3821574B1 DIGITAL ISOLATOR 有权转让
公开(公告)号：EP3821574B1
公开(公告)日：2023-06-14
申请号：EP19736393.0
申请日：2019-07-09
发明人： DESSARD, Vincent
IPC分类号： H04L25/02 , G08C19/00 , H03K3/00 , H03K4/50 , H03K19/0185

3. 发明公开

EP4192195A1 CONTROL INTEGRATED CIRCUIT FOR CONTROLLING AN OPERATING DEVICE FOR LIGHTING MEANS; OPERATING DEVICE; LUMINAIRE AND METHOD FOR OPERATING A CONTROL INTEGRATED CIRCUIT 审中-实审
公开(公告)号：EP4192195A1
公开(公告)日：2023-06-07
申请号：EP21211864.0
申请日：2021-12-02
申请人： Tridonic GmbH & Co. KG
发明人： Kucera, Clemens , Auer, Hans , Saccavini, Lukas
IPC分类号： H05B45/10 , H05B45/305 , H03K3/00
摘要： The invention relates to a control integrated circuit (1), control IC, for controlling an operating device (15) for lighting means (10). The control IC (1) comprises a driver logic (3a) for driving a hardware module (4a), a control logic (2a) for controlling the driver logic (3a), and a clock generator (5) for generating two or more clock signals (clk1, clk2) that have a different frequency with regard to each other. The clock generator (5) is configured to provide a first clock signal (clki) of the two or more clock signals (clk1, clk2) to the control logic (2a), and a second clock signal (clk2) of the two or more clock signals (clk1, clk2) to the driver logic (3a). The invention further relates to an operating device (15) for lighting means, the operating device (15) comprising such a control IC (1); and to a luminaire comprising such an operating device (15).

4. 发明公开

EP4037759A1 APPARATUSES AND METHODS FOR LIMITING LOAD CURRENT IN NANOSECOND PULSED POWER SOURCES 审中-实审
公开(公告)号：EP4037759A1
公开(公告)日：2022-08-10
申请号：EP20871379.2
申请日：2020-09-29
申请人： Pulse Biosciences, Inc.
发明人： HUANG, Chaofeng , SCHAADT, Gregory, P. , KRIEG, Kenneth, R.
IPC分类号： A61N1/18 , H03K3/64 , H03K3/017 , H03K3/00 , H03K3/02 , H01B11/02 , H01B11/18

5. 发明公开

EP4026068A1 QUANTUM CONTROLLER ARCHITECTURE 审中-实审
公开(公告)号：EP4026068A1
公开(公告)日：2022-07-13
申请号：EP20861242.4
申请日：2020-09-01
申请人： Quantum Machines
发明人： COHEN, Yonatan , SIVAN, Itamar , OFEK, Nissim , SHANI, Tal
IPC分类号： G06N10/00 , G06N3/04 , H03K3/00

6. 发明公开

EP3871333A1 JOSEPHSON CURRENT SOURCE SYSTEM 审中-实审
公开(公告)号：EP3871333A1
公开(公告)日：2021-09-01
申请号：EP19824054.1
申请日：2019-11-25
申请人： Northrop Grumman Systems Corporation
发明人： HERR, Quentin P. , HERR, Anna Y. , MILLER, Donald L. , BULLA, Christopher S. , BLANK, Theodore R.
IPC分类号： H03K3/00

7. 发明公开

EP3763044A1 WOBBLE REDUCTION IN AN INTEGER MODE DIGITAL PHASE LOCKED LOOP 审中-公开
公开(公告)号：EP3763044A1
公开(公告)日：2021-01-13
申请号：EP19764889.2
申请日：2019-03-11
申请人： Texas Instruments Incorporated
发明人： JANARDHANAN, Jayawardan , LINDGREN, Eric, Paul , YAO, Henry
IPC分类号： H03L7/08 , H03K3/00

8. 发明公开

EP3502690A1 PLATELET ACTIVATION AND GROWTH FACTOR RELEASE USING ELECTRIC PULSES 有权
公开(公告)号：EP3502690A1
公开(公告)日：2019-06-26
申请号：EP18210654.2
申请日：2015-01-09
申请人： General Electric Company
发明人： NECULAES, Vasile Bogdan , TORRES, Andrew Soliz , CAIAFA, Antonio , LEE, Brian Duh-Lan , GARNER, Allen Lawrence
IPC分类号： G01N33/49 , A61B18/12 , A61K35/19 , C12N13/00 , H03K3/00 , C12M1/42 , C12M1/00
摘要： Systems for releasing growth factors are disclosed. In certain embodiments, a blood sample is exposed to a sequence of one or more electric pulses to trigger release of a growth factor in the sample. In certain embodiments, the growth factor release is not accompanied by clotting within the blood sample.

9. 发明公开

EP3424145A1 HIGH-VOLTAGE ANALOG CIRCUIT PULSER AND PULSE GENERATOR DISCHARGE CIRCUIT 审中-实审
公开(公告)号：EP3424145A1
公开(公告)日：2019-01-09
申请号：EP17760443.6
申请日：2017-01-31
申请人： Pulse Biosciences, Inc.
发明人： ATHOS, Brian G. , UECKER, Darrin R. , XIAO, Shu
IPC分类号： H03K3/02 , H03K3/00 , H03K5/00 , H03K5/01 , H03K5/12

10. 发明公开

EP3311240A1 CLOCK DISTRIBUTION SYSTEM 有权
标题翻译：时钟分配系统
公开(公告)号：EP3311240A1
公开(公告)日：2018-04-25
申请号：EP16726447.2
申请日：2016-05-11
申请人： Northrop Grumman Systems Corporation
发明人： STRONG, Joshua A. , HERR, Anna Y. , HERR, Quentin P. , SHAUCK, Steven B.
IPC分类号： G06F1/04 , H03K3/00
摘要： One embodiment includes a clock distribution system. The system includes a standing-wave resonator configured to receive and to resonate a sinusoidal clock signal. The standing-wave resonator includes at least one anti-node portion associated with a peak current amplitude of the sinusoidal clock signal. The system also includes at least one clock line interconnecting each of the at least one anti-node portion and an associated circuit. The at least one clock line can be configured to propagate the sinusoidal clock signal for timing functions associated with the associated circuit.

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