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    • 1. 发明公开
    • Deinterleaver
    • 解交织器
    • EP0874492A3
    • 2001-07-04
    • EP98302897.8
    • 1998-04-15
    • MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    • Nara, Yoshikazu
    • H04L1/00H03M13/22
    • H04L1/00
    • A deinterleaver includes a first storage unit (10) for storing data an order of which is rearranged from a correct order to a random order, a data latching unit (20) for temporarily holding output data of the first storage unit, a second storage unit (30) for storing output data of the data latching unit, and an addressing unit (40) for generating a read addressing signal which is outputted to the first storage unit, and a write addressing signal which id outputted to the second storage unit. The addressing unit includes a counting unit (41) for counting a clock to generate the read addressing signal, and an arithmetic unit (42 - 45) for generating the write addressing signal for rearranging to the correct order using the read addressing signal outputted from the counting unit.
    • 解交织器包括:第一存储单元(10),用于存储顺序从正确顺序重新排列到随机顺序的数据;数据锁存单元(20),用于临时保存第一存储单元的输出数据;第二存储单元 (30),用于存储数据锁存单元的输出数据;寻址单元(40),用于产生输出到第一存储单元的读取寻址信号和输出到第二存储单元的写入寻址信号。 寻址单元包括用于对产生读取寻址信号的时钟进行计数的计数单元(41),以及用于使用从存储单元(42-45)输出的读取寻址信号来产生用于重新排列到正确顺序的写入寻址信号的算术单元 计数单位。