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    • 1. 发明公开
    • SEMICONDUCTOR ARRANGEMENT AND SEMICONDUCTOR MODULE ARRANGEMENT
    • EP4425780A1
    • 2024-09-04
    • EP23159870.7
    • 2023-03-03
    • Infineon Technologies AG
    • POLLER, TiloMÜLLER, Christian
    • H02M7/00H02M7/487H01L25/07H02M1/00
    • H02M7/003H02M7/487H01L25/072H02M1/0048H01L25/18
    • A semiconductor arrangement includes a first supply node (P1) configured to be operatively connected to a first electrical potential (DC+), and a second supply node (N1) configured to be operatively connected to a second electrical potential (DC-), the first electrical potential (DC+) being positive with reference to the second electrical potential (DC-), a first controllable semiconductor element (T1) and a second controllable semiconductor element (T2), each having a control electrode (G1, G2) and a controllable load path between two load electrodes, the load paths being operatively connected in series and between the first supply node (P1) and the second supply node (N1), the first controllable semiconductor element (T1) and the second semiconductor element (T2) being connected with each other via an output node (AC1), a first and a second freewheeling element (D 1, D2), each having a first electrode and a second electrode, the first freewheeling element (D1) being connected in parallel to the first controllable semiconductor element (T1) and between the respective nodes, and the second freewheeling element (D2) being connected in parallel to the second controllable semiconductor elements (T2) and between the respective nodes, a third freewheeling element (D3) having a first electrode and a second electrode, and a fourth controllable semiconductor element (T4) having a control electrode (G4) and a controllable load path between two load electrodes, the third freewheeling element (D3) and the load path of the fourth controllable semiconductor element (T4) being operatively coupled in series and between the output node (AC1) and a first midpoint node (M1), and a third controllable semiconductor element (T3) having a control electrode (G3) and a controllable load path between two load electrodes, and a fourth freewheeling element (D4) having a first electrode and a second electrode, the load path of the third controllable semiconductor element (T3) and the fourth freewheeling element (D4) being operatively connected in series and between the output node (AC1) and a second midpoint node (M2) that is different from the first midpoint node.