会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 7. 发明公开
    • Programmable write equalization circuit
    • Programmierbare Schreibentzerrungsvorrichtung
    • EP1293977A2
    • 2003-03-19
    • EP02256398.5
    • 2002-09-16
    • QUANTUM CORPORATION
    • Sembera, BenKoller, Justin J.
    • G11B20/10G11B5/09
    • G11B20/10046G11B5/00813G11B5/035G11B5/09G11B20/10009
    • A programmable write equalization circuit (30) includes a first digital clock (48) that is used as a reference to indicate data rate, a second digital clock (52) used to indicate write equalization quantization, a look-up table (60) used to store waveforms used in equalizing the input from the first digital clock domain to the second digital clock domain, a counter (54) used to indicate the number of bits within the look-up table that are to be used for each translation, a polarity detector (74) used to detect the current state of the input data, a non-return-to-zero (NRZ) filter (34) used to indicate the placement of data transitions and non-transitions, and a software interface including programmable registers to control each one of the parameters within the equalization circuit.
    • 可编程写入均衡电路(30)包括用作指示数据速率的参考的第一数字时钟(48),用于指示写均衡量化的第二数字时钟(52),使用的查找表(60) 用于存储用于将来自第一数字时钟域的输入均衡到第二数字时钟域的波形;计数器(54),用于指示查找表中用于每个转换的位数,极性 用于检测输入数据的当前状态的检测器(74),用于指示数据转换和非转换的放置的非归零(NRZ)滤波器(34),以及包括可编程寄存器 以控制均衡电路内的每个参数。