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1. 发明授权

EP3279823B1 SECURITY SUPERVISION 有权
公开(公告)号：EP3279823B1
公开(公告)日：2020-09-23
申请号：EP16305998.3
申请日：2016-08-01
申请人： Secure-IC SAS
发明人： DANGER, Jean-Luc , GUILLEY, Sylvain , PORTEBOEUF, Thibault
IPC分类号： G06F21/55 , G06F21/56 , G06F21/76 , G06F11/10 , G06F11/30 , G06F11/07 , G06F11/32

2. 发明公开

EP3340214A1 SYNTHETIC PHYSICALLY UNCLONABLE FUNCTION 有权
公开(公告)号：EP3340214A1
公开(公告)日：2018-06-27
申请号：EP16306765.5
申请日：2016-12-21
申请人： Secure-IC SAS
发明人： NGUYEN, Philippe , NGUYEN, Robert , SOUISSI, Youssef , GUILLEY, Sylvain , DANGER, Jean-Luc , FACON, Adrien
IPC分类号： G09C1/00
CPC分类号： G09C1/00 , H04L2209/12
摘要： There is disclosed a circuit for a Synthetic Physically Unclonable Function, acronym SPUF, in a computer device, wherein the circuit is configured to receive data from a plurality of hardware sensors and/or actuators accessible in said computer device; to determine deviations in said data; to determine a multivariate distribution of said deviations and to determine an identifier from said multivariate distribution. In described developments, deviations comprise random errors, statistical moments in data originating from sensors and/or actuators amongst accessible ones in the computer device can be selected, and entropy can be maximized. Computer program product embodiments are described.

3. 发明公开

EP4216274A3 SYSTEM AND METHOD FOR PROTECTING AN INTEGRATED CIRCUIT (IC) DEVICE 审中-实审
公开(公告)号：EP4216274A3
公开(公告)日：2023-09-27
申请号：EP22208731.4
申请日：2015-12-29
申请人： Secure-IC SAS
发明人： GUILLEY, Sylvain , PORTEBOEUF, Thibault , DANGER, Jean-Luc
IPC分类号： H01L23/58 , G09C1/00
摘要： Embodiments of the invention provide a system for protecting an integrated circuit (IC) device from attacks, the IC device (100) comprising a substrate (102) having a front surface (20) and a back surface (21), the IC device further comprising a front side part (101) arranged on the front surface of the substrate (102) and stacked layers, at least one of said layers comprising a data layer comprising wire carrying data, the front side part having a front surface (13). The system comprises an internal shield (12) arranged in a layer located below said data layer and a verification circuit configured to check the integrity of at least one portion of the internal shield.

4. 发明授权

EP3340216B1 SECRET KEY GENERATION USING A HIGH RELIABILITY PHYSICALLY UNCLONABLE FUNCTION 有权
公开(公告)号：EP3340216B1
公开(公告)日：2020-01-29
申请号：EP16306809.1
申请日：2016-12-23
申请人： Secure-IC SAS
发明人： DANGER, Jean-Luc , NGUYEN, Philippe
IPC分类号： G09C1/00 , H04L9/08

5. 发明公开

EP3340216A1 SECRET KEY GENERATION USING A HIGH RELIABILITY PHYSICALLY UNCLONABLE FUNCTION 有权
公开(公告)号：EP3340216A1
公开(公告)日：2018-06-27
申请号：EP16306809.1
申请日：2016-12-23
申请人： Secure-IC SAS
发明人： DANGER, Jean-Luc , NGUYEN, Philippe
IPC分类号： G09C1/00 , H04L9/08
摘要： Embodiments of the invention provide an electronic system for generating secret information comprising a Physically Unclonable Function (PUF) circuit, the PUF circuit being configured to provide a difference between two values of a physical variable of the PUF in response to a challenge applied to the PUF circuit. The system is configured to apply a set of challenges during an enrolment phase, and measure the physical variable difference provided by the PUF in response to each challenge. The system comprises:
- a helper data generator (2) configured to generate a helper data comprising a set of bits, a bit of the helper data being generated in association with each applied challenge, the helper data generator being configured to generate each helper data bit from the physical variable difference provided by the PUF in response to the application of the associated challenge,
- a secret information generator (3) configured to generate a secret key comprising at least one bit during a usage phase, each bit of the key being generated by applying a challenge among the set of challenges, the secret information generator (3) being configured to determine each bit of the key from the helper data bit corresponding to the applied challenge, and from the physical variable difference provided by the PUF in response to the applied challenge.

6. 发明公开

EP3279823A1 SECURITY SUPERVISION 有权
标题翻译：安全监督
公开(公告)号：EP3279823A1
公开(公告)日：2018-02-07
申请号：EP16305998.3
申请日：2016-08-01
申请人： Secure-IC SAS
发明人： DANGER, Jean-Luc , GUILLEY, Sylvain , PORTEBOEUF, Thibault
IPC分类号： G06F21/55 , G06F21/56 , G06F21/76 , G06F11/07 , G06F11/32
摘要： There is disclosed a system for monitoring the security of a target system (110) with a circuit (120), the target system (110) comprising at least one processor (111) and wherein: the circuit (120) comprises a finite-state machine (122) configured to receive data from one or more sensors (130) distributed in the target system (110), at least one sensor (1303) being located on the processor (111) of the target system (110); the finite-state machine (122) is configured to determine a state output in response to data received from sensors (130); the system monitoring the security based on said state output. Developments describe the use of a self-alarm mechanism comprising an encoder to encode states with redundancy, the application of an error correction code, comparisons with predefined valid encoded states, the triggering of an alarm to the processor, the determination of actions and/or retroactions on sensors and/or diagnostics and countermeasures.
摘要翻译：公开了一种用于利用电路（120）监视目标系统（110）的安全性的系统，所述目标系统（110）包括至少一个处理器（111），并且其中：所述电路（120）包括有限状态（122），其被配置为从分布在所述目标系统（110）中的一个或多个传感器（130）接收数据，至少一个传感器（1303）位于所述目标系统（110）的所述处理器（111）上; 所述有限状态机（122）被配置为响应于从传感器（130）接收的数据来确定状态输出; 该系统基于所述状态输出来监视安全性。发展描述了使用包括编码器的自编报警机制来对冗余状态进行编码，应用纠错码，与预定义的有效编码状态进行比较，向处理器报警的触发，动作的确定和/或追溯传感器和/或诊断和对策。

7. 发明公开

EP4216274A2 SYSTEM AND METHOD FOR PROTECTING AN INTEGRATED CIRCUIT (IC) DEVICE 审中-实审
公开(公告)号：EP4216274A2
公开(公告)日：2023-07-26
申请号：EP22208731.4
申请日：2015-12-29
申请人： Secure-IC SAS
发明人： GUILLEY, Sylvain , PORTEBOEUF, Thibault , DANGER, Jean-Luc
IPC分类号： H01L23/58 , G09C1/00
摘要： Embodiments of the invention provide a system for protecting an integrated circuit (IC) device from attacks, the IC device (100) comprising a substrate (102) having a front surface (20) and a back surface (21), the IC device further comprising a front side part (101) arranged on the front surface of the substrate (102) and stacked layers, at least one of said layers comprising a data layer comprising wire carrying data, the front side part having a front surface (13). The system comprises an internal shield (12) arranged in a layer located below said data layer and a verification circuit configured to check the integrity of at least one portion of the internal shield.

8. 发明公开

EP3229221A1 DEVICE AND METHOD FOR TESTING A PHYSICALLY UNCLONABLE FUNCTION 有权
标题翻译：用于测试物理无关功能的装置和方法
公开(公告)号：EP3229221A1
公开(公告)日：2017-10-11
申请号：EP16305419.0
申请日：2016-04-08
申请人： Secure-IC SAS
发明人： GUILLEY, Sylvain , DANGER, Jean-Luc , NGUYEN, Philippe
IPC分类号： G09C1/00 , H04L9/32
CPC分类号： H04L9/3278 , G06F11/263 , G09C1/00 , H04L2209/12 , H04L2209/26
摘要： There is provided a method for testing a Physically Unclonable Function (PUF) implemented in a device, said PUF being configured to receive at least one challenge, each challenge comprising a set of bits, and to produce a set of responses, each response comprising at least one bit and corresponding to one challenge, said PUF comprising a circuitry including a set of PUF elements, each PUF element being controlled by at least one input bit corresponding to at least one bit of said challenge, wherein the method comprises the steps of:
- applying at least one bit of the challenge to the PUF instance;
- determining (300) identifiers for at least some of the PUF elements, the identifier of each PUF element being determined from the response output by said PUF element in response to said at least one bit of the challenge;
- applying a statistical randomness test (304) to a group of identifiers comprising at least some of the identifiers determined for said PUF elements, which provides a test indicator; and
- testing said PUF based on said test indicator.
摘要翻译：提供了一种用于测试设备中实现的物理不可复制功能（PUF）的方法，所述PUF被配置为接收至少一个挑战，每个挑战包括一组比特，并且产生一组响应，每个响应包括在所述PUF包括包含一组PUF元素的电路，每个PUF元件由对应于所述询问的至少一个比特的至少一个输入比特控制，其中所述方法包括以下步骤： - 将所述挑战的至少一个比特应用于所述PUF实例; - 为至少一些PUF元素确定（300）标识符，每个PUF元素的标识符是由所述PUF元件响应于所述挑战的所述至少一个比特输出的响应而确定的; - 对包括为所述PUF元素确定的至少一些标识符的一组标识符应用统计随机性测试（304），所述标识符提供测试指示符; 和 - 基于所述测试指示符测试所述PUF。

9. 发明公开

EP3340215A1 SYSTEM AND METHOD FOR GENERATING SECRET INFORMATION USING A HIGH RELIABILITY PHYSICALLY UNCLONABLE FUNCTION 有权转让
公开(公告)号：EP3340215A1
公开(公告)日：2018-06-27
申请号：EP16306808.3
申请日：2016-12-23
申请人： Secure-IC SAS
发明人： DANGER, Jean-Luc , NGUYEN, Philippe
IPC分类号： G09C1/00 , H04L9/08
CPC分类号： H04L9/3278 , G09C1/00 , H04L9/0861 , H04L9/0866 , H04L2209/12
摘要： Embodiments of the invention provide an electronic system for generating secret information comprising a Physically Unclonable Function (PUF) circuit, the PUF circuit being configured to provide a difference between two values of a physical variable of the PUF in response to a challenge applied to the PUF circuit. The system is configured to apply a set of challenges during an enrolment phase, and measure the physical variable difference provided by the PUF in response to each challenge. The system further comprises:
- A helper data generator (2) configured to generate a helper data comprising a set of bits, a bit of the helper data being generated in association with each applied challenge, the helper data generator being configured to generate each helper data bit from the physical variable difference provided by the PUF in response to the application of the associated challenge, the system further comprising a secret information generator (3) for extracting secret information from the helper data.

10. 发明公开

EP3188231A1 SYSTEM AND METHOD FOR PROTECTING AN INTEGRATED CIRCUIT (IC) DEVICE 有权转让
标题翻译：用于保护集成电路（IC）装置的系统和方法
公开(公告)号：EP3188231A1
公开(公告)日：2017-07-05
申请号：EP15307161.8
申请日：2015-12-29
申请人： Secure-IC SAS
发明人： GUILLEY, Sylvain , PORTEBOEUF, Thibault , DANGER, Jean-Luc
IPC分类号： H01L23/58 , G09C1/00
CPC分类号： H01L23/576 , G09C1/00 , H01L23/5225 , H01L23/573 , H01L27/3272 , H01L31/02164 , H04L2209/12
摘要： Embodiments of the invention provide a system for protecting an integrated circuit (IC) device from attacks, the IC device (100) comprising a substrate (102) having a front surface (20) and a back surface (21), the IC device further comprising a front side part (101) arranged on the front surface of the substrate (102) and stacked layers, at least one of said layers comprising a data layer comprising wire carrying data, the front side part having a front surface (13). The system comprises an internal shield (12) arranged in a layer located below said data layer and a verification circuit configured to check the integrity of at least one portion of the internal shield.
摘要翻译：本发明的实施例提供了一种用于保护集成电路（IC）装置免受攻击的系统，所述IC装置（100）包括具有前表面（20）和后表面（21）的衬底（102），所述IC装置进一步包括布置在所述衬底（102）的前表面上的前侧部分（101）和堆叠层，所述层中的至少一个包括数据层，所述数据层包括载有数据的导线，所述前侧部分具有前表面（13）。该系统包括布置在位于所述数据层下方的层中的内部屏蔽（12）和配置成检查内部屏蔽的至少一部分的完整性的验证电路。

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