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1. 发明授权

EP2333831B1 Method for packaging an electronic device 有权转让
标题翻译：用于包装电子装置的方法
公开(公告)号：EP2333831B1
公开(公告)日：2016-03-02
申请号：EP09252759.7
申请日：2009-12-10
申请人： ST-Ericsson SA
发明人： Slavov, Nedialko
IPC分类号： H01L25/065 , H01L23/538 , H01L21/98
CPC分类号： H01L25/0657 , H01L23/3128 , H01L23/5387 , H01L24/13 , H01L24/16 , H01L24/48 , H01L24/73 , H01L24/92 , H01L24/97 , H01L2224/131 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48247 , H01L2224/73253 , H01L2224/92225 , H01L2224/97 , H01L2225/06517 , H01L2225/0652 , H01L2225/06579 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/014 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207

2. 发明授权

EP2416587B1 Interfacing a switch array 有权转让
标题翻译：耦合开关阵列
公开(公告)号：EP2416587B1
公开(公告)日：2013-04-03
申请号：EP10251400.7
申请日：2010-08-05
申请人： ST-Ericsson SA
发明人： Slavov, Nedialko
IPC分类号： H04Q3/52
CPC分类号： G06F13/385 , H04Q3/521 , H04Q2213/1302 , H04Q2213/1304 , H04Q2213/13213 , H04Q2213/13305

3. 发明公开

EP2334159A1 Coupling modules of an electronic device 有权
标题翻译： Kupplungsmodule einer elektronischen Vorrichtung
公开(公告)号：EP2334159A1
公开(公告)日：2011-06-15
申请号：EP09252761.3
申请日：2009-12-10
申请人： ST-Ericsson SA
发明人： Slavov, Nedialko
IPC分类号： H05K1/14 , H05K3/34 , H01L23/00 , H05K7/00
CPC分类号： H05K1/142 , H01L23/3128 , H01L23/49816 , H01L24/16 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/16227 , H01L2225/1005 , H01L2924/00014 , H01L2924/14 , H01L2924/15192 , H01L2924/15311 , H01L2924/15331 , H01L2924/1815 , H05K1/181 , H05K3/3405 , H05K2201/1053 , H05K2201/10734 , H05K2203/041 , H05K2203/042 , Y02P70/611 , H01L2924/00 , H01L2224/0401
摘要： An electronic device (201) and a module (202) for an electronic device (201) are disclosed, together with method of manufacturing the same. Each module (202) comprises a substrate (203) having an upper surface (208) to which an integrated circuit die (204) is mounted. In preferred embodiments, a solder ball (214) is mounted to the upper surface (208) of the substrate (203) in such a manner that, on melting, a flow of molten solder extends from the solder ball (214) over the edge of the substrate (203). In this manner, an electrical connection between adjacent modules (202) can be formed the connection of molten solder flowing from a solder ball (214) on each of the modules (202).
摘要翻译：公开了电子设备（201）和用于电子设备（201）的模块（202）及其制造方法。每个模块（202）包括具有安装集成电路管芯（204）的上表面（208）的衬底（203）。在优选实施例中，焊球（214）以这样的方式安装到衬底（203）的上表面（208），使得熔融焊料的流动在焊料球（214）上延伸超过边缘的衬底（203）。以这种方式，相邻模块（202）之间的电连接可以形成为从每个模块（202）上的焊球（214）流出的熔融焊料的连接。

4. 发明公开

EP2249476A1 Cross current minimisation 有权转让
标题翻译： Querstromminimierung
公开(公告)号：EP2249476A1
公开(公告)日：2010-11-10
申请号：EP09158970.5
申请日：2009-04-28
申请人： ST-Ericsson SA
发明人： Slavov, Nedialko
IPC分类号： H03F3/217
CPC分类号： H03F3/217
摘要： The present invention relates to a method of optimising cross current in class D amplifiers and simultaneously minimising the harmonic distortion. The method overcomes the problem of using the limited speed voltage comparators often used in cross current preventing circuits. The method is based on introducing of a replica amplifier with a current sensor matched to a main amplifier. The duration of the sensed cross current is compared by a current comparator with a small enough reference current. The comparator output generates a pulse with duration equal to the duration of the cross current event in the replica amplifier. The duration of that pulse is measured and used to generate dead time pulse, blanking amplifier pre-driver inputs.
摘要翻译：本发明涉及一种优化D类放大器中的交叉电流并同时最小化谐波失真的方法。该方法克服了使用通常用于防止交叉电流的电路中的有限速度电压比较器的问题。该方法基于引入具有与主放大器匹配的电流传感器的复制放大器。感测交叉电流的持续时间由电流比较器与足够小的参考电流进行比较。比较器输出产生持续时间等于复制放大器中交叉电流事件持续时间的脉冲。该脉冲的持续时间被测量并用于产生死区脉冲，消隐放大器预驱动器输入。

5. 发明授权

EP2334159B1 Coupling modules of an electronic device 有权
标题翻译：的电子设备的耦合模块
公开(公告)号：EP2334159B1
公开(公告)日：2014-02-12
申请号：EP09252761.3
申请日：2009-12-10
申请人： ST-Ericsson SA
发明人： Slavov, Nedialko
IPC分类号： H05K1/14 , H05K3/34 , H01L23/31 , H01L23/498 , H05K1/18 , H01L25/10 , H01L23/00 , H01L25/00
CPC分类号： H05K1/142 , H01L23/3128 , H01L23/49816 , H01L24/16 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/16227 , H01L2225/1005 , H01L2924/00014 , H01L2924/14 , H01L2924/15192 , H01L2924/15311 , H01L2924/15331 , H01L2924/1815 , H05K1/181 , H05K3/3405 , H05K2201/1053 , H05K2201/10734 , H05K2203/041 , H05K2203/042 , Y02P70/611 , H01L2924/00 , H01L2224/0401

6. 发明公开

EP2416587A1 Interfacing a switch array 有权转让
标题翻译： Koppeln eines Schaltarrays
公开(公告)号：EP2416587A1
公开(公告)日：2012-02-08
申请号：EP10251400.7
申请日：2010-08-05
申请人： ST-Ericsson SA
发明人： Slavov, Nedialko
IPC分类号： H04Q3/52 , H03K17/62 , H03K17/693 , H03M11/20
CPC分类号： G06F13/385 , H04Q3/521 , H04Q2213/1302 , H04Q2213/1304 , H04Q2213/13213 , H04Q2213/13305
摘要： An interface circuit (100) for a switch array (10) having an array of switches (S ij , i=1...4, j=1...3), each closeable to couple a row conductor of a plurality of row conductors (X 1 ...X 4 ) to a column conductor of one or more column conductors (Y 1 ...Y 3 ), comprises a current generator (20) and a current detector (30). The current generator (20) has a plurality of row interface ports (24a...24d) for coupling to different ones of the row conductors (X 1 ...X 4 ) and is arranged to generate a switch array current (I M ) for coupling to the row interface ports (24a...24d), the switch array current (I M ) having a different one of a plurality of different switch array current magnitudes (M1...M4) for different ones of the row interface ports (24a...24d), and generate one or more reference currents (I R1 ...I R5 ) each having a different reference current magnitude (R1...R5). The current detector (30) has one or more column interface ports (32a...32c) for coupling to the one or more column conductors (Y 1 ...Y 3 ) and is arranged to detect the switch array current (I M ) flowing at any one of the one or more column interface ports (32a...32c), and generate a row indication indicative of which of the row conductors (X 1 ...X 4 ) a closed one of the switches (S ij , i=1...4, j=1...3) is coupled to by determining which one of the switch array current magnitudes (M1...M4) the detected switch array current (I M ) has by comparing the detected switch array current (I M ) with the one or more reference currents (I R1 ...I R5 ).
摘要翻译：一种用于具有开关阵列（S ij，i = 1 ... 4，j = 1 ... 3）的开关阵列（10）的接口电路（100），每个开关阵列可以耦合多个一列或多列列导体（Y 1 ... Y 3）的列导体的行导体（X 1 ... X 4）包括电流发生器（20）和电流检测器（30）。电流发生器（20）具有多个行接口端口（24a ... 24d），用于耦合到不同行的导体（X 1 ... X 4），并且被布置成产生开关阵列电流（IM）为了耦合到行接口端口（24a ... 24d），开关阵列电流（IM）具有用于不同的行接口端口的多个不同的开关阵列电流幅度（M1 ... M4）中的不同的一个（24a ... 24d），并产生每个具有不同参考电流幅度（R1 ... R5）的一个或多个参考电流（I R1 ... I R5）。电流检测器（30）具有用于耦合到一个或多个列导体（Y 1 ... Y 3）的一个或多个列接口端口（32a ... 32c），并被布置成检测开关阵列电流（IM）在一个或多个列接口端口（32a ... 32c）中的任一个处流动，并且生成指示行导体（X 1 ... X 4）中的哪一个是闭合的开关（S ij ，i = 1 ... 4，j = 1 ... 3）通过确定检测到的开关阵列电流（IM）中的哪一个开关阵列电流大小（M1 ... M4）开关阵列电流（IM）与一个或多个参考电流（I R1 ... I R5）。

7. 发明公开

EP2334158A1 Bridge coupling of modules in an electronic device 审中-公开
标题翻译： Brückenkupplungvon Modulen在einer elektronischen Vorrichtung
公开(公告)号：EP2334158A1
公开(公告)日：2011-06-15
申请号：EP09252760.5
申请日：2009-12-10
申请人： ST-Ericsson SA
发明人： Slavov, Nedialko
IPC分类号： H05K1/14 , H05K3/34 , H01L23/00 , H05K7/00
CPC分类号： H05K1/142 , H01L23/3128 , H01L23/49816 , H01L24/16 , H01L24/97 , H01L25/50 , H01L2224/16225 , H01L2224/97 , H01L2924/01005 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H05K1/181 , H05K3/3405 , H05K2201/1053 , H05K2203/041 , H05K2203/042 , Y02P70/611 , H01L2224/81 , H01L2924/00
摘要： An electronic device (201) and a module (202) for an electronic device (201) are disclosed, together with method of manufacturing the same. Each module (202) comprises a substrate (203) having an upper surface (208) to which an integrated circuit die (204) is mounted. In preferred embodiments, a solder ball (214) is mounted to the upper surface (208) of the substrate (203) in such a manner that, on melting, a flow of molten solder extends from the solder ball (214) over the edge of the substrate (203). In this manner, an electrical connection between adjacent modules (202) can be formed the connection of molten solder flowing from a solder ball (214) on each of the modules (202).
摘要翻译：公开了电子设备（201）和用于电子设备（201）的模块（202）及其制造方法。每个模块（202）包括具有安装集成电路管芯（204）的上表面（208）的衬底（203）。在优选实施例中，焊球（214）以这样的方式安装到衬底（203）的上表面（208），使得熔融焊料的流动在焊料球（214）上延伸超过边缘的衬底（203）。以这种方式，相邻模块（202）之间的电连接可以形成为从每个模块（202）上的焊球（214）流出的熔融焊料的连接。

8. 发明授权

EP2249476B1 Cross current minimisation 有权转让
标题翻译： Querstromminimierung
公开(公告)号：EP2249476B1
公开(公告)日：2016-04-13
申请号：EP09158970.5
申请日：2009-04-28
申请人： ST-Ericsson SA
发明人： Slavov, Nedialko
IPC分类号： H03F3/217
CPC分类号： H03F3/217

9. 发明公开

EP2333831A1 Packaging an electronic device 有权转让
标题翻译： Methode zum Verpacken elektronischer Vorrichtungen
公开(公告)号：EP2333831A1
公开(公告)日：2011-06-15
申请号：EP09252759.7
申请日：2009-12-10
申请人： ST-Ericsson SA
发明人： Slavov, Nedialko
IPC分类号： H01L25/065 , H01L23/538 , H01L21/98
CPC分类号： H01L25/0657 , H01L23/3128 , H01L23/5387 , H01L24/13 , H01L24/16 , H01L24/48 , H01L24/73 , H01L24/92 , H01L24/97 , H01L2224/131 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48247 , H01L2224/73253 , H01L2224/92225 , H01L2224/97 , H01L2225/06517 , H01L2225/0652 , H01L2225/06579 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/014 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electronic device (100) comprises a plurality of integrated circuit dies (110, 120, 130) mounted on different areas of a carrier (150). The carrier (150) is folded into a plurality of layers, each layer comprising one of the different areas of the carrier (150) and one of the integrated circuit dies (110, 120, 130), such that the plurality of integrated circuit dies (110, 120, 130) form a stack. Adjacent surfaces of neighbouring layers are fixed together, for example by an adhesive layer (122, 132), and the folded carrier (150) and the integrated circuit dies (110, 120, 130) are embedded in a moulded material (180).
摘要翻译：电子设备（100）包括安装在载体（150）的不同区域上的多个集成电路管芯（110,120,130）。载体（150）被折叠成多个层，每个层包括载体（150）的不同区域之一和集成电路管芯（110,120,130）中的一个，使得多个集成电路管芯（110,120,130）形成堆叠。相邻层的相邻表面例如通过粘合剂层（122,132）固定在一起，并且折叠的载体（150）和集成电路管芯（110,120,130）嵌入模制材料（180）中。

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