专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明公开

EP2264903A1 Synchronization circuit, synchronization method, and reception system 有权
标题翻译： Synchronisierschaltung，Synchronisierungsverfahren和Empfangssystem
公开(公告)号：EP2264903A1
公开(公告)日：2010-12-22
申请号：EP10004804.0
申请日：2010-05-06
申请人： Sony Corporation
发明人： Hattori, Masayuki , Futami, Tetsuhiro , Hirayama, Yuichi , Izumi, Keita
IPC分类号： H03L7/093 , H03L7/22
CPC分类号： H03L7/22 , H03L7/093
摘要： Disclosed herein is a synchronization circuit including: a first phase-locked loop circuit; a second phase-locked loop circuit; a first output circuit; a second output circuit; a first detection circuit; a second detection circuit; and a control circuit.
摘要翻译：这里公开了一种同步电路，包括：第一锁相环电路; 第二个锁相环电路; 第一输出电路; 第二输出电路; 第一检测电路; 第二检测电路; 和控制电路。

2. 发明公开

EP2169892A1 Information processing apparatus, information processing method, display apparatus and information processing program 有权
标题翻译：信息管理系统，信息管理系统，信息安全，信息安全，信息安全
公开(公告)号：EP2169892A1
公开(公告)日：2010-03-31
申请号：EP09252186.3
申请日：2009-09-15
申请人： Sony Corporation
发明人： Hattori, Masayuki , Yokokawa, Takashi , Kawauchi, Hidetoshi , Kamata, Hiroyuki , Ikegaya, Ryoji
IPC分类号： H04L27/26
CPC分类号： H04L27/2656 , H04L27/2665
摘要： Disclosed herein is an information processing apparatus including: a demodulation FFT processing section configured to carry out an FFT process on a demodulation-related signal extracted by making use of a demodulation FFT window from every symbol of a received OFDM signal and output the frequency-domain signal; a control FFT processing section configured to carry out a process equivalent to an FFT process on a control-related signal extracted by making use of a control FFT window from every symbol of the received OFDM signal and output the frequency-domain signal; a transmission-line information estimation section; anequalization section; a reception-quality computation/comparison section; and an FFT-window position control section configured to control the demodulation FFT window to be used by the demodulation FFT processing section and the control FFT window to be used by the control FFT processing section on the basis of a comparison result produced by the reception-quality computation/comparison section.
摘要翻译：这里公开了一种信息处理装置，包括：解调FFT处理部，被配置为对通过利用来自接收的OFDM信号的每个符号的解调FFT窗口提取的解调相关信号执行FFT处理，并输出频域信号; 控制FFT处理部，被配置为执行与通过利用来自所接收的OFDM信号的每个符号的控制FFT窗口提取的控制相关信号上的FFT处理相当的处理，并输出所述频域信号; 传输线信息估计部; 平等化部分接收质量计算/比较部分; 以及FFT窗口位置控制部分，被配置为基于由接收模式产生的比较结果来控制要由控制FFT处理部分使用的解调FFT处理部分和控制FFT窗口使用的解调FFT窗口，质量计算/比较部分。

3. 发明公开

EP1143440A3 Method and apparatus for reproducing data and method and apparatus for recording and/or reproducing data 审中-公开
标题翻译：用于记录和/或再现数据的方法和用于数据再现装置，以及方法和装置
公开(公告)号：EP1143440A3
公开(公告)日：2005-01-05
申请号：EP01302599.4
申请日：2001-03-21
申请人： SONY CORPORATION
发明人： Hattori, Masayuki , Murayama, Jun , Miyauchi, Toshiyuki
IPC分类号： G11B20/10 , G11B20/18 , G11B20/14 , H03M13/29 , H03M13/45 , H03M5/14
CPC分类号： H03M13/6325 , G11B20/10009 , G11B20/1426 , G11B20/1866 , G11B2020/1434 , G11B2020/1446 , H03M5/14 , H03M13/27 , H03M13/2957 , H03M13/2972 , H03M13/45 , H03M13/6343
摘要： A method and apparatus for recording or reproducing data in which high performance encoding and a high efficiency decoding are realized to lower the decoding error rate. A magnetic recording and/or reproducing apparatus 50 includes, in a recording system, a modulation encoder 52 for modulation encoding input data in a predetermined fashion and an interleaver 53 for interleaving data supplied from the modulation encoder 52 to re-array the data sequence. The magnetic recording and/or reproducing apparatus 50 also includes, in a reproducing system, a first deinterleaver for interleaving the input data for re-arraying the data sequence so that the bit sequence of data re-arrayed by the interleaver 53 will be restored to its original bit sequence, a modulation soft input soft output (SISO) decoder for modulation decoding data supplied from the first deinterleaver and a second deinterleaver for interleaving data corresponding to a difference value between data output by the modulation SISO decoder and data output by the first deinterleaver to re-array the data sequence of the difference data.

4. 发明授权

EP0991196B1 Method of correcting lost data and circuit thereof 失效
标题翻译：对于丢失的数据及其电路校正方法
公开(公告)号：EP0991196B1
公开(公告)日：2003-05-02
申请号：EP99124096.1
申请日：1993-10-28
申请人： SONY CORPORATION
发明人： Hattori, Masayuki
IPC分类号： H03M13/00
CPC分类号： H03M13/1535 , H03M13/00

5. 发明授权

EP1039647B1 Pseudo product code decoding 有权
标题翻译：伪品码解码
公开(公告)号：EP1039647B1
公开(公告)日：2002-10-23
申请号：EP00301045.1
申请日：2000-02-10
申请人： SONY CORPORATION
发明人： Hattori, Masayuki , Yamamoto, Kohei
IPC分类号： H03M13/29
CPC分类号： H03M13/2906 , H03M13/27
摘要： A pseudo product code decoding apparatus has the following units: a first error correction code decoding unit for effecting error correction by using parity symbols of a first linear-structure error correction code contained in an input symbol train that constitutes a pseudo product code codeword; a second error correction code decoding unit for effecting error correction by using parity symbols of a second linear-structure error correction code; a second-series information symbol extracting unit for extracting second-series information symbols; a subtraction code generating unit for generating a subtraction code of a pseudo product code codeword formed of the second-series information symbols, with the first-series information symbol portion and the second linear-structure error correction code portion being changed to zero codes; a transforming unit for transforming the pseudo product code codeword into a product code codeword through execution of subtracting processing with the subtraction code; an error correction code repetitive decoding unit for effecting decoding processings a plurality of times, thereby effecting error correction; and a first-series information symbol extracting unit for extracting the first-series information symbols.

6. 发明公开

EP1137002A1 Method and apparatus for recording and reproducing, using concatenated encoding and iterative decoding 审中-公开
标题翻译：方法和装置，用于记录和再现数据，使用级联编码和迭代译码的下
公开(公告)号：EP1137002A1
公开(公告)日：2001-09-26
申请号：EP01302600.0
申请日：2001-03-21
申请人： SONY CORPORATION
发明人： Miyauchi, Toshiyuki , Hattori, Masayuki , Murayama, Jun
IPC分类号： G11B20/10 , H03M13/39
CPC分类号： G11B20/10 , H03M13/39
摘要： A magnetic recording and/or reproducing apparatus in which the decoding error rate is to be lowered through realization of the high-performance encoding and the high efficiently decoding. To this end, a magnetic recording and/or reproducing apparatus 50 includes, in its recording system, an error correction coder 51 for error correction encoding input data, an interleaver 52 for interleaving data supplied from the error correction coder 51 for re-arraying the data sequence, a modulation encoder 53 for modulation encoding the data from the interleaver 52 in a predetermined fashion and an interleaver 54 for interleaving the data from the modulation encoder 53 for re-arraying the data sequence. The magnetic recording and/or reproducing apparatus 50 also includes, in its reproduction system, a channel, modulation and error correction turbo decoder 64 formed by concatenation of an error correction soft decoder and a modulation decoder for decoding the input data with the interposition of two deinterleavers and two interleavers.
摘要翻译：一种磁记录和/或再现装置，其中所述解码错误率是通过高性能编码的实现和有效地高解码降低。为此，磁记录和/或再现装置50包括，在其记录系统中，一个错误校正编码器51，用于纠错编码的输入数据到交织器52，用于从纠错编码器提供51重新排列交错数据数据序列，用于调制从交织器52以预定的方式进行编码的数据，并到交织器54，用于从调制编码器53交织的数据重新排列的数据序列的调制编码器53。磁记录和/或再现装置50因此包括在其再现系统中，一个信道，调制和纠错turbo解码器64由一个误差校正软解码器的级联以及用于将输入数据与两个插置进行解码的调制解码器FORMED 解交织器和两个交织。

7. 发明公开

EP0989680A1 Method of correcting lost data and circuit thereof 失效
标题翻译：纠正丢失数据的方法及其电路
公开(公告)号：EP0989680A1
公开(公告)日：2000-03-29
申请号：EP99124098.7
申请日：1993-10-28
申请人： SONY CORPORATION
发明人： Hattori, Masayuki
IPC分类号： H03M13/00
CPC分类号： H03M13/1535 , H03M13/00
摘要： The invention relates to a method of correcting lost data of a signal coded by a predetermined encoding method and a respective circuit. The method is characterized in that an error of the entire code of said signal is represented by a lost data position(s), and a first lost pattern of said lost data position(s), an error position(s) other that a lost symbol(s) and a second lost pattern of said error postition(s). The method includes the steps of

calculating a (2t-1)-th order syndrome polynomial S(X) as a product of said coded signal r and a parity inspection matrix H, where 2t denotes the number of parity symbols added to said signal, an X denotes an error position(s) other than a lost symbol(s) and first coefficients S i of said syndrome polynomial S(X);
simultaneously calculating second coefficients U i of a lost position polynomial u(X) and third coefficients T i of a corrected syndrome polynomial T(X) using a lost position(s) U i known by at least an error flag and said calculated first coefficients S i of said syndrome polynomial S(X);
calculating fourth coefficients σ i of a corrected error position polynomial σ(X) defined as a product of an error position polynomial σ(X) and said lost position polynomial u(X) using said calculated second coefficients U i of said lost position polynomial u(X) and said calculated third coefficients T i of said corrected syndrome polynomial T(X); and
correcting said coded signal using an error evaluation polynomial ω(X) and said corrected error positon polynomial σ(X), said error evaluation polynomial ω(X) being defined by said product polynomial and said syndrome polynomial S(X).
摘要翻译：本发明涉及一种校正由预定编码方法和相应电路编码的信号的丢失数据的方法。该方法的特征在于，所述信号的整个代码的错误由丢失数据位置表示，并且所述丢失数据位置的第一丢失模式，除丢失数据位置以外的错误位置，符号和所述错误发布的第二丢失模式。该方法包括以下步骤：计算作为所述编码信号r和奇偶校验检查矩阵H的乘积的（2t-1）阶校正子多项式S（X），其中2t表示添加到所述信号的奇偶校验码元的数量， X表示除了丢失符号和所述校正子多项式S（X）的第一系数Si以外的错误位置; 使用由至少一个错误标记已知的丢失位置（U）同时计算丢失位置多项式u（X）的第二系数U i和修正的校正子多项式T（X）的第三系数T i，并且所述计算出的所述第一系数S i 综合症多项式S（X）; 使用所述计算出的所述丢失位置多项式u（X）的第二系数Ui计算被定义为误差位置多项式σ（X）与所述丢失位置多项式u（X）的乘积的修正误差位置多项式σ（X）的第四系数σi ）和所述校正的校正子多项式T（X）的所述计算的第三系数Ti; 以及使用误差评估多项式ω（X）和所述校正的误差位置多项式σ（X）来校正所述编码信号，所述误差评估多项式ω（X）由所述乘积多项式和所述校正子多项式S（X）定义。

8. 发明公开

EP0926836A2 Viterbi decoding apparatus and viterbi decoding method 有权
标题翻译：维特比解码器和维特比Decodierverfahren
公开(公告)号：EP0926836A2
公开(公告)日：1999-06-30
申请号：EP98123361.2
申请日：1998-12-08
申请人： SONY CORPORATION
发明人： Miyauchi, Toshiyuki , Hattori, Masayuki
IPC分类号： H03M13/00
CPC分类号： H03M13/4176 , H03M13/4161
摘要： In a Viterbi decoder, a trace-back operation is carried out using three dual-port RAMs of the number of bits = 8 and the number of words = 4 are provided in a path memory circuit. Path selection information is sequentially written into the three RAMs every clock in accordance with the control of a control circuit. On the other hand, the path selection information is read out every clock from the RAMs in accordance with the control of the control circuit and is inputted as read path selection information or the like to a tracing circuit. The tracing circuit executes the tracing operation as many as three times on the basis of the read path selection information and trace starting state information which is formed by the control circuit. On the basis of a tracing result, the decoding data and a trace starting state in the subsequent clock are obtained. Thus, high speed operation is performed with a circuit having a small size.
摘要翻译：在维特比解码器中，使用位数为8的三个双端口RAM和字数为4的字符串提供在路径存储器电路中来进行追溯操作。根据控制电路的控制，每个时钟将路径选择信息顺序写入三个RAM。另一方面，根据控制电路的控制，每个时钟从RAM读出路径选择信息，作为读取路径选择信息等输入到追踪电路。跟踪电路基于由控制电路形成的读取路径选择信息和跟踪起始状态信息，执行多达三次的跟踪操作。基于跟踪结果，获得后续时钟中的解码数据和跟踪开始状态。因此，利用具有小尺寸的电路来执行高速操作。

9. 发明授权

EP1940033B1 Encoding multiword information by wordwise interleaving 有权
标题翻译：通过字为单位的嵌套加密字信息
公开(公告)号：EP1940033B1
公开(公告)日：2010-11-17
申请号：EP08153250.9
申请日：1999-07-19
申请人： Koninklijke Philips Electronics N.V. , Sony Corporation
发明人： Van Dijk, Marten, E. , Tolhuizen, Ludovicus, M., G., M. , Kahlman, Josephus, A., H., M. , Baggen, Constant, P., M., J. , Hattori, Masayuki , Yamamoto, Kouhei , Narahara, Tatsuya , Senshu, Susumu
IPC分类号： H03M13/29 , G11B20/18
CPC分类号： H03M13/2954 , G11B20/1833 , G11B20/1866 , G11B2020/1272 , G11B2020/1846

10. 发明公开

EP1137191A3 Coding and decoding 审中-公开
标题翻译：编码和解码
公开(公告)号：EP1137191A3
公开(公告)日：2004-09-01
申请号：EP01302732.1
申请日：2001-03-23
申请人： SONY CORPORATION
发明人： Murayama, Jun , Hattori, Masayuki , Miyauchi, Toshiyuki , Yamamoto, Kouhei , Yokokawa, Takashi
IPC分类号： H03M13/29 , H03M13/25 , H03M13/27 , H03M13/23 , H03M13/45 , H04L1/00
CPC分类号： H03M13/29 , H03M13/256 , H03M13/258 , H03M13/2972 , H03M13/3988
摘要： Error correction coding and decoding according to a serial concatenated modulation system are carried out under high code rate. A coding apparatus (1) comprises three convolutional coders (10, 30 and 50) for carrying out convolutional operation; two interleavers (20 and 40) for rearranging order of data input; and a multi-value mapping circuit (60) for carrying out mapping of a single point on the basis of a predetermined modulation system. The coding apparatus (1) carries out convolutional operation whose code rate is "2/3" as coding of extrinsic codes by a convolutional coder (10), and carries out convolutional operation whose code rate is "1" as coding of inner codes by a convolutional coder (50), and a multi-value modulation mapping circuit (60) applies mapping to a transmission symbol of a 8 PSK modulation system to output it as a single code transmission symbol.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式