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1. 发明公开

EP2274884A1 SYNCHRONIZING TIMING MISMATCH BY DATA DELETION 审中-公开
标题翻译：同步日期
公开(公告)号：EP2274884A1
公开(公告)日：2011-01-19
申请号：EP08769458.4
申请日：2008-05-12
申请人： QUALCOMM Incorporated
发明人： GARUDADRI, Harinath , MAJUMDAR, Somdeb , KASHEF, Rouzbeh , GANAPATHY, Chinnappa, K.
IPC分类号： H04L25/05 , H04L7/00 , G10L19/00
CPC分类号： H04L7/0016 , G10L19/005 , H04L7/0029 , H04L7/005 , H04L25/05
摘要： The rate at which data is provided by one device and the rate at which that data is processed by another device may differ. For example, a transmitting device may transmit data according to a transmit clock while a receiving device that receives the transmitted data may process the data according to a receive clock. If there is a timing mismatch between the transmit and receive clocks, the receiving device may receive data faster or slower than it processes the data. In such a case, there may be errors relating to the processing of the received data. To address timing mismatches such as this, the receiving device may delete data from or insert data into the received data. In conjunction with these operations, the receiving device may modify the received data at or near the insertion point or the deletion point in a manner that mitigates any adverse effect the insertion or deletion may have on a resulting output signal.
摘要翻译：一个设备提供数据的速率和另一个设备处理数据的速率可能不同。例如，发送装置可以根据发送时钟发送数据，而接收发送的数据的接收装置可以根据接收时钟处理数据。如果在发送和接收时钟之间存在定时不匹配，接收设备可能比处理数据更快或更慢地接收数据。在这种情况下，可能存在与接收到的数据的处理有关的错误。为了解决诸如此的定时不匹配，接收设备可以从接收到的数据中删除数据或将数据插入到数据中。结合这些操作，接收设备可以以减轻插入或删除对结果输出信号可能产生的任何不利影响的方式在插入点或删除点处或附近修改接收到的数据。

2. 发明授权

EP2272226B1 SYNCHRONIZING TIMING MISMATCH BY DATA INSERTION 有权
标题翻译：用数据插入同步时序不匹配
公开(公告)号：EP2272226B1
公开(公告)日：2017-10-18
申请号：EP08755347.5
申请日：2008-05-12
申请人： QUALCOMM Incorporated
发明人： GARUDADRI, Harinath , MAJUMDAR, Somdeb , KASHEF, Rouzbeh , GANAPATHY, Chinnappa, K.
IPC分类号： H04L25/05 , G10L19/005 , H04L7/00
CPC分类号： H04L7/0016 , G10L19/005 , H04L7/0029 , H04L7/005 , H04L25/05

3. 发明公开

EP2272226A1 SYNCHRONIZING TIMING MISMATCH BY DATA INSERTION 有权
标题翻译：同步时代德国新时代
公开(公告)号：EP2272226A1
公开(公告)日：2011-01-12
申请号：EP08755347.5
申请日：2008-05-12
申请人： QUALCOMM Incorporated
发明人： GARUDADRI, Harinath , MAJUMDAR, Somdeb , KASHEF, Rouzbeh , GANAPATHY, Chinnappa, K.
IPC分类号： H04L25/05 , H04L7/00 , G10L19/00
CPC分类号： H04L7/0016 , G10L19/005 , H04L7/0029 , H04L7/005 , H04L25/05
摘要： The rate at which data is provided by one device and the rate at which that data is processed by another device may differ. For example, a transmitting device may transmit data according to a transmit clock while a receiving device that receives the transmitted data may process the data according to a receive clock. If there is a timing mismatch between the transmit and receive clocks, the receiving device may receive data faster or slower than it processes the data. In such a case, there may be errors relating to the processing of the received data. To address timing mismatches such as this, the receiving device may delete data from or insert data into the received data. In conjunction with these operations, the receiving device may modify the received data at or near the insertion point or the deletion point in a manner that mitigates any adverse effect the insertion or deletion may have on a resulting output signal.
摘要翻译：一个设备提供数据的速率和另一个设备处理数据的速率可能不同。例如，发送装置可以根据发送时钟发送数据，而接收发送的数据的接收装置可以根据接收时钟处理数据。如果在发送和接收时钟之间存在定时不匹配，接收设备可能比处理数据更快或更慢地接收数据。在这种情况下，可能存在与接收到的数据的处理有关的错误。为了解决诸如此的定时不匹配，接收设备可以从接收到的数据中删除数据或将数据插入到数据中。结合这些操作，接收设备可以以减轻插入或删除对结果输出信号可能产生的任何不利影响的方式在插入点或删除点处或附近修改接收到的数据。

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