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    • 5. 发明公开
    • Frequency modulator utilizing frequency synthesizer
    • Einen Synthesierer verwendender频率调制器。
    • EP0357996A1
    • 1990-03-14
    • EP89114902.3
    • 1989-08-11
    • NEC CORPORATION
    • Kojima, Tatsuru c/o NEC Corporation
    • H03C3/09
    • H03C3/095H03B5/1847H03C3/06H03C3/22H03C2200/0033H03C2200/005H03C2200/0079
    • The frequency modulator utilizing a frequency synthesizer comprises a voltage controlled oscillator (VCO-2), a programable frequency divider (4), a reference oscillator (8), a phase comparator and a phase locked loop. The VCO (2) comprises a first variable capacitor (24) receiving the control voltage from the phase comparator (6) and a second variable capacitor (26) receiving an input modulation signal. A bias circuit controls a bias to be supplied to the second variable capacitor (26) in accordance with the control voltage delivered from the phase comparator (6). An undesirable change of the modulation sensitivity due to difference of the oscillation frequency is compensated by controlling the reverse bias to be applied to the second variable capacitor (26) receiving the input modulation signal depending on the frequency control voltage for the VCO (2).
    • 利用频率合成器的频率调制器包括压控振荡器(VCO-2),可编程分频器(4),参考振荡器(8),相位比较器和锁相环。 VCO(2)包括从相位比较器(6)接收控制电压的第一可变电容器(24)和接收输入调制信号的第二可变电容器(26)。 偏置电路根据从相位比较器(6)发送的控制电压控制要提供给第二可变电容器(26)的偏置。 通过根据VCO(2)的频率控制电压控制接收输入调制信号的第二可变电容器(26)的反向偏置来补偿由于振荡频率的差异引起的调制灵敏度的不期望的改变。
    • 6. 发明公开
    • PLL frequency synthesizer
    • 频谱合成仪
    • EP0212810A1
    • 1987-03-04
    • EP86305056.3
    • 1986-06-27
    • NEC CORPORATION
    • Kojima, Tatsuru c/o NEC CorporationFukumura, Yokio c/o NEC Corporation
    • H03L7/18H04B1/40
    • H03L7/0895H03L7/10H03L7/183
    • A PLL frequency synthesizer includes a VCO (1) for generating an oscillation of a frequency varying in response to a control voltage, a variable frequency divider (2) for dividing the output frequency of said VCO in a ratio according to a control signal, a reference oscillator (5) for supplying a reference signal having a predetermined frequency, a fixed frequency divider (4) for dividing the frequency of said reference signal in a fixed ratio, a phase comparator (3) for comparing the phases of the outputs of said fixed frequency divider to provide a control pulse corresponding to a phase difference between these outputs, a charge pump (16) having a power supply terminal for generating a charge/discharge voltage in response to said control pulse, a loop filter (7) including a capacitor (72) supplied with said charge/ discharge voltage for supplying to said VCO as said control voltage a voltage corresponding to said charge/discharge voltage, and a power supply circuit (10) responsive to the output of said fixed frequency divider and supplying said boosted DC voltage (V " ) to said power supply terminal.
    • PLL频率合成器包括用于产生响应于控制电压的频率变化的振荡的VCO(1),用于根据控制信号将所述VCO的输出频率按比率分频的可变分频器(2), 用于提供具有预定频率的参考信号的参考振荡器(5),用于以固定比率分频所述参考信号的频率的固定分频器(4);相位比较器(3),用于比较所述参考信号的输出的相位, 固定分频器,以提供对应于这些输出之间的相位差的控制脉冲;电荷泵(16),具有用于响应于所述控制脉冲产生充电/放电电压的电源端子;环路滤波器(7),包括: 提供有用于向所述VCO提供所述VCO的所述充电/放电电压的电容器(72)作为所述控制电压与所述充电/放电电压相对应的电压;以及电源电路(10),其响应于 所述固定分频器的输出并将所述升压的直流电压(VH)提供给所述电源端子。