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1. 发明公开

EP3910799A1 PHASE-LOCKED LOOP CIRCUIT AND DIGITAL-TO-TIME CONVERTOR ERROR CANCELATION METHOD THEREOF 审中-实审
公开(公告)号：EP3910799A1
公开(公告)日：2021-11-17
申请号：EP21173762.2
申请日：2021-05-13
申请人： MediaTek Inc.
发明人： CHIU, Wei-Hao , LIN, Ang-Sheng , CHUEH, Tzu-Chan
IPC分类号： H03L7/081 , H03L7/08
摘要： A phase-locked loop (PLL) circuit is provided in the invention. The PLL circuit includes a first DTC, a first selection circuit, and a second selection circuit. The first DTC receives a first delay control signal to dither a reference signal or a feedback signal. The first selection circuit is coupled to the first DTC. The first selection circuit receives the reference signal and the feedback signal, and according to the selection signal, transmits the reference signal or the feedback signal to the first DTC. The second selection circuit is coupled to the first DTC and the first selection circuit. The second selection circuit determines the output paths of an output reference signal or an output feedback signal according to the selection signal.

2. 发明公开

EP3678292A1 MAGNETICALLY PUMPED VOLTAGE CONTROLLED OSCILLATOR 审中-实审
公开(公告)号：EP3678292A1
公开(公告)日：2020-07-08
申请号：EP19210414.9
申请日：2019-11-20
申请人： MediaTek Inc.
发明人： HSUEH, Yu-Li , HUANG, Po-Chun , LIN, Ang-Sheng , CHIU, Wei-Hao
IPC分类号： H03B5/12
摘要： A voltage controlled oscillator includes a first inductor, a second inductor, a first metal oxide semiconductor (MOS) transistor, a second MOS transistor, and an inductor-capacitor (LC) tank circuit. A first end of the first inductor and a first end of the second inductor are coupled to a first power rail. A drain node of the first MOS transistor is coupled to a second end of the first inductor. A drain node of the second MOS transistor is coupled to a second end of the second inductor. Source nodes of the first MOS transistor and the second MOS transistor are coupled to a second power rail. The LC tank circuit is coupled to gate nodes of the first MOS transistor and the second MOS transistor, wherein energy is magnetically pumped into the LC tank circuit through the first inductor and the second inductor.

3. 发明公开

EP3893389A1 INDUCTOR-CAPACITOR OSCILLATOR WITH EMBEDDED SECOND HARMONIC FILTER AND ASSOCIATED DUAL CORE OSCILLATOR 审中-实审
公开(公告)号：EP3893389A1
公开(公告)日：2021-10-13
申请号：EP20216423.2
申请日：2020-12-22
申请人： MEDIATEK INC.
发明人： HUANG, Hao-Wei , LIN, Ang-Sheng , CHIU, Wei-Hao
IPC分类号： H03B5/12
摘要： An inductor-capacitor (LC) oscillator with an embedded second harmonic filter and an associated dual core oscillator are provided. The LC oscillator includes a first transistor, a second transistor, a first part-one inductor, a second part-one inductor, a part-one capacitor, a part-two inductor and at least one part-two capacitor. A first end of the first part-one inductor and a first end of the second part-one inductor are coupled to gate terminals of the second transistor and the first transistor, respectively. The part-one capacitor is coupled between the first end of the first part-one inductor and the first end of the second part-one inductor. The part-two inductor is coupled between a second end of the first part-one inductor and a second end of the second part-one inductor. The at least one part-two capacitor is coupled to drain terminals of the first transistor and the second transistor.

4. 发明公开

EP3093989A1 INDUCTOR CAPACITOR TANK FOR RESONATOR 有权
标题翻译：用于谐振器的电感电容器罐
公开(公告)号：EP3093989A1
公开(公告)日：2016-11-16
申请号：EP16158392.7
申请日：2016-03-03
申请人： MediaTek, Inc
发明人： WANG, Kun-Yin , CHIU, Wei-Hao , LIN, Ang-Sheng
IPC分类号： H03H5/12
CPC分类号： H03H7/0115 , H01F17/0006 , H01F2017/0073 , H03H5/12
摘要： An inductor capacitor (LC) tank (100) includes a first inductor (L) and a first tunable capacitive array (C 1 ). The first inductor (L) has a first terminal (N1) and a second terminal (N2), and the first tunable capacitive array (C 1 ) has a first terminal and a second terminal. The first tunable capacitive array (C 1 ) is at a path branching from a first point (VxP) between the first terminal (N1) and the second terminal (N2) of the first inductor (L), the first terminal of the first tunable capacitive array (C 1 ) is coupled to the first point (VxP), and the second terminal of the first tunable capacitive array (C 1 ) and the second terminal (N2) of the first inductor (L) are coupled to a reference voltage.
摘要翻译：电感器电容器（LC）槽（100）包括第一电感器（L）和第一可调谐电容阵列（C1）。第一电感器（L）具有第一端子（N1）和第二端子（N2），并且第一可变电容阵列（C1）具有第一端子和第二端子。第一可调容性阵列（C1）处于从第一电感器（L）的第一端子（N1）和第二端子（N2）之间的第一点（VxP）分支的路径，第一可调电容器阵列（C1）耦合到第一点（VxP），并且第一可变电容阵列（C1）的第二端子和第一电感器（L）的第二端子（N2）耦合到参考电压。

5. 发明公开

EP3046239A1 CURRENT GENERATING CIRCUIT, CURRENT GENERATING METHOD, CHARGE PUMPING CIRCUIT AND CHARGE PUMPING METHOD 有权
标题翻译： STRANGGENERATORSCHALTUNG，VERFAHREN ZUR STRMERZEUGUNG，LADUNGSPUMPENSUNGALT UND LADUNGSPUMPENVERFAHREN
公开(公告)号：EP3046239A1
公开(公告)日：2016-07-20
申请号：EP15168507.0
申请日：2015-05-20
申请人： MediaTek, Inc
发明人： CHIU, Wei-Hao , LIN, Ang-Sheng
IPC分类号： H02M3/07
CPC分类号： H02M3/07
摘要： A current generating circuit (200), which comprises: a first capacitor (C_1), comprising a first terminal and a second terminal; a second capacitor (C_2), comprising a first terminal and a second terminal; a first charge adjusting path (CP_1), arranged for adjusting charges of the first capacitor according to a first charge adjusting voltage (V_1); a second charge adjusting path (CP_2), arranged for adjusting charges of the second capacitor (C_2) according to the first charge adjusting voltage; and a current generating path (201), coupled to the first capacitor and the second capacitor, arranged for generating a target current (I_T) based on a difference between a first voltage (V_1) provided by the first capacitor (C_1) and a second voltage (V_2) provided by the second capacitor (C_2).
摘要翻译：一种电流产生电路（200），包括：第一电容器（C_1），包括第一端子和第二端子; 第二电容器（C_2），包括第一端子和第二端子; 第一电荷调整路径（CP_1），被布置为根据第一电荷调节电压（V_1）调整第一电容器的电荷; 第二电荷调整路径（CP_2），被布置为根据第一电荷调节电压调整第二电容器（C_2）的电荷; 和连接到所述第一电容器和所述第二电容器的电流产生路径（201），被布置成基于由所述第一电容器（C_1）提供的第一电压（V_1）和第二电容器（C_1）之间的差产生目标电流（I_T）电压（V_2）由第二电容器（C_2）提供。

6. 发明授权

EP3046239B1 CURRENT GENERATING CIRCUIT, CURRENT GENERATING METHOD, CHARGE PUMPING CIRCUIT AND CHARGE PUMPING METHOD 有权
公开(公告)号：EP3046239B1
公开(公告)日：2018-10-17
申请号：EP15168507.0
申请日：2015-05-20
申请人： MediaTek Inc.
发明人： CHIU, Wei-Hao , LIN, Ang-Sheng
IPC分类号： H02M3/07
CPC分类号： H02M3/07
摘要： A current generating circuit (200), which comprises: a first capacitor (C_1), comprising a first terminal and a second terminal; a second capacitor (C_2), comprising a first terminal and a second terminal; a first charge adjusting path (CP_1), arranged for adjusting charges of the first capacitor according to a first charge adjusting voltage (V_1); a second charge adjusting path (CP_2), arranged for adjusting charges of the second capacitor (C_2) according to the first charge adjusting voltage; and a current generating path (201), coupled to the first capacitor and the second capacitor, arranged for generating a target current (I_T) based on a difference between a first voltage (V_1) provided by the first capacitor (C_1) and a second voltage (V_2) provided by the second capacitor (C_2).

7. 发明授权

EP3093989B1 INDUCTOR CAPACITOR TANK FOR RESONATOR 有权
标题翻译：用于谐振器的电感电容器罐
公开(公告)号：EP3093989B1
公开(公告)日：2018-05-16
申请号：EP16158392.7
申请日：2016-03-03
申请人： MediaTek Inc.
发明人： WANG, Kun-Yin , CHIU, Wei-Hao , LIN, Ang-Sheng
IPC分类号： H03H5/12
CPC分类号： H03H7/0115 , H01F17/0006 , H01F2017/0073 , H03H5/12
摘要： An inductor capacitor (LC) tank (100) includes a first inductor (L) and a first tunable capacitive array (C 1 ). The first inductor (L) has a first terminal (N1) and a second terminal (N2), and the first tunable capacitive array (C 1 ) has a first terminal and a second terminal. The first tunable capacitive array (C 1 ) is at a path branching from a first point (VxP) between the first terminal (N1) and the second terminal (N2) of the first inductor (L), the first terminal of the first tunable capacitive array (C 1 ) is coupled to the first point (VxP), and the second terminal of the first tunable capacitive array (C 1 ) and the second terminal (N2) of the first inductor (L) are coupled to a reference voltage.

8. 发明公开

EP3157167A1 LC-TANK OSCILLATOR HAVING INTRINSIC LOW-PASS FILTER 有权转让
标题翻译： LC-TANK-OSZILLATOR MIT INTRINSISCHEM TIEFPASSFILTER
公开(公告)号：EP3157167A1
公开(公告)日：2017-04-19
申请号：EP16190134.3
申请日：2016-09-22
申请人： MediaTek Inc.
发明人： CHIU, Wei-Hao , CHUEH, Tzu-Chan , LIN, Ang-Sheng
IPC分类号： H03B5/12
CPC分类号： H03B5/1212 , H03B5/1228 , H03B5/1268 , H03B2200/0082
摘要： An oscillator (100) for generating oscillation signals at two output terminals (N1, N2) includes an inductor (120) coupled between the two output terminals (N1, N2), a capacitor (110) coupled between the two output terminals (N1, N2), two P-type transistors (MP1, MP2) and two N-type transistors (MN1, MN2). Source electrodes of the two P-type transistors (MP1, MP2) are coupled to a supply voltage, and gate electrodes of the two P-type transistors (MP1, MP2) are coupled to the two output terminals (N1, N2), respectively. Source electrodes of the two N-type transistors (MN1, MN2) are coupled to a supply voltage, gate electrodes of the two N-type transistors (MN1, MN2) are coupled to the two output terminals (N1, N2), respectively, and drain electrodes of the two N-type transistors (MN1, MN2) are coupled to drain electrodes of the two P-type transistors (MP1, MP2), respectively. In addition, the drain electrodes of the two N-type transistors (MN1, MN2) are coupled to two internal nodes of the inductor (120).
摘要翻译：一种用于在两个输出端子（N1，N2）产生振荡信号的振荡器（100）包括耦合在两个输出端子（N1，N2）之间的电感器（120），耦合在两个输出端子 N2），两个P型晶体管（MP1，MP2）和两个N型晶体管（MN1，MN2）。两个P型晶体管（MP1，MP2）的源电极耦合到电源电压，并且两个P型晶体管（MP1，MP2）的栅电极分别耦合到两个输出端子（N1，N2）。两个N型晶体管（MN1，MN2）的源电极耦合到电源电压，两个N型晶体管（MN1，MN2）的栅极电极分别耦合到两个输出端子（N1，N2）并且两个N型晶体管（MN1，MN2）的漏电极分别耦合到两个P型晶体管（MP1，MP2）的漏电极。此外，两个N型晶体管（MN1，MN2）的漏电极耦合到电感器（120）的两个内部节点。

9. 发明公开

EP4258350A1 SEMICONDUCTOR DEVICE USING ONE OR MORE SLOTS ADDED TO ISOLATION REGION SURROUNDING INDUCTOR FOR ISOLATION IMPROVEMENT 审中-公开
公开(公告)号：EP4258350A1
公开(公告)日：2023-10-11
申请号：EP23164186.1
申请日：2023-03-24
申请人： MediaTek Inc.
发明人： LIN, Ang-Sheng , YEH, Yen-Liang , HUANG, Hao-Wei
IPC分类号： H01L23/522 , H01L23/64
摘要： A semiconductor device includes a metal layer, a ground plane formed on the metal layer, a first inductor formed on the metal layer, and a first isolation region formed on the metal layer and arranged to separate the first inductor from the ground plane. The first isolation region includes a first main area surrounding the first inductor, and at least one first slot extended from the first main area.

10. 发明公开

EP4099562A1 ONE-COIL MULTI-CORE INDUCTOR-CAPACITOR OSCILLATOR 审中-实审
公开(公告)号：EP4099562A1
公开(公告)日：2022-12-07
申请号：EP22174966.6
申请日：2022-05-23
申请人： MEDIATEK INC.
发明人： HUANG, Hao-Wei , YANG, Song-Yu , LIN, Ang-Sheng , TSAI, Yi-Chien
IPC分类号： H03B5/08 , H03B5/12
摘要： A one-coil multi-core inductor-capacitor (LC) oscillator is provided. The one-coil multi-core LC oscillator includes a main coil and at least one mode suppression device. The main coil includes an outer wire and a central wire, wherein the outer wire is coupled to a first core circuit and a second core circuit, and the central wire is coupled between a first node and a second node of the outer wire. More particularly, an outer loop formed by the outer wire corresponds to a first mode of the one-coil multi-core LC oscillator, and inner loops formed by the outer wire and the central wire correspond to a second mode of the one-coil multi-core LC oscillator, where the at least one mode suppression device is configured to suppress one of the first mode and the second mode.

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