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1. 发明公开

EP3154078A3 FAN-OUT WAFER LEVEL PACKAGE STRUCTURE 无效
标题翻译：扇出晶圆级封装结构
公开(公告)号：EP3154078A3
公开(公告)日：2017-05-31
申请号：EP16184667.0
申请日：2016-08-18
申请人： MediaTek Inc.
发明人： LIU, Nai-Wei , LIN, Tzu-Hung , PENG, I-Hsuan , HSIAO, Ching-Wen , HUANG, Wei-Che
IPC分类号： H01L21/56 , H01L21/60
CPC分类号： H01L23/544 , H01L21/561 , H01L21/568 , H01L23/562 , H01L24/19 , H01L24/20 , H01L24/96 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/29016 , H01L2224/2919 , H01L2224/32225 , H01L2224/73267 , H01L2224/9222 , H01L2225/1035 , H01L2225/1041 , H01L2924/1431 , H01L2924/1432 , H01L2924/1436 , H01L2924/3511 , H01L2924/3512 , H01L2924/35121 , H01L2924/37001
摘要： A semiconductor package structure is provided. The structure includes a molding compound (100) having a dicing lane region (L). A semiconductor die (200) is disposed in the molding compound and surrounded by the dicing lane region. The semiconductor die has a first surface (200a) and a second surface (200b) opposite thereto, and the first and second surfaces are exposed from the molding compound. The structure further includes a redistribution layer (RDL) structure (102) disposed on the first surface of the semiconductor die and covering the molding compound. The RDL structure includes a photosensitive material (102a) and has an opening (103) aligned with the dicing lane region.
摘要翻译：提供了一种半导体封装结构。该结构包括具有切割道区域（L）的模塑料（100）。半导体管芯（200）设置在模塑料中并被切割线区域包围。半导体管芯具有第一表面（200a）和与其相对的第二表面（200b），并且第一和第二表面从模塑料露出。该结构还包括布置在半导体管芯的第一表面上并覆盖模塑料的再分布层（RDL）结构（102）。 RDL结构包括光敏材料（102a）并具有与切割道区域对齐的开口（103）。

2. 发明公开

EP3154078A2 FAN-OUT WAFER LEVEL PACKAGE STRUCTURE 无效
标题翻译：输出风扇房屋结构在晶片级
公开(公告)号：EP3154078A2
公开(公告)日：2017-04-12
申请号：EP16184667.0
申请日：2016-08-18
申请人： MediaTek Inc.
发明人： LIU, Nai-Wei , LIN, Tzu-Hung , PENG, I-Hsuan , HSIAO, Ching-Wen , HUANG, Wei-Che
IPC分类号： H01L21/56
CPC分类号： H01L23/544 , H01L21/561 , H01L21/568 , H01L23/562 , H01L24/19 , H01L24/20 , H01L24/96 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/29016 , H01L2224/2919 , H01L2224/32225 , H01L2224/73267 , H01L2224/9222 , H01L2225/1035 , H01L2225/1041 , H01L2924/1431 , H01L2924/1432 , H01L2924/1436 , H01L2924/3511 , H01L2924/3512 , H01L2924/35121 , H01L2924/37001
摘要： A semiconductor package structure is provided. The structure includes a molding compound (100) having a dicing lane region (L). A semiconductor die (200) is disposed in the molding compound and surrounded by the dicing lane region. The semiconductor die has a first surface (200a) and a second surface (200b) opposite thereto, and the first and second surfaces are exposed from the molding compound. The structure further includes a redistribution layer (RDL) structure (102) disposed on the first surface of the semiconductor die and covering the molding compound. The RDL structure includes a photosensitive material (102a) and has an opening (103) aligned with the dicing lane region.

3. 发明公开

EP4006969A3 STACKED FAN-OUT PACKAGE STRUCTURE 审中-实审
公开(公告)号：EP4006969A3
公开(公告)日：2022-12-28
申请号：EP22150096.0
申请日：2016-09-01
申请人： MediaTek Inc.
发明人： LIU, Nai-Wei , LIN, Tzu-Hung , PENG, I-Hsuan , HSIAO, Ching-Wen , HUANG, Wei-Che
IPC分类号： H01L23/538 , H01L23/31 , H01L21/60 , H01L25/03 , H01L21/56
摘要： The invention refers to semiconductor package structure (10) comprising a first semiconductor die (100) having a first surface and a second surface opposite thereto, a first molding compound (102) surrounding the first semiconductor die, a first redistribution layer (RDL) structure (104) disposed on the second surface of the first semiconductor die and laterally extending on the first molding compound, a second semiconductor die (200) disposed via an adhesion layer (203) on the first RDL structure having a first surface and a second surface opposite thereto, a second molding compound (202) surrounding the second semiconductor die, a second RDL structure (204) disposed on the second surface (200b) of the second semiconductor die (200) and laterally extending on the second molding compound (202); and a first protective layer (202a) covering a sidewall of the first RDL structure and a sidewall of the first molding compound he first protective layer is an extending portion (202a) of the second molding compound (202), wherein the semiconductor package structure (10; 20; 40) further comprises a backside film (500) disposed on the first surface (100a) of the first semiconductor die (100), and wherein the extending portion (202a) conformally extends along the sidewall (104a) of the first RDL structure (104) and the sidewall (102a) of the first molding compound (102) to the backside film (500), thereby entirely covering the sidewall of the first RDL structure (104) and the sidewall of the first molding compound (102).

4. 发明公开

EP4006969A2 STACKED FAN-OUT PACKAGE STRUCTURE 审中-实审
公开(公告)号：EP4006969A2
公开(公告)日：2022-06-01
申请号：EP22150096.0
申请日：2016-09-01
申请人： MediaTek Inc.
发明人： LIU, Nai-Wei , LIN, Tzu-Hung , PENG, I-Hsuan , HSIAO, Ching-Wen , HUANG, Wei-Che
IPC分类号： H01L23/538 , H01L23/31 , H01L21/60 , H01L21/56
摘要： The invention refers to semiconductor package structure (10) comprising a first semiconductor die (100) having a first surface and a second surface opposite thereto, a first molding compound (102) surrounding the first semiconductor die, a first redistribution layer (RDL) structure (104) disposed on the second surface of the first semiconductor die and laterally extending on the first molding compound, a second semiconductor die (200) disposed via an adhesion layer (203) on the first RDL structure having a first surface and a second surface opposite thereto, a second molding compound (202) surrounding the second semiconductor die, a second RDL structure (204) disposed on the second surface (200b) of the second semiconductor die (200) and laterally extending on the second molding compound (202); and a first protective layer (202a) covering a sidewall of the first RDL structure and a sidewall of the first molding compound he first protective layer is an extending portion (202a) of the second molding compound (202), wherein the semiconductor package structure (10; 20; 40) further comprises a backside film (500) disposed on the first surface (100a) of the first semiconductor die (100), and wherein the extending portion (202a) conformally extends along the sidewall (104a) of the first RDL structure (104) and the sidewall (102a) of the first molding compound (102) to the backside film (500), thereby entirely covering the sidewall of the first RDL structure (104) and the sidewall of the first molding compound (102).

5. 发明公开

EP3246940A1 SEMICONDUCTOR PACKAGE ASSEMBLY 有权转让
标题翻译：半导体封装组件
公开(公告)号：EP3246940A1
公开(公告)日：2017-11-22
申请号：EP17167858.4
申请日：2017-04-25
申请人： MediaTek Inc.
发明人： LIU, Nai-Wei , LIN, Tzu-Hung , PENG, I-Hsuan , KUO, Che-Hung , CHOU, Che-Ya , HUANG, Wei-Che
IPC分类号： H01L21/60 , H01L23/498 , H01L25/065 , H01L25/10
CPC分类号： H01L23/49838 , H01L23/3128 , H01L23/49811 , H01L23/49827 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L23/5386 , H01L24/05 , H01L24/06 , H01L24/09 , H01L24/19 , H01L24/20 , H01L24/48 , H01L24/49 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L2224/02331 , H01L2224/0235 , H01L2224/02375 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/05552 , H01L2224/05569 , H01L2224/12105 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48229 , H01L2224/73265 , H01L2225/0651 , H01L2225/06562 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/1421 , H01L2924/1436 , H01L2924/1438 , H01L2924/15311 , H01L2924/351 , H01L2924/3512 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
摘要： The invention provides a semiconductor package assembly. The semiconductor package assembly includes a redistribution layer (RDL) structure. The RDL structure includes a conductive trace (216). A redistribution layer (RDL) contact pad (218) is electrically coupled to the conductive trace. The RDL contact pad is composed of a symmetrical portion and an extended wing portion connected to the symmetrical portion. The extended wing portion overlaps at least one-half of a boundary of the symmetrical portion when observed from a plan view.
摘要翻译：本发明提供了一种半导体封装组件。半导体封装组件包括再分布层（RDL）结构。 RDL结构包括导电迹线（216）。再分布层（RDL）接触垫（218）电耦合到导电迹线。 RDL接触垫由对称部分和连接到对称部分的延伸翼部分组成。当从平面图观察时，延伸的翼部分重叠对称部分的边界的至少一半。

6. 发明公开

EP3154083A3 FAN-OUT PACKAGE STRUCTURE HAVING EMBEDDED PACKAGE SUBSTRATE 审中-实审
标题翻译：具有嵌入式封装基板的扇出封装结构
公开(公告)号：EP3154083A3
公开(公告)日：2017-07-26
申请号：EP16186286.7
申请日：2016-08-30
申请人： MediaTek Inc.
发明人： LIN, Tzu-Hung , LIEN, Chi-Chin , LIU, Nai-Wei , PENG, I-Hsuan , HSIAO, Ching-Wen , HUANG, Wei-Che
IPC分类号： H01L23/498 , H01L25/10
CPC分类号： H01L25/105 , H01L23/49816 , H01L23/49833 , H01L23/5389 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2225/1094 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2924/00
摘要： A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor package that includes a first semiconductor die having a first surface and a second surface opposite thereto. A first package substrate is disposed on the first surface of the first semiconductor die. A first molding compound surrounds the first semiconductor die and the first package substrate. A first redistribution layer (RDL) structure is disposed on the first molding compound, in which the first package substrate is interposed and electrically coupled between the first semiconductor die and the first RDL structure.
摘要翻译：提供了一种半导体封装结构。该半导体封装结构包括第一半导体封装，该第一半导体封装包括具有第一表面和与其相对的第二表面的第一半导体管芯第一封装衬底设置在第一半导体管芯的第一表面上。第一模塑料围绕第一半导体管芯和第一封装衬底。第一重新分布层（RDL）结构设置在第一模塑料上，其中第一封装衬底插入并且电耦合在第一半导体管芯和第一RDL结构之间。

7. 发明公开

EP3154083A2 FAN-OUT PACKAGE STRUCTURE HAVING EMBEDDED PACKAGE SUBSTRATE 审中-实审
标题翻译：风扇包装STR UR UR UR AT AT AT AT AT AT AT AT AT AT AT AT AT
公开(公告)号：EP3154083A2
公开(公告)日：2017-04-12
申请号：EP16186286.7
申请日：2016-08-30
申请人： MediaTek Inc.
发明人： LIN, Tzu-Hung , LIEN, Chi-Chin , LIU, Nai-Wei , PENG, I-Hsuan , HSIAO, Ching-Wen , HUANG, Wei-Che
IPC分类号： H01L23/498 , H01L25/10
CPC分类号： H01L25/105 , H01L23/49816 , H01L23/49833 , H01L23/5389 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2225/1094 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2924/00
摘要： A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor package that includes a first semiconductor die having a first surface and a second surface opposite thereto. A first package substrate is disposed on the first surface of the first semiconductor die. A first molding compound surrounds the first semiconductor die and the first package substrate. A first redistribution layer (RDL) structure is disposed on the first molding compound, in which the first package substrate is interposed and electrically coupled between the first semiconductor die and the first RDL structure.
摘要翻译：提供半导体封装结构。半导体封装结构包括第一半导体封装，其包括具有第一表面和与其相对的第二表面的第一半导体管芯。第一封装基板设置在第一半导体管芯的第一表面上。第一模制化合物围绕第一半导体管芯和第一封装衬底。第一再分配层（RDL）结构设置在第一模塑料上，其中插入第一封装衬底并电耦合在第一半导体管芯和第一RDL结构之间。

8. 发明公开

EP3772094A3 CHIP SCALE PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME 审中-实审
公开(公告)号：EP3772094A3
公开(公告)日：2023-01-04
申请号：EP20183881.0
申请日：2020-07-03
申请人： MediaTek Inc.
发明人： CHI, Yen-Yao , LIU, Nai-Wei , YU, Ta-Jen , LIN, Tzu-Hung , HSU, Wen-Sung , LIN, Shih-Chin
IPC分类号： H01L23/00 , H01L21/56 , H01L23/31
摘要： A semiconductor package structure includes a semiconductor die, a redistribution layer (RDL) structure, a protective insulating layer, and a conductive structure. The semiconductor die has a first surface, a second surface opposite the first surface, and a third surface adjoined between the first surface and the second surface. The RDL structure is on the first surface of the semiconductor die and is electrically coupled to the semiconductor die. The protective insulating layer covers the RDL structure, the second surface and the third surface of the semiconductor die. The conductive structure passes through the protective insulating layer and is electrically coupled to the RDL structure.

9. 发明公开

EP3951870A1 METHOD FOR FORMING A FAN-OUT PACKAGE STRUCTURE 审中-实审
公开(公告)号：EP3951870A1
公开(公告)日：2022-02-09
申请号：EP21195647.9
申请日：2017-02-10
申请人： MEDIATEK Inc.
发明人： LIN, Tzu-Hung , PENG, I-Hsuan , HSIAO, Ching-Wen , LIU, Nai-Wei , HUANG, Wei-Che
IPC分类号： H01L25/16 , H01L25/10 , H01L23/498 , H01L23/31 , H01L21/56
摘要： A method for forming a semiconductor package structure, comprises: forming a first RDL structure on a carrier substrate, wherein the first RDL structure ( 110 ) has a first surface and a second surface opposite thereto and the second surface of the first RDL structure ( 110 ) is attached to the carrier substrate; forming a plurality of solder structures (120') on the first surface of the first RDL structure ( 110 ); mounting a first semiconductor die ( 300 ) and a first electronic component ( 400 ) onto the first surface of the first RDL structure ( 110 ), wherein the first semiconductor die ( 300 ) is electrically coupled to the plurality of solder structures through the first RDL structure; forming a first molding compound ( 130 ) on the first surface of the first RDL structure, such that the first semiconductor die ( 300 ) and the plurality of solder structures are embedded in the first molding compound ( 130 ); forming a plurality of openings ( 130 a) in the first molding compound ( 130 ) to correspondingly expose the plurality of solder structures; removing the carrier substrate from the first RDL structure; and mounting a second electronic component ( 500 ) onto the second surface of the first RDL structure after removing the carrier substrate.
Fig. 3 D

10. 发明公开

EP3772100A1 SEMICONDUCTOR PACKAGE STRUCTURE INCLUDING ANTENNA 审中-实审
公开(公告)号：EP3772100A1
公开(公告)日：2021-02-03
申请号：EP20185395.9
申请日：2020-07-13
申请人： Mediatek Inc.
发明人： CHI, Yen-Yao , LIU, Nai-Wei , LIN, Tzu-Hung
IPC分类号： H01L23/66 , H01L23/31 , H01L23/498 , H01L23/00 , H01L25/065 , H01L25/10 , H05K1/00
摘要： A semiconductor package structure is provided. The semiconductor package structure includes an antenna device and semiconductor package. The antenna device includes a conductive pattern layer including a first antenna element, formed in an insulating substrate and adjacent to a first surface of the insulating substrate. The antenna device also includes a second antenna element formed on a second surface of the insulating substrate opposite the first surface. The semiconductor package includes a redistribution layer (RDL) structure bonded and electrically connected to the conductive pattern layer. The semiconductor package also includes a first semiconductor die electrically connected to the RDL structure, and an encapsulating layer formed on the RDL structure and surrounding the first semiconductor die.

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