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1. 发明授权

EP0258042B1 Phase locked loop circuit with quickly recoverable stability 失效
标题翻译：锁相环电路具有快速恢复的稳定性。
公开(公告)号：EP0258042B1
公开(公告)日：1994-04-06
申请号：EP87307526.1
申请日：1987-08-25
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Honjo, Masahiro , Ochi, Atsuo , Takeuchi, Akihiro , Aki, Shinichi , Nakagawa, Yukio , Kobayashi, Masaaki
IPC分类号： H03L7/18
CPC分类号： H04N5/126 , H03L7/199 , H04N5/956

2. 发明授权

EP0178868B1 Chrominance signal processing apparatus 失效
标题翻译：色相信号处理装置
公开(公告)号：EP0178868B1
公开(公告)日：1992-05-13
申请号：EP85307312.0
申请日：1985-10-11
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Nakagawa, Yukio , Matsumoto, Tokikazu , Tomita, Masao
IPC分类号： H04N9/79 , H04N9/83
CPC分类号： H04N9/79 , H04N9/7921 , H04N9/831

3. 发明公开

EP0258042A3 Phase locked loop circuit with quickly recoverable stability 失效
标题翻译：具有快速恢复稳定性的相位锁定环路
公开(公告)号：EP0258042A3
公开(公告)日：1989-10-04
申请号：EP87307526.1
申请日：1987-08-25
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Honjo, Masahiro , Ochi, Atsuo , Takeuchi, Akihiro , Aki, Shinichi , Nakagawa, Yukio , Kobayashi, Masaaki
IPC分类号： H03L7/18
CPC分类号： H04N5/126 , H03L7/199 , H04N5/956
摘要： A PLL circuit for a phase comparator, a low-pass filter (LPF), a voltage-controlled oscillator (VCO) and a frequency divider. A first control circuit is responsive to a discontinuous phase change of a reference signal of the PLL circuit for inhibiting the operation of the phase comparator or disconnecting the LPF from the phase comparator during a predetermined period so that the discontinuous phase change information is not transmitted through the LPF to the VCO. At the same time, a second control circuit resets the frequency divider by a pulse of the reference signal after the discontinuous phase change or applies a voltage corresponding to the discontinuous phase change to the VCO so that the output signal of the frequency divider is locked in phase to the reference signal after the discontinuous phase change. With the cooperation of the first and second control circuits, the PLL circuit quickly recovers its stable state after the discontinuous phase change of the reference signal.

4. 发明公开

EP0258042A2 Phase locked loop circuit with quickly recoverable stability 失效
标题翻译： Phasenregelschleifenschaltung mit schnell wiederherstellbarerStabilität。
公开(公告)号：EP0258042A2
公开(公告)日：1988-03-02
申请号：EP87307526.1
申请日：1987-08-25
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Honjo, Masahiro , Ochi, Atsuo , Takeuchi, Akihiro , Aki, Shinichi , Nakagawa, Yukio , Kobayashi, Masaaki
IPC分类号： H03L7/18
CPC分类号： H04N5/126 , H03L7/199 , H04N5/956
摘要： A PLL circuit for a phase comparator, a low-pass filter (LPF), a voltage-controlled oscillator (VCO) and a frequency divider. A first control circuit is responsive to a discontinuous phase change of a reference signal of the PLL circuit for inhibiting the operation of the phase comparator or disconnecting the LPF from the phase comparator during a predetermined period so that the discontinuous phase change information is not transmitted through the LPF to the VCO. At the same time, a second control circuit resets the frequency divider by a pulse of the reference signal after the discontinuous phase change or applies a voltage corresponding to the discontinuous phase change to the VCO so that the output signal of the frequency divider is locked in phase to the reference signal after the discontinuous phase change. With the cooperation of the first and second control circuits, the PLL circuit quickly recovers its stable state after the discontinuous phase change of the reference signal.
摘要翻译：用于相位比较器的PLL电路，低通滤波器（LPF），压控振荡器（VCO）和分频器。第一控制电路响应于PLL电路的参考信号的不连续相位变化，用于在预定时段期间禁止相位比较器的操作或者从相位比较器断开LPF，使得不连续相位改变信息不被传送通过 LPF到VCO。同时，第二控制电路在不连续相变之后通过参考信号的脉冲复位分频器，或者将与不连续相位相对应的电压施加到VCO，使得分频器的输出信号被锁定在不连续相变之后与参考信号相位。通过第一和第二控制电路的协调，PLL电路在参考信号的不连续相变之后快速恢复其稳定状态。

5. 发明授权

EP0140716B1 Method and apparatus for reproducing a chrominance signal 失效
标题翻译：用于再现色度信号的方法和装置
公开(公告)号：EP0140716B1
公开(公告)日：1991-01-23
申请号：EP84307529.2
申请日：1984-11-01
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Nakagawa, Yukio , Tomita, Masao , Matsumoto, Tokikazu
IPC分类号： H04N9/83
CPC分类号： H04N9/8707 , H04N9/831

6. 发明公开

EP0178868A3 Chrominance signal processing apparatus 失效
标题翻译：色相信号处理装置
公开(公告)号：EP0178868A3
公开(公告)日：1988-08-17
申请号：EP85307312
申请日：1985-10-11
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Nakagawa, Yukio , Matsumoto, Tokikazu , Tomita, Masao
IPC分类号： H04N09/79 , H04N09/83
CPC分类号： H04N9/79 , H04N9/7921 , H04N9/831
摘要： A chrominance signal processing apparatus used for such as the color television signal recording and reproducing apparatus (VTR) to record and reproduce a color television signal, comprises means (2,3,26,17,24) for converting a carrier chrominance signal (fsc) to a low-band signal (fc) for recording, and, for reproduction, means (27,16,13) for reconverting the converted low-band signal (fc) to the carrier chrominance signal (fsc) of the original color subcarrier frequency, to thereby record and reproduce the chrominance signal. Means (40, 41, 42, 43) for detecting the burst in the carrier chrominance signal (fsc) necessary for the level adjustment of the chrominance signal or for the control of the conversion frequency or for discrimination of black and white signal under a state of the low-band converted chrominance signal during recording and reproduction, the level detection, phase detection, and synchronous detection in low frequency are made possible. Further, the level detection, phase detection, and synchronous detection are carried out after once demodulating the low-band converted chrominance signal into two color difference signals in the base band to thereby use a part of circuit in common and improve performance. Furthermore, by performing digital sampling demodulation for demodulating the low-band inverted burst into the base band by means of an AID converter and digital circuits, integration of digital LSis, combined used of detection circuits, detection circuits and a part of frequency conversion circuits, realization of any non-linear characteristics and reduction of external parts such as analog filters become possible of the chrominance signal processing apparatus. Accordingly, a small and inexpensive chrominance signal processing apparatus of low consumption power is realized.

7. 发明公开

EP0140716A2 Method and apparatus for reproducing a chrominance signal 失效
标题翻译： Verfahren und Vorrichtung zum Wiedergeben eines Chrominanzsignals。
公开(公告)号：EP0140716A2
公开(公告)日：1985-05-08
申请号：EP84307529.2
申请日：1984-11-01
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Nakagawa, Yukio , Tomita, Masao , Matsumoto, Tokikazu
IPC分类号： H04N9/83
CPC分类号： H04N9/8707 , H04N9/831
摘要： A low-range-converted carrier chrominance signal (C L ) is demodulated (17) and a base-band signal is passed through a holding circuit and a comb filter (18a, 18b) in converting the low-range-converted carrier chrominance signal into a base-band chrominance signal or a carrier chrominance signal having a prescribed subcarrier frequency, for thereby removing an unwanted side band component and a crosstalk from adjacent tracks, which are produced upon demodulation, so that a low-pass or bandpass filter (21) for removing a side band produced by the conversion may be dispensed with or may have less strict characteristics. Furthermore, the carrier chrominance signal is generated by a means (22, 23, 24) for synchronising the low-range-converted chrominance signal (62) in phase with the low-range conversion carrier, sampling (16) the low-range-converted i chrominance signal with a first clock signal (eF c ) having a frequency which is a multiple of that of the low-range conversion carrier, converting the sampled data into two color difference signal sampled data (e, f) and synthesizing the two color difference signal sampled data (e, f) for issuance with a reference clock signal (4Fsc) which is n times the carrier frequency of the carrier chrominance signal. With this arrangement, the number of circuit components required is reduced and the circuit components can easily be made as a a semiconductor device.
摘要翻译：低频变换载波色度信号（CL）被解调（17），并且基带信号通过保持电路和梳状滤波器（18a，18b），以将低范围转换的载波色度信号转换成具有规定副载波频率的基带色度信号或载波色度信号，从而去除在解调时产生的不需要的边带分量和来自相邻轨道的串扰，使得低通或带通滤波器（21）用于去除由转换产生的边带可以省去或可能具有较不严格的特性。此外，载波色度信号由用于使低范围转换的色度信号（62）与低范围转换载波相位同步的装置（22,23,24）产生，采样（16）低范围转换色度信号将具有频率为低倍范围转换载波倍数的频率的第一时钟信号（eFc）转换成色度信号，将采样数据转换成两个色差信号采样数据（e，f），并合成两个色差信号采样数据（e，f），用于发出与载波色度信号的载波频率的n倍的参考时钟信号（4Fsc）。利用这种布置，减少了所需的电路部件的数量，并且可以容易地将电路部件制成半导体器件。

8. 发明授权

EP0164274B1 Chrominance signal processing system 失效
标题翻译：色度信号处理系统
公开(公告)号：EP0164274B1
公开(公告)日：1991-01-30
申请号：EP85304060.8
申请日：1985-06-07
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Matsumoto, Tokikazu , Nakagawa, Yukio , Uchiyama, Shinich
IPC分类号： H04N9/68
CPC分类号： H04N9/793 , H04N9/68 , H04N9/7904

9. 发明公开

EP0197767A3 Video signal processing apparatus 失效
标题翻译：视频信号处理设备
公开(公告)号：EP0197767A3
公开(公告)日：1988-07-27
申请号：EP86302468
申请日：1986-04-03
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Matsumoto, Tokikazu , Nakagawa, Yukio , Honjo, Masahiro
IPC分类号： H04N05/91
CPC分类号： H04N9/646 , H04N5/911
摘要： A video signal processing apparatus incorporates a 1 H or 2H (H: horizontal synchronization period) delay circuit (3). The output of the delay circuit (3) is fed back to the input thereof so as to average the noise, thus raising the signal S/N ratio. The feedback line includes a nonlinear processing circuit (8) with a small gain when the signal input has a low vertical correlation, whereby the signal S/N ratio is improved without causing delay of the colour signal in the vertical direction nor deterioration of resolution of the luminance signal.
摘要翻译：视频信号处理装置包含1H或2H（H：水平同步周期）延迟电路（3）。延迟电路（3）的输出反馈到其输入端，以平均噪声，从而提高信号S / N比。反馈线包括当信号输入具有低垂直相关性时具有小增益的非线性处理电路（8），由此提高信号S / N比而不导致垂直方向上的彩色信号的延迟，亮度信号。

10. 发明公开

EP0164274A3 Chrominance signal processing system 失效
标题翻译：色度信号处理系统
公开(公告)号：EP0164274A3
公开(公告)日：1987-01-28
申请号：EP85304060
申请日：1985-06-07
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Matsumoto, Tokikazu , Nakagawa, Yukio , Uchiyama, Shinich
IPC分类号： H04N09/68
CPC分类号： H04N9/793 , H04N9/68 , H04N9/7904
摘要： A digital chrominance signal processing system comprises a variable gain amplifier (11) for gain control of a carrier chrominance signal; an A/D converter (12) for effecting analogue/digital conversion of the output of said variable gain amplifier; a demodulator (13) for demodulating the output of said A/D converter into two chrominance difference signals (R-Y, B-Y); a computing circuit (15) for computing the amplitude of the burst signal of said carrier chrominance signal from said two chrominance signals; and a control circuit (21) for producing a signal for controlling the gain of said variable gain amplifier by the output of said computing circuit, whereby the gain control is prevented from erroneous operation even when the demodulating axis of the demodulator is not in agreement with the burst phase.

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