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1. 发明公开

EP1286552A1 PIXEL CALCULATING DEVICE 审中-公开
标题翻译： PIXELBERECHNUNGSEINRICHTUNG
公开(公告)号：EP1286552A1
公开(公告)日：2003-02-26
申请号：EP01922020.1
申请日：2001-04-23
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： MORISHITA, Hiroyuki , YOSHIOKA, Kosuke , NISHIDA, Hideshi , HIRAI, Makoto , MATSUURA, Ryuji , TSUJI, Toshiaki , KIMARA, kozo , KIYOHARA, Tokuzo
IPC分类号： H04N7/68
CPC分类号： H04N19/80 , G06T3/4007 , G06T3/4023 , G06T5/20 , G06T2200/28
摘要： A pixel calculating device that performs vertical filtering on pixel data in order to reduce frame data in a vertical direction. The pixel calculating device includes a decoding unit 401 for decoding compressed video data to produce frame data, frame memory 402 for storing the frame data, a filtering unit 403 for reducing the frame data in a vertical direction by means of the vertical filtering to produce a reduced image, buffer memory 404 for storing the reduced image outputted from filtering unit 403, and a control unit 406 for controlling filtering unit 403 based on a decoding state of the video data by decoding unit 401 and a filtering state of the frame data by filtering unit 403, so that overrun and underrun do not occur in filtering unit 403.

2. 发明授权

EP0859524B1 IMAGE DECODER AND IMAGE MEMORY OVERCOMING VARIOUS KINDS OF DELAYING FACTORS CAUSED BY HARDWARE SPECIFICATIONS SPECIFIC TO IMAGE MEMORY BY IMPROVING STORING SYSTEM AND READING-OUT SYSTEM 失效
标题翻译： BY提高存储与选择系统造成的延误图像存储特定的硬件规格不同类型因素，关于风ENDER图像解码器和图像存储
公开(公告)号：EP0859524B1
公开(公告)日：2007-06-27
申请号：EP97937819.7
申请日：1997-08-28
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD
发明人： YOSHIOKA, Kosuke , HIRAI, Makoto , KIYOHARA, Tokuzo , KIMURA, Kozo
IPC分类号： H04N11/04 , H04N9/808 , H04N7/24 , H04N7/50 , H04N7/36
CPC分类号： H04N5/907 , H04N9/64 , H04N19/42 , H04N19/423 , H04N19/61
摘要： An image decoder provided with an image memory in which images of one screen are stored by dividing the images into a plurality of picture element blocks each composed of (m) horizontal picture elements and (n) vertical picture elements. The image memory has matrix-like storing areas in which (s by t) first color difference components constituting one picture element block and (s by t) second color difference components constituting the same picture element block are stored in serial areas from a leading area specified by a certain row address and a first column address to a trailing area specified by the said row address and a second column address, and (m by n) luminance components constituting the same picture element block are stored in serial areas from another leading area specified by another certain row address and a third column address to a trailing area specified by the said row address and a fourth column address.

3. 发明公开

EP1667028A1 CACHE MEMORY AND CACHE MEMORY CONTROL METHOD 审中-公开
标题翻译： CACHE-SPEICHER UND CACHE-SPEICHER-STEUERVERFAHREN
公开(公告)号：EP1667028A1
公开(公告)日：2006-06-07
申请号：EP04772377.0
申请日：2004-08-23
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： TANAKA, Tetsuya , NAKANISHI, Ryuta , KIYOHARA, Tokuzo , MORISHITA, Hiroyuki , CHIKAMURA, Keishi
IPC分类号： G06F12/12 , G06F12/08
CPC分类号： G06F12/127 , G06F12/124
摘要： A cache memory of the present invention includes: for each cache entry, way 0 to way 3 which hold use flags U indicating whether or not the use flags U have been accessed; and a control unit which: updates, when a cache entry is hit, a use flag U corresponding to the hit cache entry so that the use flag U indicates that the cache entry has been accessed; and reset, in the case where all other use flags in the same set indicates that the cache entries have been accessed herein, the all other use flags so that the use flags indicate that the cache entries have not been accessed; and select a cache entry to be replaced from among the cache entries corresponding to the use flags indicating that the cache entries have not been accessed.
摘要翻译：本发明的高速缓冲存储器包括：对于每个高速缓存条目，方式0到路径3，其保持使用标志U，指示是否已经访问了使用标志U; 以及控制单元，其在高速缓存条目被命中时更新与所述命中高速缓存条目对应的使用标志U，使得所述使用标志U指示所述高速缓存条目已经被访问; 并且在同一集合中的所有其他使用标志指示已经在这里访问了高速缓存条目的情况下，复位所有其他使用标志，使得使用标志指示高速缓存条目未被访问; 并且从与指示高速缓存条目未被访问的使用标志相对应的高速缓存条目中选择要替换的高速缓存条目。

4. 发明公开

EP1292152A1 IMAGE PROCESSING APPARATUS, AND IMAGE PROCESSING METHOD 有权
标题翻译：图像处理装置和图像处理方法
公开(公告)号：EP1292152A1
公开(公告)日：2003-03-12
申请号：EP01934474.6
申请日：2001-05-31
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： TANAKA, Takaharu , NISHIDA, Hideshi , YOSHIOKA, Kosuke , KIYOHARA, Tokuzo
IPC分类号： H04N7/30
CPC分类号： H03M7/40 , H04N19/129 , H04N19/132 , H04N19/18 , H04N19/42 , H04N19/60
摘要： The speed of decoding processing for variable-length coded image data is improved. The image processor includes a variable-length decoding unit for variable-length decoding input data and outputting a pair of the run length of zero coefficients and a non-zero coefficient; an inverse quantization unit for subjecting the non-zero coefficient to inverse quantization and obtaining inverse quantized data to be output; an address setting unit for carrying out inverse scanning, obtaining an address for storing the inverse quantized data on the basis of the run length of zero coefficients and specifying the address in the data storage unit; a write information storage unit for setting a write flag in an address thereof corresponding to the specified address; and a data reading unit for reading data from the data storage unit, and on the basis of information stored in the write information storage unit, directly outputting data from the address specified by the address setting unit while substituting a predetermined value for data from an address other than the specified address to output the substituted value.
摘要翻译：可变长度编码图像数据的解码处理的速度得到改善。图像处理器包括：可变长度解码单元，用于对输入数据进行可变长度解码并输出一对游程长度为零的系数和非零系数; 逆量化单元，用于对非零系数进行逆量化并获得要输出的逆量化数据; 地址设定单元，用于执行逆扫描;基于零系数的游程长度获得用于存储逆量化数据的地址，并指定数据存储单元中的地址; 写入信息存储单元，用于在其对应于所述指定地址的地址中设置写入标记; 以及数据读取单元，用于从数据存储单元读取数据，并且基于存储在写入信息存储单元中的信息，从地址设置单元指定的地址直接输出数据，同时用预定值替换来自地址的数据而不是指定的地址来输出替代值。

5. 发明公开

EP1278157A1 PIXEL CALCULATING DEVICE 审中-公开
标题翻译： DEVICE像素计算
公开(公告)号：EP1278157A1
公开(公告)日：2003-01-22
申请号：EP01938474.2
申请日：2001-04-23
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： OKA, Hiroyuki , NISHIDA, Hideshi , YOSHIOKA, Kosuke , KIYOHARA, Tokuzo , HIRAI, Makoto , KIMURA, Kozo , MATSUURA, Ryuji , MORISHITA, Hiroyuki , TSUJI, Toshiaki
IPC分类号： G06T1/20 , G06T3/40 , G06T5/20 , H04N5/262 , H04N7/36
CPC分类号： H04N19/80 , G06T1/20 , G06T5/20
摘要： A pixel calculating device for performing vertical filtering that includes 16 pixel processing units 1 to 16 and an input buffer group 22 storing 16 pieces of pixel data and filter coefficients. Each of the pixel processing units performs operations using the pixel data and a filter coefficient supplied from input buffer group 22, and then acquires pixel data from an adjacent pixel processing unit. Further operations are performed by each of the pixel processing units using the acquired pixel data and operation results are accumulated. Filtering is carried out through a repetition of this acquiring and accumulation process, the number of taps being determined by the number of repetitions.

6. 发明公开

EP0859524A1 IMAGE DECODER AND IMAGE MEMORY OVERCOMING VARIOUS KINDS OF DELAYING FACTORS CAUSED BY HARDWARE SPECIFICATIONS SPECIFIC TO IMAGE MEMORY BY IMPROVING STORING SYSTEM AND READING-OUT SYSTEM 失效
标题翻译： BY提高存储与选择系统造成的延误图像存储特定的硬件规格不同类型因素，关于风ENDER图像解码器和图像存储
公开(公告)号：EP0859524A1
公开(公告)日：1998-08-19
申请号：EP97937819.7
申请日：1997-08-28
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： YOSHIOKA, Kosuke , HIRAI, Makoto , KIYOHARA, Tokuzo , KIMURA, Kozo
IPC分类号： H04N11/04 , H04N9/808 , H04N7/24
CPC分类号： H04N5/907 , H04N9/64 , H04N19/42 , H04N19/423 , H04N19/61
摘要： An image memory stores a one-screen image by dividing the one-screen image into a plurality of image blocks which are each m pixels wide by n pixels high. The image memory has an array-like storage region storing s*t first chrominance components that compose one image block and s*t second chrominance components that compose the same image block in serial areas between a start area specified by a row address and a first column address and an end area specified by the same row address and a second column address (see Fig. 10). The storage region also stores m*n luminance components that compose the same image block in serial areas between a different start area specified by a different row address and a third column address and an end area are specified by the different row address and a fourth column address.
摘要翻译：图像存储器通过划分一个屏幕图像划分成图像块，它们分别m象素×纵n象素的多个店铺的一屏幕图像。图像存储器具有阵列状的存储区域，用于存储S * t个第一色差分量并构成一个图像块和s * t个第二色差分量做构成由行地址和第一指定一个开始区之间以串行区域相同的图像块列地址并通过相同的行地址和第二列地址指定的端部区域（参照图10）。因此，该存储区存储m * n个亮度分量做构成由不同的行地址指定的一个不同的开始区域和第三列地址和结束区域由不同的行地址被指定和第四列之间的连续区相同的图像块地址。

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