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1. 发明公开

EP1709518A1 VOLTAGE REGULATOR CIRCUIT ARRANGEMENT 审中-公开
标题翻译：稳压电路
公开(公告)号：EP1709518A1
公开(公告)日：2006-10-11
申请号：EP05702621.3
申请日：2005-01-10
申请人： Koninklijke Philips Electronics N.V.
发明人： BOOMKAMP, Aloysius, J., M. , VOSS, Harm, G., J. , BUTSELAAR, Stefan, G., E. , DE HAAS, Clemens, G., J. , BOLLEN, Gerrit, J. , VISSER, Ruurd, A.
IPC分类号： G06F1/26 , G05F1/46 , H01L21/82
CPC分类号： G06F1/26
摘要： The invention relates to a voltage regulator circuit arrangement comprising a voltage regulator for generating an output voltage in dependence of a reference signal, characterized in that a reference signal generation circuit is provided for generating said reference signal comprising a plurality of inputs connected to internal terminals, whereby a sub-set of said plurality internal terminals is connected to an external terminal.

2. 发明公开

EP1709741A1 MOS SWITCHING CIRCUIT 有权
标题翻译： MOS开关网络
公开(公告)号：EP1709741A1
公开(公告)日：2006-10-11
申请号：EP04806641.9
申请日：2004-12-30
申请人： Koninklijke Philips Electronics N.V.
发明人： DE HAAS, Clemens, G., J.
IPC分类号： H03K17/687
CPC分类号： H03K17/063 , H03K17/6872
摘要： An electronic circuit has a signal conductor (11), a power supply reference conductor (10) connected by a switching circuit. The switching circuit contains a PMOS transistor (17) and an NMOS transistor realized on a common substrate (100). The NMOS transistor (17) has a source coupled to the power supply reference conductor (10). The NMOS transistor (18) has a source coupled to the drain of the PMOS transistor (17), and a drain coupled to the signal conductor (11). A control circuit (13, 14, 15, 16) switches . between an 'on' state and an 'off 'state, in which the control circuit (13, 14, 15, 16) controls the gate source voltages of the first and second MOS transistor (17, 18) to make channels of these MOS transistors (17, 18) conductive and not to make the channels of these first and second transistors (17, 18) conductive respectively. Preferably a complementary switching circuit is also provided. The complementary switching circuit uses opposite polarity voltage differences, an NMOS transistor (27) coupled to a second power supply and a PMOS transistor (28) coupled to a signal conductor. The on resistances of the switching circuits are matched by matching the NMOS gate-source voltages, as well as the PMOS gate source voltages.

3. 发明公开

EP1537663A2 TRANSITION DETECTION AT INPUT OF INTEGRATED CIRCUIT DEVICE 审中-公开
标题翻译：跳变检测接收到一个集成电路的
公开(公告)号：EP1537663A2
公开(公告)日：2005-06-08
申请号：EP03741017.2
申请日：2003-07-22
申请人： Koninklijke Philips Electronics N.V.
发明人： DE HAAS, Clemens, G., J. , KWAKERNAAT, Cecilius, G. , BUTSELAAR, Stefan, G., E.
IPC分类号： H03K5/1252 , G06F1/24
CPC分类号： G06F1/24 , H03K5/04 , H03K5/08 , H03K5/1252
摘要： An integrated circuit has an input connection for connecting an external signal conductor that passes signals to execute functions in the device. The external signal conductor can pick up strong interfering signals with high frequency content, for example when the device is used in a car. To protect against unintended execution of functions the device contains a timer circuit comprising a capacitance and a current supplying circuit coupled to an integration node. A discharge diode is coupled between the input connection and the integration node, with a polarity such that the discharge diode, when in forward bias, is capable of draining current from the current supplying circuit. A detector is coupled to the integration node for generating a signal to be supplied to the integrated circuit device to respond to a signal transition on the conductor. The diode serves to reset integration on the integration node before the detector detects the transition in case of short pulses. By using a diode instead of a switching transistor the circuit is more robust against the effect of interfering pulses.

4. 发明公开

EP1402694A2 LINE DRIVER WITH CURRENT SOURCE OUTPUT AND HIGH IMMUNITY TO RF SIGNALS 审中-公开
标题翻译：与动力源输出和高免疫抗HF信号LINE DRIVER
公开(公告)号：EP1402694A2
公开(公告)日：2004-03-31
申请号：EP02712151.6
申请日：2002-02-18
申请人： Koninklijke Philips Electronics N.V.
发明人： DE HAAS, Clemens, G., J. , BOEZEN, Hendrik , BOOMKAMP, Aloysius, J., M. , BOLLEN, Gerrit, J. , VAN DEN HEUVEL, Abraham, K. , VISSER, Ruurd, A.
IPC分类号： H04L25/02
CPC分类号： H04L25/028
摘要： Line driver for a LIN-bus. The line driver has a current source output transistor (T1) for pulling down the LIN-bus wire (LB) to ground (GND). The LIN-bus wire (LB) is connected to a positive supply voltage (VBAT) through a pull-up resistor (R1). The output transistor (T1) is driven by a driver stage (DRV) in response to an input current (J1) at an input node (X). The driver stage has a further resistor (R2) connected between the gate of the output transistor (T1) and a reference terminal (GND), a reference transistor (T2) which has its source connected to the reference terminal (GND) and its drain coupled to the input node (X); the gates of the output transistor (T1) and the reference transistor (T2) are connected to an output (DAO1) of a differential amplifier (DA1) which has an inverting input (DAN1) coupled to a bias voltage source (E2) and a non-inverting input (DAP1) coupled to the input node (X). The further resistor (R2) stage provides a low-impedance path to ground for RF disturbances reaching the gate of the output transistor (T1) through the drain-gate capacitance of the output transistor (T1) and prevents these disturbances from penetrating the driver stage.

5. 发明公开

EP1371199A2 LINE DRIVER WITH SLEW-RATE CONTROL 审中-公开
标题翻译：与对照转换速率LINE DRIVER
公开(公告)号：EP1371199A2
公开(公告)日：2003-12-17
申请号：EP02711162.4
申请日：2002-02-18
申请人： Koninklijke Philips Electronics N.V.
发明人： DE HAAS, Clemens, G., J. , BOEZEN, Hendrik , BOOMKAMP, Aloysius, J., M. , BOLLEN, Gerrit, J. , VAN DEN HEUVEL, Abraham, K. , VISSER, Ruurd, A.
IPC分类号： H04L25/00
CPC分类号： H04L25/028
摘要： A line driver for a LIN-bus. The line driver has a current source output transistor (T1) for pulling down the LIN-bus wire (LB) to ground (GND). The LIN-bus wire (LB) is connected to a positive supply voltage (VBAT) through a pull-up resistor (R1). The output transistor (T1) provides a ramp shaped output current, under control of a ramp generator (RG). The output current, in combination with the pull-up resistor (R1), imposes a ramp-shaped output voltage on of the pull-up resistor may vary between 500 Ohm and 1 kOhm. When the resistance is 1 kOhm, the output voltage is clamped to signal ground (GND) and a delay occurs between the edge in the data signal (TXD) and the corresponding rising ramp in the output voltage. This delay is reduced by a comparator (CMP, T2) which monitors the output voltage and which increases the slew rate of the ramp generator (RG) when the output voltage is clamped and drops below a certain threshold.

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