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    • 1. 发明公开
    • Digital image processor
    • 数字图像处理器
    • EP0802672A3
    • 1999-11-03
    • EP97106181.7
    • 1997-04-15
    • KABUSHIKI KAISHA TOSHIBA
    • Matsugami, ToshikiMiyazaki, Toru
    • H04N5/445
    • G09G5/14G09G5/395G09G2340/125H04N5/44504H04N5/45H04N9/641
    • Pattern data is generated in accordance with horizontal and vertical synchronizing components of a video signal. The pattern data and the video signal are stored in a memory (37). The video signal is written in an effective image period, while pattern data is written in other periods. Write and read addresses for the memory are generated in accordance with the horizontal and vertical synchronizing components of the video signal. Thus, pattern data is written over the video signal corresponding to the position at which display is required. Whether the output read from the memory is a video signal or pattern data is discriminated by a signal discrimination circuit (33) in accordance with the read address. Pattern data and the video signal are individually signal-processed. In accordance with a result of the discrimination performed by the signal discrimination circuit, the output from a pattern data processor and the output from a video signal processor are switched and displayed by a monitor.
    • 模式数据根据视频信号的水平和垂直同步分量生成。 图案数据和视频信号被存储在存储器(37)中。 视频信号在有效图像期间写入,而图形数据在其他期间写入。 根据视频信号的水平和垂直同步分量生成存储器的写入和读取地址。 因此,图案数据被写在对应于需要显示的位置的视频信号上。 根据读地址,从存储器读出的输出是视频信号还是图形数据由信号鉴别电路(33)鉴别。 模式数据和视频信号分别进行信号处理。 根据信号鉴别电路的鉴别结果,图形数据处理器的输出和视频信号处理器的输出由监视器切换和显示。
    • 2. 发明公开
    • Digital image processor
    • 数位器Bildprozessor
    • EP0802672A2
    • 1997-10-22
    • EP97106181.7
    • 1997-04-15
    • KABUSHIKI KAISHA TOSHIBA
    • Matsugami, ToshikiMiyazaki, Toru
    • H04N5/445
    • G09G5/14G09G5/395G09G2340/125H04N5/44504H04N5/45H04N9/641
    • Pattern data is generated in accordance with horizontal and vertical synchronizing components of a video signal. The pattern data and the video signal are stored in a memory (37). The video signal is written in an effective image period, while pattern data is written in other periods. Write and read addresses for the memory are generated in accordance with the horizontal and vertical synchronizing components of the video signal. Thus, pattern data is written over the video signal corresponding to the position at which display is required. Whether the output read from the memory is a video signal or pattern data is discriminated by a signal discrimination circuit (33) in accordance with the read address. Pattern data and the video signal are individually signal-processed. In accordance with a result of the discrimination performed by the signal discrimination circuit, the output from a pattern data processor and the output from a video signal processor are switched and displayed by a monitor.
    • 根据视频信号的水平和垂直同步分量产生图形数据。 图案数据和视频信号被存储在存储器(37)中。 视频信号被写入有效图像周期,而图形数据被写入其他周期。 根据视频信号的水平和垂直同步分量产生存储器的写和读地址。 因此,图形数据被写在与需要显示的位置相对应的视频信号上。 根据读取的地址,由信号鉴别电路(33)判别从存储器读出的输出是视频信号还是图形数据。 模式数据和视频信号被单独进行信号处理。 根据由信号识别电路进行的鉴别的结果,来自图案数据处理器的输出和来自视频信号处理器的输出由监视器切换和显示。