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    • 2. 发明公开
    • Stress modulated group iii-v semiconductor device and related method
    • 压力模型Gruppe III-V-Halbleitervorrichtung undzugehörigesVerfahren
    • EP2469583A2
    • 2012-06-27
    • EP11189846.6
    • 2011-11-18
    • International Rectifier Corporation
    • Chandolu, AnilkumarBirkhahn, Ronald H.Larsen, TroyHughes, BrettHoff, SteveNelson, ScottBrown, RobertSass, Leanne
    • H01L21/335H01L29/778H01L29/20
    • H01L29/7787H01L29/2003H01L29/205H01L29/66431
    • According to one embodiment, a group III-V semiconductor device comprises a compositionally graded body disposed over a substrate and below a buffer layer supporting an active area of the group III-V semiconductor device. The compositionally graded body includes a first region applying compressive stress to the substrate. The compositionally graded body further includes a stress modulating region over the first region, where the stress modulating region applies tensile stress to the substrate. In one embodiment, a method for fabricating a group III-V semiconductor device comprises providing a substrate for the group III-V semiconductor device and forming a first region of a compositionally graded body over the substrate to apply compressive stress to the substrate. The method further comprises forming a stress modulating region of the compositionally graded body over the first region, where the stress modulating region applies tensile stress to the substrate.
    • 根据一个实施例,III-V族半导体器件包括设置在衬底上并且在支撑III-V族III族半导体器件的有源区的缓冲层之下的组成分级体。 组成分级的主体包括向衬底施加压应力的第一区域。 组成渐变体还包括在第一区域上的应力调节区域,其中应力调节区域向基板施加拉伸应力。 在一个实施例中,一种用于制造III-V族半导体器件的方法包括:为III-V族半导体器件提供衬底,并在衬底上形成组成分级体的第一区域,以向衬底施加压应力。 所述方法还包括在所述第一区域上形成所述组成梯度体的应力调制区域,其中所述应力调制区域向所述衬底施加拉伸应力。