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1. 发明公开

EP0098111A2 Vertical IGFET device and method for fabricating same 有权转让
标题翻译： Vertikaler Feldeffekttransistor mit isoliertem门和Verfahren zu desser Herstellung。
公开(公告)号：EP0098111A2
公开(公告)日：1984-01-11
申请号：EP83303637.9
申请日：1983-06-23
申请人： Harris Semiconductor Patents, Inc.
发明人： Jastrzebski, Lubomir Leon , Kokkas, Achilles George , Ipri, Alfred Charles
IPC分类号： H01L21/28 , H01L29/60 , H01L29/78
CPC分类号： H01L29/7827 , H01L21/02381 , H01L21/02532 , H01L21/02639 , H01L21/28273 , H01L27/0688 , H01L27/1104 , H01L29/4236
摘要： A vertical IGFET device is formed on a substrate (10) which includes a monocrystalline semiconductor portion at a surface (12) thereof. An apertured insulated gate (26) is disposed on the surface (12) of the substrate (10) such that an area (30) of monocrystalline semiconductor material is exposed through the aperture (28). An epitaxial semiconductor region (32) extends from the surface (12) of the substrate (10) within the aperture (28) of the gate (26) and is appropriately doped such that a predetermined voltage applied to the insulated gate (26) forms a channel region in the epitaxial region (32) adjacent thereto. The vertical IGFET device is fabricated by a self-aligned technique, wherein the insulated gate (26) includes a first, underlying insulating layer (14) and a second, overlying insulating layer (24). The second insulating layer (24) protects the insulated gate (26) when the first insulating layer (14) is defined. The present invention also comprises an integrated device (110) which incorporates a plurality of interconnected vertical IGFETs on a surface (114) of a substrate (112) includes a monocrystalline semiconductor region (126) extending from an area of the surface (114) of the substrate (112). A plurality of insulated gates (116, 134, 136 and 138), which can be selectively biased, are disposed such that each is contiguous with a segment of the monocrystalline semiconductor region (126). A predetermined voltage applied to a particular insulated gate (116,134,136 and 138) will create an inversion channel in the segment of the monocrystalline semiconductor region (126) contiguous therewith.
摘要翻译：垂直IGFET器件形成在其表面（12）上包括单晶半导体部分的衬底（10）上。多孔绝缘栅极（26）设置在衬底（10）的表面（12）上，使得单晶半导体材料的区域（30）通过孔径（28）暴露。外延半导体区域（32）从栅极（26）的孔（28）内的衬底（10）的表面（12）延伸并被适当地掺杂，使得施加到绝缘栅极（26）的预定电压形成在与其相邻的外延区域（32）中的沟道区域。垂直IGFET器件通过自对准技术制造，其中绝缘栅极（26）包括第一下层绝缘层（14）和第二覆盖绝缘层（24）。当限定第一绝缘层（14）时，第二绝缘层（24）保护绝缘栅极（26）。本发明还包括在衬底（112）的表面（114）上并入多个互连的垂直IGFET的集成器件（110），包括从表面（114）的区域（114）延伸的单晶半导体区域基板（112）。可以选择性地偏置的多个绝缘栅极（116,134,136和138）被布置成使得每个绝缘栅极与单晶半导体区域（126）的一段相邻。施加到特定绝缘栅极（116,134,136和138）的预定电压将在与其相邻的单晶半导体区域（126）的段中产生反转通道。

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