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1. 发明公开

EP2246859A1 Semiconductor memory device, and method of controlling the same 有权
标题翻译： Halbleiterspeicher und Steuerverfahrendafür
公开(公告)号：EP2246859A1
公开(公告)日：2010-11-03
申请号：EP10165897.9
申请日：2000-09-27
申请人： Fujitsu Semiconductor Limited
发明人： Fujioka, Shinya , Kawakubo, Tomohiro , Nishimura, Koichi , Sato, Kotoku
IPC分类号： G11C11/406 , G11C5/14
CPC分类号： G11C5/14 , G11C5/147 , G11C11/406 , G11C2207/2227
摘要： A semiconductor memory device comprises an internal voltage generator (18) which, when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator (18) consumes a predetermined amount of the power. In response to a control signal from the exterior, an entry circuit (14) inactivates the internal voltage generator (18). When the internal voltage generator (18) is inactivated, the internal voltage is not generated, thereby reducing the power consumption. By the control signal from the exterior, therefore, a chip can easily enter a low power consumption mode. The internal voltage generator (18) is exemplified by a booster (28) for generating the boost voltage of a word line connected with memory cells, a substrate voltage generator (34) for generating a substrate voltage, or a precharging voltage generator (30) for generating the precharging voltage of bit lines to be connected with the memory cells. During the low power consumption mode, an external voltage supplying circuit supplies a power supply voltage supplied from the exterior as the internal voltage to a predetermined internal circuit. Even when the internal voltage generator (18) is inactivated, therefore, the power supply voltage is supplied to the power supply terminal of each internal circuit, which results in preventing a leak path.
摘要翻译：半导体存储器件包括内部电压发生器（18），其在被激活时产生将被提供给内部电路的内部电压。操作内部电压发生器（18）消耗预定量的功率。响应于来自外部的控制信号，入口电路（14）使内部电压发生器（18）失活。当内部电压发生器（18）失活时，不产生内部电压，从而降低功耗。因此，通过来自外部的控制信号，芯片可以容易地进入低功耗模式。内部电压发生器（18）例如是用于产生与存储单元连接的字线的升压电压的升压器（28），用于产生衬底电压的衬底电压发生器（34）或预充电电压发生器（30）用于产生要与存储器单元连接的位线的预充电电压。在低功耗模式期间，外部电压供给电路将从外部供给的电源电压作为内部电压供给到规定的内部电路。因此，即使当内部电压发生器（18）失活时，电源电压被提供给每个内部电路的电源端子，这导致防止泄漏路径。

2. 发明授权

EP2237281B1 Semiconductor memory device, and method of controlling the same 有权
标题翻译：它们的一种半导体存储器件及其控制方法
公开(公告)号：EP2237281B1
公开(公告)日：2013-07-17
申请号：EP10165898.7
申请日：2000-09-27
申请人： Fujitsu Semiconductor Limited
发明人： Fujijoka, Shinya , Kawakubo, Tomohiro , Nishimura, Koichi , Sato, Kotoku
IPC分类号： G11C11/406 , G11C5/14 , G11C14/00
CPC分类号： G11C5/14 , G11C5/147 , G11C11/406 , G11C2207/2227

3. 发明公开

EP2267723A1 Semiconductor memory device and method of controlling the same 有权
标题翻译：半导体存储器件及其控制方法
公开(公告)号：EP2267723A1
公开(公告)日：2010-12-29
申请号：EP10177225.9
申请日：2000-09-27
申请人： Fujitsu Semiconductor Limited
发明人： Fujioka, Shinya , Kawakubo, Tomohiro , Nishimura, Koichi , Sato, Kotoku
IPC分类号： G11C11/406
CPC分类号： G11C5/14 , G11C5/147 , G11C11/406 , G11C2207/2227
摘要： A semiconductor device is disclosed which comprises a first memory and a second memory. The first memory includes dynamic memory cells and has a low power consumption mode in which the dynamic memory cells do not retain data therein by prohibiting refresh operations. The first memory also has a data terminal. The second memory includes flash memory cells and has a data terminal which is connected with the data terminal of the first memory. The first memory enters the low power consumption mode in response to an external control signal received at an external terminal and continuously receives a power supply voltage during the low power consumption mode. The first memory also has a function invalidating the low power consumption mode.
摘要翻译：公开了一种半导体器件，其包括第一存储器和第二存储器。第一存储器包括动态存储单元并且具有低功耗模式，其中动态存储单元通过禁止刷新操作而不在其中保留数据。第一个存储器也有一个数据终端。第二存储器包括闪存单元并且具有与第一存储器的数据端子连接的数据端子。响应于在外部端子处接收的外部控制信号，第一存储器进入低功耗模式，并且在低功耗模式期间连续地接收电源电压。第一个存储器还具有使低功耗模式无效的功能。

4. 发明授权

EP2237281B8 Semiconductor memory device, and method of controlling the same 有权
公开(公告)号：EP2237281B8
公开(公告)日：2013-10-23
申请号：EP10165898.7
申请日：2000-09-27
申请人： Fujitsu Semiconductor Limited
发明人： Fujioka, Shinya , Kawakubo, Tomohiro , Nishimura, Koichi , Sato, Kotoku
IPC分类号： G11C11/406 , G11C5/14 , G11C14/00
CPC分类号： G11C5/14 , G11C5/147 , G11C11/406 , G11C2207/2227

5. 发明授权

EP2246859B1 Semiconductor memory device, and method of controlling the same 有权
标题翻译：半导体存储器及其控制方法
公开(公告)号：EP2246859B1
公开(公告)日：2013-10-09
申请号：EP10165897.9
申请日：2000-09-27
申请人： Fujitsu Semiconductor Limited
发明人： Fujioka, Shinya , Kawakubo, Tomohiro , Nishimura, Koichi , Sato, Kotoku
IPC分类号： G11C11/406 , G11C5/14
CPC分类号： G11C5/14 , G11C5/147 , G11C11/406 , G11C2207/2227

6. 发明授权

EP2267723B1 Semiconductor memory device and method of controlling the same 有权
标题翻译：它们的一种半导体存储器件及其控制方法
公开(公告)号：EP2267723B1
公开(公告)日：2014-06-04
申请号：EP10177225.9
申请日：2000-09-27
申请人： Fujitsu Semiconductor Limited
发明人： Fujioka, Shinya , Kawakubo, Tomohiro , Nishimura, Koichi , Sato, Kotoku
IPC分类号： G11C11/406 , G11C5/14 , G11C14/00
CPC分类号： G11C5/14 , G11C5/147 , G11C11/406 , G11C2207/2227

7. 发明公开

EP2237281A1 Semiconductor memory device, and method of controlling the same 有权
标题翻译： Halbleiterspeichervorrichtung und Steuerverfahrendafür
公开(公告)号：EP2237281A1
公开(公告)日：2010-10-06
申请号：EP10165898.7
申请日：2000-09-27
申请人： Fujitsu Semiconductor Limited
发明人： Fujijoka, Shinya , Kawakubo, Tomohiro , Nishimura, Koichi , Sato, Kotoku
IPC分类号： G11C11/406 , G11C5/14
CPC分类号： G11C5/14 , G11C5/147 , G11C11/406 , G11C2207/2227
摘要： A semiconductor memory device comprises an internal voltage generator (18) which, when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator (18) consumes a predetermined amount of the power. In response to a control signal from the exterior, an entry circuit (14) inactivates the internal voltage generator (18). When the internal voltage generator (18) is inactivated, the internal voltage is not generated, thereby reducing the power consumption. By the control signal from the exterior, therefore, a chip can easily enter a low power consumption mode. The internal voltage generator (18) is exemplified by a booster (28) for generating the boost voltage of a word line connected with memory cells, a substrate voltage generator (34) for generating a substrate voltage, or a precharging voltage generator (30) for generating the precharging voltage of bit lines to be connected with the memory cells. During the low power consumption mode, an external voltage supplying circuit supplies a power supply voltage supplied from the exterior as the internal voltage to a predetermined internal circuit. Even when the internal voltage generator (18) is inactivated, therefore, the power supply voltage is supplied to the power supply terminal of each internal circuit, which results in preventing a leak path.
摘要翻译：半导体存储器件包括内部电压发生器（18），其在被激活时产生将被提供给内部电路的内部电压。操作内部电压发生器（18）消耗预定量的功率。响应于来自外部的控制信号，入口电路（14）使内部电压发生器（18）失活。当内部电压发生器（18）失活时，不产生内部电压，从而降低功耗。因此，通过来自外部的控制信号，芯片可以容易地进入低功耗模式。内部电压发生器（18）例如是用于产生与存储单元连接的字线的升压电压的升压器（28），用于产生衬底电压的衬底电压发生器（34）或预充电电压发生器（30）用于产生要与存储器单元连接的位线的预充电电压。在低功耗模式期间，外部电压供给电路将从外部供给的电源电压作为内部电压供给到规定的内部电路。因此，即使当内部电压发生器（18）失活时，电源电压被提供给每个内部电路的电源端子，这导致防止泄漏路径。

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