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1. 发明公开

EP0454445A2 Waveform equalizer using a neural network 失效
标题翻译： Wellenformentzerrer mit Neuronalnetzwerk。
公开(公告)号：EP0454445A2
公开(公告)日：1991-10-30
申请号：EP91303700.8
申请日：1991-04-24
申请人： FUJITSU LIMITED
发明人： Kimoto, Takashi , Kawabata, Kazuo , Asakawa, Kazuo , Ohishi, Yasuyuki , Fukuda, Eisuke , Takano, Takeshi
IPC分类号： H04L25/03
CPC分类号： H04L25/03165 , G06N3/04 , H04L2025/03464
摘要： A waveform equalizer for equalizing a distorted signal, contains a sampling unit (10), a time series generating unit (21), and an equalization neural network unit (22). The sampling unit (10) samples the level of a distorted signal at a predetermined rate. The time series generating unit (21) serially receives the sampled level and outputs in parallel a predetermined number of the levels which have been last received. The equalization neural network unit (22) receives the outputs of the time series generating unit, and generates an equalized signal of the distorted signal based on the outputs of the time series generating unit using a set of equalization network weights which are preset therein. The waveform equalizer may further contain a distortion characteristic detecting unit (40), an equalization network weight holding unit (31), and a selector unit (32). The distortion characteristic detecting unit (40) detects a distortion characteristic of the distorted signal. The equalization network weight holding unit (31) holds a plurality of sets of equalization network weights each for being set in the equalization neural network unit (22). The selector unit (31) selects one of the plurality of sets of equalization network weights according to the distortion characteristic which is detected in the distortion characteristic detecting unit (22), and supplies the selected set in the equalization neural network unit (22) to set the selected set therein.
摘要翻译：用于均衡失真信号的波形均衡器包括采样单元（10），时间序列生成单元（21）和均衡神经网络单元（22）。采样单元（10）以预定速率对失真信号的电平进行采样。时间序列生成单元（21）串行地接收采样电平并且并行输出预定数量的最后接收的电平。均衡神经网络单元（22）接收时间序列生成单元的输出，并且使用其中预设的一组均衡网络权重，基于时间序列生成单元的输出，生成失真信号的均衡信号。波形均衡器还可以包括失真特性检测单元（40），均衡网络权重保持单元（31）和选择器单元（32）。失真特性检测单元（40）检测失真信号的失真特性。均衡网络权重保持单元（31）保持多个均衡网络权重集合，用于设置在均衡神经网络单元（22）中。选择器单元（31）根据在失真特性检测单元（22）中检测到的失真特性来选择多组均衡网络权重之一，并将均衡神经网络单元（22）中的所选择的集合提供给在其中设置所选集。

2. 发明授权

EP0112107B1 Data transmitting-receiving system 失效
标题翻译：数据传输 - 接收系统
公开(公告)号：EP0112107B1
公开(公告)日：1989-04-12
申请号：EP83307363.8
申请日：1983-12-02
申请人： FUJITSU LIMITED
发明人： Nakamura, Hiroshi , Sasaki, Susumu , Fukuda, Eisuke
IPC分类号： H04L27/02
CPC分类号： H04L27/3836 , H04L27/368

3. 发明公开

EP0113246A2 Radio communication system 失效
标题翻译：无线电通信系统。
公开(公告)号：EP0113246A2
公开(公告)日：1984-07-11
申请号：EP83307949.4
申请日：1983-12-23
申请人： FUJITSU LIMITED
发明人： Sasaki, Susumu , Nakamura, Hiroshi , Fukuda, Eisuke
IPC分类号： H04L27/02
CPC分类号： H04L27/3836 , H04L27/3455 , H04L27/362
摘要： A radio communication system comprised of a transmitter unit, a transmission line, and a receiver unit. The transmitter unit modulates an in-phase-channel (I-ch) data signal and quadrature-channel (Q-ch) data signal with two carriers having π/2 phase difference with each other. A DC offset is added to either one of the I-ch and Q-ch data signals before the modulation. In the receiver unit, a demodulation operation is performed for the received transmission signal through a synchronous detection with the use of a leakage carrier created due to the DC offset and included in the transmission signal.

4. 发明公开

EP0454445A3 Waveform equalizer using a neural network 失效
标题翻译：使用神经网络的波形均衡器
公开(公告)号：EP0454445A3
公开(公告)日：1992-09-30
申请号：EP91303700.8
申请日：1991-04-24
申请人： FUJITSU LIMITED
发明人： Kimoto, Takashi , Kawabata, Kazuo , Asakawa, Kazuo , Ohishi, Yasuyuki , Fukuda, Eisuke , Takano, Takeshi
IPC分类号： H04L25/03
CPC分类号： H04L25/03165 , G06N3/04 , H04L2025/03464
摘要： A waveform equalizer for equalizing a distorted signal, contains a sampling unit (10), a time series generating unit (21), and an equalization neural network unit (22). The sampling unit (10) samples the level of a distorted signal at a predetermined rate. The time series generating unit (21) serially receives the sampled level and outputs in parallel a predetermined number of the levels which have been last received. The equalization neural network unit (22) receives the outputs of the time series generating unit, and generates an equalized signal of the distorted signal based on the outputs of the time series generating unit using a set of equalization network weights which are preset therein. The waveform equalizer may further contain a distortion characteristic detecting unit (40), an equalization network weight holding unit (31), and a selector unit (32). The distortion characteristic detecting unit (40) detects a distortion characteristic of the distorted signal. The equalization network weight holding unit (31) holds a plurality of sets of equalization network weights each for being set in the equalization neural network unit (22). The selector unit (31) selects one of the plurality of sets of equalization network weights according to the distortion characteristic which is detected in the distortion characteristic detecting unit (22), and supplies the selected set in the equalization neural network unit (22) to set the selected set therein.

5. 发明公开

EP0112107A3 Data transmitting-receiving system 失效
标题翻译：数据发送接收系统
公开(公告)号：EP0112107A3
公开(公告)日：1987-01-07
申请号：EP83307363
申请日：1983-12-02
申请人： FUJITSU LIMITED
发明人： Nakamura, Hiroshi , Sasaki, Susumu , Fukuda, Eisuke
IPC分类号： H04L27/02
CPC分类号： H04L27/3836 , H04L27/368
摘要： A data transmitting-receiving system includes a transmitter unit (100), a receiver unit (200), and a transmission line (137) connected therebetween. The transmitter unit includes conversion means (111-113; 121-123) to convert digital input data (D1, D2) of each of two channel routes into analog output signals (A1, A2), a respective modulator (115,125) in each channel route driven by the respective analog output signal, and means (133-136) to add the outputs from the modulators and to transmit the resultant signal to the receiver unit via the transmission line. Each conversion means includes a memory circuit (111, 121) which receives the digital input data, and a digital/analog (D ! A) converter (113, 123) which converts a digital output (d11, d21) from the memory circuit into the analog output signal. Each memory circuit provides a digital output (d11, d21) corresponding to the respective digital input data and also provides predetermined digital correction outputs (d12, d22) dependent upon the values of the individual input data. Each digital correction output comprises digital correction outputs related respectively to the own-side channel route and the other-side channel route. Each D/A converter produces the respective analog output signal taking into account the digital correction output related to the respective own-side channel route and the digital correction output from the other-side channel route. By use of the digital correction signals, non-linearity and modulation distortion in the system are cancelled out.

6. 发明公开

EP0113246A3 Radio communication system 失效
标题翻译：无线电通信系统
公开(公告)号：EP0113246A3
公开(公告)日：1986-08-13
申请号：EP83307949
申请日：1983-12-23
申请人： FUJITSU LIMITED
发明人： Sasaki, Susumu , Nakamura, Hiroshi , Fukuda, Eisuke
IPC分类号： H04L27/02
CPC分类号： H04L27/3836 , H04L27/3455 , H04L27/362
摘要： A radio communication system comprised of a transmitter unit, a transmission line, and a receiver unit. The transmitter unit modulates an in-phase-channel (I-ch) data signal and quadrature-channel (Q-ch) data signal with two carriers having π/2 phase difference with each other. A DC offset is added to either one of the I-ch and Q-ch data signals before the modulation. In the receiver unit, a demodulation operation is performed for the received transmission signal through a synchronous detection with the use of a leakage carrier created due to the DC offset and included in the transmission signal.
摘要翻译：一种无线电通信系统，包括发射机单元，传输线路和接收机单元。发射器单元利用彼此具有π/ 2相位差的两个载波来调制同相信道（I-ch）数据信号和正交信道（Q-ch）数据信号。在调制之前，将I-ch和Q-ch数据信号中的任一个添加DC偏移。在接收器单元中，通过使用由于DC偏移而创建并包含在发送信号中的泄漏载波的同步检测来对接收到的发送信号执行解调操作。

7. 发明授权

EP0454445B1 Waveform equalizer using a neural network 失效
标题翻译：波形与神经
公开(公告)号：EP0454445B1
公开(公告)日：1996-07-03
申请号：EP91303700.8
申请日：1991-04-24
申请人： FUJITSU LIMITED
发明人： Kimoto, Takashi , Kawabata, Kazuo , Asakawa, Kazuo , Ohishi, Yasuyuki , Fukuda, Eisuke , Takano, Takeshi
IPC分类号： H04L25/03
CPC分类号： H04L25/03165 , G06N3/04 , H04L2025/03464

8. 发明授权

EP0113246B1 Radio communication system 失效
标题翻译：无线电通信系统
公开(公告)号：EP0113246B1
公开(公告)日：1989-03-01
申请号：EP83307949.4
申请日：1983-12-23
申请人： FUJITSU LIMITED
发明人： Sasaki, Susumu , Nakamura, Hiroshi , Fukuda, Eisuke
IPC分类号： H04L27/02
CPC分类号： H04L27/3836 , H04L27/3455 , H04L27/362

9. 发明公开

EP0112107A2 Data transmitting-receiving system 失效
标题翻译：数据发送和接收系统。
公开(公告)号：EP0112107A2
公开(公告)日：1984-06-27
申请号：EP83307363.8
申请日：1983-12-02
申请人： FUJITSU LIMITED
发明人： Nakamura, Hiroshi , Sasaki, Susumu , Fukuda, Eisuke
IPC分类号： H04L27/02
CPC分类号： H04L27/3836 , H04L27/368
摘要： A data transmitting-receiving system includes a transmitter unit (100), a receiver unit (200), and a transmission line (137) connected therebetween. The transmitter unit includes conversion means (111-113; 121-123) to convert digital input data (D1, D2) of each of two channel routes into analog output signals (A1, A2), a respective modulator (115,125) in each channel route driven by the respective analog output signal, and means (133-136) to add the outputs from the modulators and to transmit the resultant signal to the receiver unit via the transmission line. Each conversion means includes a memory circuit (111, 121) which receives the digital input data, and a digital/analog (D ! A) converter (113, 123) which converts a digital output (d11, d21) from the memory circuit into the analog output signal. Each memory circuit provides a digital output (d11, d21) corresponding to the respective digital input data and also provides predetermined digital correction outputs (d12, d22) dependent upon the values of the individual input data. Each digital correction output comprises digital correction outputs related respectively to the own-side channel route and the other-side channel route. Each D/A converter produces the respective analog output signal taking into account the digital correction output related to the respective own-side channel route and the digital correction output from the other-side channel route. By use of the digital correction signals, non-linearity and modulation distortion in the system are cancelled out.

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