专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明公开

EP4276882A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR AND MEMORY 审中-实审
公开(公告)号：EP4276882A1
公开(公告)日：2023-11-15
申请号：EP22924581.6
申请日：2022-04-13
申请人： Changxin Memory Technologies, Inc.
发明人： SU, Xingsong , BAI, Weiping , XIAO, Deyuan
IPC分类号： H01L20060101
摘要： Provided are a semiconductor structure and a manufacturing method therefor, and a memory, and relate to the technical field of semiconductors, to resolve the technical problem of difficult manufacturing of the semiconductor structure. The semiconductor structure includes a substrate and a conductive structure located above the substrate. The conductive structure includes a plurality of first conductive structures and second conductive structures that are spaced apart from each other and extend in a first direction. Lengths of the first conductive structures and lengths of the second conductive structures vary in steps. The lengths of the plurality of first conductive structures and the lengths of the plurality of second conductive structures vary in steps. The first conductive structures and the second conductive structures form Word Lines (WLs). The WLs are easy to manufacture and lead out, so that other structures are conveniently formed on the WLs, so as to achieve an electrical connection between the WLs and a peripheral circuit.

2. 发明公开

EP4060718A1 CAPACITOR STRUCTURE PREPARATION METHOD, CAPACITOR STRUCTURE, AND MEMORY 有权
公开(公告)号：EP4060718A1
公开(公告)日：2022-09-21
申请号：EP21783125.4
申请日：2021-06-08
申请人： Changxin Memory Technologies, Inc.
发明人： SU, Xingsong , BAI, Weiping , YU, Mengkang , WANG, Lianhong
IPC分类号： H01L21/31 , H01G4/10 , H01L27/10
摘要： This application relates to the technical field of semiconductor technology, and specifically relates to a preparation method for a capacitor structure, a capacitor structure, and a memory, which are used to solve the technical problem of large leakage current of the capacitor structure. The preparation method for the capacitor structure includes: forming a dielectric layer on a first electrode, wherein, the dielectric layer includes a first amorphous layer and a high dielectric constant layer which are stacked, the first amorphous layer maintaining an amorphous structure after annealing, and the high dielectric constant layer being formed by crystallizing an initial dielectric constant layer after annealing; and forming a second electrode on the dielectric layer. Since the first amorphous layer remains an amorphous structure after annealing, electron transport can be suppressed, thereby reducing the leakage current of the capacitor structure.

3. 发明公开

EP4329454A1 SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREFOR 审中-实审
公开(公告)号：EP4329454A1
公开(公告)日：2024-02-28
申请号：EP22839611.5
申请日：2022-08-01
申请人： Changxin Memory Technologies, Inc.
发明人： SHAO, Guangsu , XIAO, Deyuan , QIU, Yunsong , BAI, Weiping , SU, Xingsong , YU, Mengkang , HUANG, Juan Juan
IPC分类号： H10B12/00
摘要： The present application relates to a semiconductor structure and a method for forming a semiconductor structure. The semiconductor structure includes a plurality of memory cells located on a substrate. Each of the plurality of memory cells includes a transistor and a capacitor. The capacitor is electrically connected to the transistor. The capacitor includes a body portion, and at least one extension portion located on a side surface of the body portion, and the at least one extension portion is electrically connected to the body portion. The present application increases the capacitance of the capacitor and increases the storage capacity of the semiconductor structure.

4. 发明公开

EP4326026A1 MEMORY AND MANUFACTURING METHOD THEREFOR 审中-实审
公开(公告)号：EP4326026A1
公开(公告)日：2024-02-21
申请号：EP22932804.2
申请日：2022-04-12
申请人： Changxin Memory Technologies, Inc.
发明人： SU, Xingsong , XIAO, Deyuan , BAI, Weiping
IPC分类号： H10B43/10 , H10B43/20 , H10B43/30
摘要： Provided are a memory device and a manufacturing method therefore, and relate to the technical field of semiconductors, to resolve the technical problem that a Word Line (WL) is not easy to manufacture. The manufacturing method includes: forming a film-stack structure on the substrate, where the film-stack structure includes sacrificial layers and active layers that are alternately stacked in a first direction; removing part of the film-stack structure located in a first area, and forming a plurality of first grooves that are spaced apart from each other and extend in a second direction, where the substrate is exposed from the first grooves to divide the active layers located in the first area into a plurality of active pillars that are spaced apart from each other; removing the sacrificial layers located in the first area and the second area; removing part of the active layers located in the second area, to form a plurality of step-shaped connection layers on an end of the second area away from the first area; and forming gate material layers to cover the connection layers and the active pillars. The gate material layers act as the WLs. By disposing the connection layers, it is convenient to manufacture the WLs and lead out the WLs.

5. 发明公开

EP4319527A1 SEMICONDUCTOR STRUCTURE, MANUFACTURING METHOD THEREFOR, AND MEMORY 审中-实审
公开(公告)号：EP4319527A1
公开(公告)日：2024-02-07
申请号：EP22764638.7
申请日：2022-06-28
申请人： Changxin Memory Technologies, Inc.
发明人： XIAO, Deyuan , SU, Xingsong , SHAO, Guangsu
IPC分类号： H10B12/00
摘要： Disclosed in the embodiments of the present disclosure are a semiconductor structure and method for manufacturing same, and a memory. The semiconductor structure includes: a plurality of first active columns arranged in an array along a first direction and a second direction, a plurality of first electrodes located in first grooves arranged at intervals, a plurality of first dielectric layers, and a second electrode covering surfaces of the first dielectric layers. The first direction and the second direction are perpendicular to the extension direction of the first active column, and the first direction is intersected with the second direction. Each first electrode covers a side wall of one of the first active columns. Each first groove surrounds a surface of each first active column. Each first dielectric layer covers the side wall of one of the first electrodes and a bottom of a gap between two adjacent first electrodes.

6. 发明公开

EP4287241A1 SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR 审中-实审
公开(公告)号：EP4287241A1
公开(公告)日：2023-12-06
申请号：EP22747236.2
申请日：2022-05-16
申请人： Changxin Memory Technologies, Inc.
发明人： SHAO, Guangsu , XIAO, Deyuan , QIU, Yunsong , LIU, Youming , JIANG, Yi , SU, Xingsong , ZHU, Yuhan
IPC分类号： H01L21/336 , H01L29/78 , H01L29/08
摘要： The present disclosure relates to a semiconductor structure and a manufacturing method thereof. The method of manufacturing a semiconductor structure includes: providing a base; forming a plurality of first trenches arranged in parallel at intervals and extending along a first direction, and an initial active region between two adjacent ones of the first trenches, wherein the initial active region includes a first initial source-drain region close to a bottom of the first trench, a second initial source-drain region away from the bottom of the first trench, and an initial channel region located between the first initial source-drain region and the second initial source-drain region; forming a protective dielectric layer, wherein the protective dielectric layer covers a sidewall of the second initial source-drain end and a sidewall of the initial channel region; thinning the first initial source-drain region; and depositing a conductive material layer at two opposite sides of the first initial source-drain region, to form bit line structures, wherein the bit line structure extends along the first direction. The method of manufacturing a semiconductor structure can improve the quality of bit lines, reduce a contact resistance between the bit line structure and the source-drain region, and decrease the RC delay.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式