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    • 4. 发明公开
    • SHIFT REGISTER UNIT, GATE DRIVING CIRCUIT AND DRIVING METHOD, AND DISPLAY APPARATUS
    • EP3411869A1
    • 2018-12-12
    • EP16834223.6
    • 2016-08-12
    • BOE Technology Group Co., Ltd.
    • ZHENG, HaoliangHAN, SeungwooYAO, XingCHOI, HyunsicSHANG, GuangliangHAN, MingfuIM, YunsikJUN, JungmokDONG, Xue
    • G09G3/20G11C19/28
    • G11C19/28G09G3/20G09G3/3677G09G3/3688G09G2310/0267G09G2310/0286G11C19/184H01L27/1222H01L27/124H01L27/1251
    • The present application discloses a method of driving a gate driving circuit in an operation cycle divided into a first sub-cycle and a second sub-cycle, including providing a gate driving circuit having a first plurality of shift register units with a second plurality of shift register units, the first plurality of shift register units being configured so that each odd/even numbered shift register unit includes a first bias-control terminal to receive a first/second bias signal CLK1/CLK2, a second bias-control terminal to receive a second/first bias signal CLK2/CLK1, and a first control level terminal provided with a first control voltage VC1, the second plurality of shift register units being configured so that each odd/even numbered shift register unit includes a third bias-control terminal to receive a third/fourth bias signal CLK3/CLK4, a fourth bias-control terminal to receive a fourth/third bias signal CLK4/CLK3, and a second control level terminal provided with a second control voltage VC2; configuring the first bias signal CLK1 and the second bias signal CLK2 as first pair of clock signals at respective turn-on level and turn-off level with inverted phase in the first sub-cycle; setting the first control voltage VC1 to a turn-off level so that the first plurality of shift register units is controlled along with the first pair of clock signals to respectively output corresponding gate driving output signals in an output phase within the first sub-cycle; setting both the third bias signal CLK3 and the fourth bias signal CLK4 to a turn-off level and the second control voltage VC2 to turn-on level during the first sub-cycle; configuring the third bias signal CLK3 and the fourth bias signal CLK4 as second pair of clock signals at respective turn-on level and turn-off level with inverted phase in the second sub-cycle; setting the second control voltage VC2 to a turn-off level so that the second plurality of shift register units are controlled along with the second pair of clock signals to respectively output corresponding gate driving output signals in an output phase within the second sub-cycle; and setting the first bias signal CLK1 and the second bias signal CLK2 to a turn-off level and the second control voltage VC1 to a turn-on level during the second sub-cycle.
    • 8. 发明公开
    • ANTI-PEEP DEVICE, MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE
    • EP3699683A1
    • 2020-08-26
    • EP18855139.4
    • 2018-08-20
    • BOE Technology Group Co., Ltd.
    • FANG, ZhengCHOI, HyunsicIM, Yunsik
    • G02F1/167G02F1/1335
    • The present application discloses a peep preventing device, a display apparatus with the peep preventing device and a method of manufacturing the peep preventing device. The peep preventing device includes: a transparent substrate; a plurality of first electrodes on the transparent substrate; a transparent insulating body on the transparent substrate, wherein the insulating body has a plurality of recesses in one-to-one correspondence with the first electrodes, each of the plurality of recesses has an opening facing towards the transparent substrate, the first electrodes are located in the recesses, respectively, and an area of a section, taken along a plane parallel to the transparent substrate, of each of the recesses gradually reduces in a direction away from the transparent substrate; and a plurality of transparent second electrodes each of which includes a second electrode sidewall portion covering a sidewall of one of the recesses. Closed spaces are defined between the insulating body and the second electrodes and the transparent substrate, electrophoretic liquids are contained in the closed spaces, respectively, and the electrophoretic liquids contain reflective charged particles adapted to adhere to the second electrodes when a first electric field is applied between the first electrodes and the second electrodes.
    • 10. 发明公开
    • ARRAY SUBSTRATE, LIQUID CRYSTAL DISPLAY PANEL AND DISPLAY DEVICE
    • 阵列基板,液晶显示面板和显示装置
    • EP2908171A1
    • 2015-08-19
    • EP14861101.5
    • 2014-04-30
    • BOE Technology Group Co., Ltd.
    • CHOI, Hyunsic
    • G02F1/1368G02F1/1343G02F1/1345
    • G02F1/134309G02F1/133345G02F1/136227G02F1/136286G02F1/1368G02F2001/134318G02F2001/134372G02F2001/136218
    • The invention discloses an array substrate, a liquid crystal display panel and a display device, since the first shield electrode, which intents to shield instantaneous electromagnetic signal in a data signal line, and a pixel electrode is provided in the same layer, compared to the existing array substrate in which the shield electrode and a common electrode are provided in the same layer, since the pixel electrode is closer to the data signal line, through the first shield electrode, the light leakage phenomenon can be effectively prevented from occurring in the array substrate, and the color mixing phenomenon of the array substrate can be alleviated, and further the distance between the first shield electrode provided in the same layer as the pixel electrode and the data signal line can be decreased, and the width of the first shield electrode is decreased, and the first shield electrode is prevented from occupying too many regions of the pixel electrode provided in the same layer; moreover, the first shield electrode and the pixel electrode are provided in the same layer so as to prevent the first shield electrode from occupying the region of the common electrode, increase the width of the slit of the common electrode, and decrease the process difficulty in manufacturing the array substrate.
    • 本发明公开了一种阵列基板,液晶显示面板和显示装置,由于第一屏蔽电极和第二屏蔽电极设置在同一层,所述第一屏蔽电极旨在屏蔽数据信号线中的瞬时电磁信号, 现有的阵列基板中,屏蔽电极和公共电极设置在同一层中,由于像素电极靠近数据信号线,通过第一屏蔽电极,可以有效地防止阵列中出现漏光现象 可以减轻阵列基板的混色现象,进而可以减小与像素电极同层设置的第一屏蔽电极与数据信号线之间的距离,减小第一屏蔽电极的宽度 并且防止第一屏蔽电极占据设置在同一层中的像素电极的太多区域; 此外,第一屏蔽电极和像素电极设置在同一层,以防止第一屏蔽电极占据公共电极的区域,增加了公共电极的缝隙宽度,并且减少了工艺难度 制造阵列基板。