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1. 发明公开

EP0689230A2 Method for lattice matched growth of semiconductor layers 失效
标题翻译： Verfahren zum gitterangepassten Aufwachsen von Halbleiterschichten
公开(公告)号：EP0689230A2
公开(公告)日：1995-12-27
申请号：EP95304091.2
申请日：1995-06-14
申请人： AT&T Corp.
发明人： Cunningham, John Edward , Pathak, Rajiv Nath , Goossen, Keith Wayne
IPC分类号： H01L21/20 , G02F1/015
CPC分类号： G02F1/017 , B82Y20/00 , G02B2006/12142 , G02F2001/01766 , G02F2202/102 , G02F2203/02 , H01L21/02392 , H01L21/02461 , H01L21/02463 , H01L21/02507 , H01L21/02543 , H01L21/02546 , Y10S438/938
摘要： An in-situ method is disclosed for highly accurate lattice matching using reflection high energy electron diffraction dynamics. The method includes the steps of providing a substrate of a first semiconductor material and initiating growth of a second semiconductor material thereon. The oscillation amplitude of intensity I of waveform cycles is monitored using reflection high energy electron diffraction. A maximum intensity I + and a minimum intensity I - is determined over a predetermined number of waveform cycles. The intensity drop ΔI from initial reflectivity to minimum reflectivity of the waveform cycles is determined and a normalized figure of merit FM is calculated for the predetermined number of waveform cycles using the relationship: FM = Σ(I + - I - ) ΔI
The fluxes of the second semiconductor material are then adjusted to maximize FM and optimize lattice matching.
A multiple quantum well light modulator is also provided including a semiconductor substrate of InP, a multiple quantum well region, disposed above the InP substrate, composed of InGaAs and having a thickness of about 4 µm. The modulator is characterized by a lattice mismatch of less than 2 x 10 -4 .
摘要翻译：公开了一种使用反射高能电子衍射动力学进行高精度晶格匹配的现场方法。该方法包括以下步骤：提供第一半导体材料的衬底并且在其上起始第二半导体材料的生长。使用反射高能电子衍射监测波形周期的强度I的振荡幅度。在预定数量的波形周期内确定最大强度I +和最小强度I 1。确定从初始反射率到波形周期的最小反射率的强度降DELTA I，并且使用以下关系计算预定数量的波形周期的归一化品质因数FM：然后调整第二半导体材料的通量以最大化FM并优化晶格匹配。还提供了一种多量子阱光调制器，其包括设置在InP衬底上方的InGaAs并具有约4μm厚度的InP的多个量子阱区的半导体衬底。调制器的特征在于小于2×10 -4的晶格失配。

2. 发明公开

EP0696064A2 Monolithically integrated VLSI optoelectronic circuits and a method of fabricating the same 失效
标题翻译： Monolithisch integrierte VLSI，optoelektronische Schaltkreise und Herstellungsverfahrenfürdiese
公开(公告)号：EP0696064A2
公开(公告)日：1996-02-07
申请号：EP95305041.6
申请日：1995-07-19
申请人： AT&T Corp.
发明人： Cunningham, John Edward , Jan, William Young , Goossen, Keith Wayne , Pathak, Rajiv Nath , Walker, James Albert
IPC分类号： H01L27/144 , H01L27/15
CPC分类号： H01L27/15 , H01L27/1443 , Y10S438/974
摘要： A monolithically integrated, optoelectronic VLSI circuit is fabricated by growing optical devices on the compound semiconductor surface of a VLSI chip or wafer having pre-existing electronic devices formed thereon. In accordance with an illustrative embodiment of the present invention, a large array of surface normal optical modulating devices such as multiple quantum well modulators is grown on an impurity free surface of a VLSI chip having an array of FETs already provided thereon. The growth of such devices takes place at temperatures below 430°C on a compound semiconductor surface which has a highly ordered atomic structure. An optoelectronic switch constructed in this manner is capable of addressing electronic chips in systems handling 10,000 or more input/output optical beams.
摘要翻译：通过在其上形成有预先存在的电子器件的VLSI芯片或晶片的化合物半导体表面上生长光学器件来制造单片集成的光电VLSI电路。根据本发明的说明性实施例，在具有已经提供在其上的FET阵列的VLSI芯片的无杂质表面上生长诸如多量子阱调制器的大量表面法向光调制器件阵列。这种器件的生长在具有高度有序原子结构的化合物半导体表面上在低于430℃的温度下进行。以这种方式构造的光电开关能够处理处理10,000个或更多个输入/输出光束的系统中的电子芯片。

3. 发明授权

EP0689230B1 Method for lattice matched growth of semiconductor layers 失效
标题翻译：一种用于晶格匹配的方法的半导体层的生长
公开(公告)号：EP0689230B1
公开(公告)日：2002-02-27
申请号：EP95304091.2
申请日：1995-06-14
申请人： AT&T Corp.
发明人： Cunningham, John Edward , Pathak, Rajiv Nath , Goossen, Keith Wayne
IPC分类号： H01L21/20 , G02F1/015
CPC分类号： G02F1/017 , B82Y20/00 , G02B2006/12142 , G02F2001/01766 , G02F2202/102 , G02F2203/02 , H01L21/02392 , H01L21/02461 , H01L21/02463 , H01L21/02507 , H01L21/02543 , H01L21/02546 , Y10S438/938

4. 发明公开

EP0689230A3 Method for lattice matched growth of semiconductor layers 失效
标题翻译： Verfahren zum gitterangepassten Aufwachsen von Halbleiterschichten
公开(公告)号：EP0689230A3
公开(公告)日：1996-07-03
申请号：EP95304091.2
申请日：1995-06-14
申请人： AT&T Corp.
发明人： Cunningham, John Edward , Pathak, Rajiv Nath , Goossen, Keith Wayne
IPC分类号： H01L21/20 , G02F1/015
CPC分类号： G02F1/017 , B82Y20/00 , G02B2006/12142 , G02F2001/01766 , G02F2202/102 , G02F2203/02 , H01L21/02392 , H01L21/02461 , H01L21/02463 , H01L21/02507 , H01L21/02543 , H01L21/02546 , Y10S438/938
摘要： An in-situ method is disclosed for highly accurate lattice matching using reflection high energy electron diffraction dynamics. The method includes the steps of providing a substrate of a first semiconductor material and initiating growth of a second semiconductor material thereon. The oscillation amplitude of intensity I of waveform cycles is monitored using reflection high energy electron diffraction. A maximum intensity I + and a minimum intensity I - is determined over a predetermined number of waveform cycles. The intensity drop ΔI from initial reflectivity to minimum reflectivity of the waveform cycles is determined and a normalized figure of merit FM is calculated for the predetermined number of waveform cycles using the relationship: FM = Σ(I + - I - ) ΔI The fluxes of the second semiconductor material are then adjusted to maximize FM and optimize lattice matching. A multiple quantum well light modulator is also provided including a semiconductor substrate of InP, a multiple quantum well region, disposed above the InP substrate, composed of InGaAs and having a thickness of about 4 µm. The modulator is characterized by a lattice mismatch of less than 2 x 10 -4 .
摘要翻译：提供了一种多量子阱光调制器，其包括设置在InP衬底上的InP的多个量子阱区的InP半导体衬底，由InGaAs构成并具有约4μm的厚度。调制器的特征在于小于2×10 -4的晶格失配。

5. 发明公开

EP1205784A2 Multiple quantum well light modulator 失效
标题翻译： Lichtmodulator mit mehrfachenQuantentöpfen
公开(公告)号：EP1205784A2
公开(公告)日：2002-05-15
申请号：EP01118651.7
申请日：1995-06-14
申请人： AT&T Corp.
发明人： Cunningham, John Edward , Pathak, Rajiv Nath , Goossen, Keith Wayne
IPC分类号： G02F1/017
CPC分类号： G02F1/017 , B82Y20/00 , G02B2006/12142 , G02F2001/01766 , G02F2202/102 , G02F2203/02 , H01L21/02392 , H01L21/02461 , H01L21/02463 , H01L21/02507 , H01L21/02543 , H01L21/02546 , Y10S438/938
摘要： A multiple quantum well light modulator is provided including a semiconductor substrate of InP, a multiple quantum well region, disposed above the InP substrate, composed of InGaAs and having a thickness of about 4 µm. The modulator is characterized by a lattice mismatch of less than 2 X 10 -4 .
摘要翻译：提供了一种多量子阱光调制器，其包括设置在InP衬底上的InP的多个量子阱区的InP半导体衬底，由InGaAs构成并具有约4μm的厚度。调制器的特征在于小于2×10 -4的晶格失配。

6. 发明公开

EP0696064A3 Monolithically integrated VLSI optoelectronic circuits and a method of fabricating the same 失效
标题翻译：单片集成VLSI，光电子电路和方法，它们的制造
公开(公告)号：EP0696064A3
公开(公告)日：1997-09-03
申请号：EP95305041.6
申请日：1995-07-19
申请人： AT&T Corp.
发明人： Cunningham, John Edward , Jan, William Young , Goossen, Keith Wayne , Pathak, Rajiv Nath , Walker, James Albert
IPC分类号： H01L27/144 , H01L27/15
CPC分类号： H01L27/15 , H01L27/1443 , Y10S438/974
摘要： A monolithically integrated, optoelectronic VLSI circuit is fabricated by growing optical devices on the compound semiconductor surface of a VLSI chip or wafer having pre-existing electronic devices formed thereon. In accordance with an illustrative embodiment of the present invention, a large array of surface normal optical modulating devices such as multiple quantum well modulators is grown on an impurity free surface of a VLSI chip having an array of FETs already provided thereon. The growth of such devices takes place at temperatures below 430°C on a compound semiconductor surface which has a highly ordered atomic structure. An optoelectronic switch constructed in this manner is capable of addressing electronic chips in systems handling 10,000 or more input/output optical beams.

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